firtool-1.123.0

What's Changed

• [SV] Enhanced name validation: support IEEE standard escape name checking by @RonxBulld in #8518
• [Docs][HW] Missing formatting in docs by @dobios in #8569
• [docs] Fix variable names by @towoe in #8568
• [Seq] Add a canonicalization to remove read-only memory by @uenoku in #8564
• [FIRRTL] Prevent name propagation for register by @uenoku in #8565
• [AIG][AIGER] Add AIGER Importer by @uenoku in #8567
• [FIRRTL] Make XMRRef and Deref pure by @rwy7 in #8570
• [FIRRTL] Add canonicalization test to ensure dead ref ops are eliminated by @rwy7 in #8577
• [FIRRTL] AdvancedLayerSink: clone ref ops into layerblocks by @rwy7 in #8576
• [circt-bmc] Add feature to ignore asserts on some initial cycles by @TaoBi22 in #8573
• [Arcilator] Don't try to run JIT if only part of the pipeline is run by @TaoBi22 in #8575
• [circt-verilog] Add updated LLHD passes to the pipeline by @fabianschuiki in #8579
• [ImportVerilog] Add support for concurrent assertions by @towoe in #8559
• [Arc] don't sink ops with nested writes in MergeIfs by @TaoBi22 in #8584
• [ImportVerilog] Support packed structs in inside operator by @AnnuCode in #8545
• [AIG][ImportAIGER] Fix incorrect tokenization and simplify parser by @uenoku in #8588
• [AIG][AIGER] Add AIGER Exporter by @uenoku in #8582
• [LLHD] Embed procedural ops within modules into llhd.combinational ops by @fabianschuiki in #8590
• [AIG][NFC] Refactor longest path analysis to enable caching and separate to a different file by @uenoku in #8593
• [AIG] Add AIGER runner passes for external logic solver integration by @uenoku in #8592
• [firld] Add firld to link FIRRTL circuits by @unlsycn in #8561
• [LLHD] Update function call inlining pass; add to circt-verilog by @fabianschuiki in #8597
• Bump LLVM to 945ce1aa3d29e24c49720ae9e0bcfbac88f2defd. by @mikeurbach in #8589
• [CI] Only use ccache for Release builds in nightly integration tests by @uenoku in #8581
• [Kanagawa] Replace CSE with specialized pass by @teqdruid in #8599
• [FIRRTL] Allow duplicate tracker annotations in LowerClasses. by @mikeurbach in #8598
• [OM] Use SymbolTable::lookup instead of lookupNearestSymbolFrom by @uenoku in #8602
• [LLHD] Add pass to lower acyclic control flow to mux ops by @fabianschuiki in #8600
• [Comb] Enable cross-block folds on and/or/xor by @fabianschuiki in #8607
• [FIRRTL] Make CatPrimOp variadic by @uenoku in #8557
• [Comb] Enable cross-block folds on add/sub/mul/div/mod by @fabianschuiki in #8608
• [Comb] Enable cross-block folds on replicate/parity/shl/shr/mux/icmp by @fabianschuiki in #8609
• [FIRRTL] Improve canonicalization patterns for variadic cat and reduction operations by @uenoku in #8578
• [firtool] Enable WireElimination pass by @uenoku in #8594
• [Comb] Enable cross-block folds on extract/concat/array_create(mux) by @fabianschuiki in #8611
• [FIRRTL] Move all annotations in inject-dut-hier by @seldridge in #8596
• [Pipeline] Python dialect and pass registration by @teqdruid in #8612
• [FIRRTL] Allow GC Companion multi-instantiation by @seldridge in #8603
• [Kanagawa] Python dialect and pass registration by @teqdruid in #8613
• [AIG][AIGERRunner] Refactor AIG external solver passes and add continueOnFailure option by @uenoku in #8615

New Contributors

• @RonxBulld made their first contribution in #8518
• @towoe made their first contribution in #8568

Full Changelog: firtool-1.122.0...firtool-1.123.0