firtool-1.126.0

What's Changed

• [ESI] Add a transaction snoop operation by @teqdruid in #8684
• [HW] MaterializeConstant: check for null block by @teqdruid in #8687
• [VerifToSMT] Fix lowering of initial integer values for BMC by @fzi-hielscher in #8689
• [FIRRTL] Add "knownlayers" specifications to ExtModules by @rwy7 in #8623
• [Deseq] Add bin flag to enable mux by @fabianschuiki in #8686
• [Datapath] Add Datapath to SMT conversion pass by @cowardsa in #8682
• [Comb] Avoid some non-terminating MuxOp fold cases by @TaoBi22 in #8691
• [Comb] Fix excessive const shifts causing crashes and invalid IR by @fabianschuiki in #8696
• [AIG] Add canonicalization to simplify inversion by @uenoku in #8697
• Fix filecheck directive typos and fix now-active test lines by @dtzSiFive in #8702
• [Verif][LEC] Make LECOp result optional to avoid unsafe conversion by @fzi-hielscher in #8701
• [hw] Convert HW Passes to use ODS constructors by @seldridge in #8703
• [OM] Deprecate the OM map by @prithayan in #8606
• Bump LLVM to ace1c838ca91c83c7a271d9378b86ea56051e83f. by @mikeurbach in #8705
• [RTG] Redefine RandomNumberInRangeOp upper bound to be inclusive by @maerhart in #8710
• [AIG] Add slice indexing support to LongestPathCollection in AIG python on bindings by @uenoku in #8709
• [MooreToCore] Lower empty string_constant to expected bit width. by @mvpant in #8688
• Bump LLVM to d9190f8141661bd6120dea61d28ae8940fd775d0 by @maerhart in #8715
• [RTG] Add custom tuple type to support empty tuples by @maerhart in #8711
• [RTG] Enable conditional value forwarding for ValidateOp by @maerhart in #8712
• [AIG] Use llvm::stable_sort to sort paths by @uenoku in #8717
• [circt-verilog] Enable SROA again by @maerhart in #8720
• [PyRTG] Support Python config parameters by @maerhart in #8719
• [Python] Speed up type_to_pytype and attribute_to_var by @maerhart in #8718
• [FIRRTL] Remove circuit from macro used by inline layers by @rwy7 in #8714
• [FIRRTL] SFCCompat: properly lower invalidated enums by @youngar in #8722
• [FIRRTL] FIRParser: support caching constants in match statements by @youngar in #8723
• [FIRRTL] check bundles have unique field names by @youngar in #8729
• [FIRRTL] TagExtract: make type inference parser friendly by @youngar in #8727
• [ESI] Fix wrap op canonicalizers by @teqdruid in #8730
• [ExportVerilog] localparam should always print bitwidths by @youngar in #8732
• [circt-lec] Adding support for the datapath dialect by @cowardsa in #8721
• [circt-synth] Add an option to disable WordsToBits, remove verification code from design by @uenoku in #8733
• [CombToSMT] Force conversion from bool to bv<1> after icmp by @maerhart in #8737
• [FIRRTL] LowerSigs: Add enum support by @youngar in #8731
• [RTG] Add a pass to print a list of tests by @maerhart in #8734
• [Verif] Add RefinementCheckingOp by @fzi-hielscher in #8713
• [FIRRTL] Enums: Add user-defined constructor encodings by @youngar in #8724
• [FIRRTL] FIRParser: parse tagExtract operations by @youngar in #8728
• [FIRRTL] LowerToHW: handle TagExtractOp by @youngar in #8726
• [FIRRTL] Do not allow uninferred widths or rests in enums by @youngar in #8740
• [RTG] Add immediate concat and slice operations by @maerhart in #8735
• [RTG] Add concat_immediate and slice_immediate folders by @maerhart in #8738
• [RTG] Fix ValidateOp elaboration by @maerhart in #8743
• [AIG][LongestPathAnalysis] Fix a bug in deduplicatePathsImpl by @uenoku in #8746
• [RTG] Support immediate slice/concat after validate by @maerhart in #8744
• [VerifToSMT] Move some LEC lowering code to a superclass, NFC by @fzi-hielscher in #8748
• [circt-opt][FSMToSV] Fix bug of operations not being cloned in transition region in FSMToSV Conversion by @AtticusKuhn in #8753
• [circt-bmc] Support seq.firreg with sync reset by @liuyic00 in #8698
• [RTG] Add operations to report test result by @maerhart in #8751
• [AIG][NFC] Add a module to OutputPort data structure and refactor the name handling by @uenoku in #8759
• [VerifToSMT] Fix lowering of no output, no result LEC op by @fzi-hielscher in #8763
• [ImportVerilog] Add (* full_case *) attribute support by @mvpant in #8762
• [HW][AIG] Add InstancePath CAPI and use native structures for AIG longest path analysis by @uenoku in #8760
• [Seq] Add a pass to convert an array seq.firreg to seq.firmem by @prithayan in #8716
• [FIRRTL] Make enums behave less like aggregates by @youngar in #8742
• [FIRRTL] FlattenMemories: handle memories with enums by @youngar in #8741
• [HWToSMT] Add ArrayInject lowering to HWToSMT by @uenoku in #8765
• [VerifToSMT] Lower verif.refines to SMT by @fzi-hielscher in #8749
• [Support] Add NPN class for Boolean function canonicalization by @uenoku in #8747
• [MooreToCore] Preserve module port order by @fabianschuiki in #8768
• [circt-verilog] Add register-to-memory pass to pipeline by @fabianschuiki in #8773
• [FIRRTL] Fix TagExtractOp's type inference by @youngar in #8766
• [FIRRTL] make mux type inference support enumeration types by @youngar in #8769
• [FIRRTL] FRT: support creating 0-valued enums by @youngar in #8772
• Migrate away from ArrayRef(std::nullopt_t) by @kazutakahirata in #8776

New Contributors

• @mvpant made their first contribution in #8688
• @AtticusKuhn made their first contribution in #8753
• @kazutakahirata made their first contribution in #8776

Full Changelog: firtool-1.125.0...firtool-1.126.0