Updates the DMAC peripheral to use the clock::v2 API
#932
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… API for `thumbv7` targets. * Renames the `dmac::DmacController::init` to `dmac::DmacController::new` for all targets for consistency with other peripherals * `dmac::DmacController::new` now requires the `AhbClk<Dmac>` for `thumbv7` targets instead of `&mut Pm`. * `dmac::DmacController::free` also now returns the `AhbClk<Dmac>` for `thumbv7` targets. * Addresses some other `cargo doc` warnings in the `dmac` module.
… API for `thumbv7` targets. * Updates the examples in the `dmac` module documentation to reflect the API changes. * Updates all applicable Tier 1 BSP examples, while others are broken, requiring additional peripheral migrations before they can be fixed.
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Summary
As part of the
clock::v2effort tracked in Issue #912, this PR updates thedmacto use theclock::v2API by requiring ownership of itsAhbClkforthumbv7targets.See the commit message for details.
The following Tier 1 BSP examples were also updated to include the change:
samd11_bare/i2cfeather_m0/async_dmacfeather_m0/async_i2cfeather_m0/async_spifeather_m0/async_uartfeather_m0/dmacfeather_m0/i2cfeather_m0/spifeather_m0/uart_dma_blockingfeather_m0/uart_dma_nonblockingfeather_m4/dmacmetro_m0/i2cmetro_m0/spimetro_m4/async_dmacThe following Tier 1 BSP examples are now broken and cannot be fixed until the noted peripherals are also migrated and merged (see the notes about this in Issue #912):
feather_m4/i2c(sercom::i2c::Config)feather_m4/spi(sercom::spi::Config)feather_m4/uart_dma_blocking(sercom::uart::Config)feather_m4/uart_dma_nonblocking(sercom::uart::Config)metro_m4/async_i2c(sercom::i2c::Config)metro_m4/async_spi(sercom::spi::Config)metro_m4/async_uart(sercom::uart::Config)metro_m4/i2c(sercom::i2c::Config)metro_m4/spi(sercom::spi::Config)Checklist
#[allow]certain lints where reasonable, but ideally justify those with a short comment.