feat(dmac): Updates the dmac::DmacController to use the clock::v2 API for thumbv7 targets.

* Updates the examples in the `dmac` module documentation to reflect the API changes.
* Updates all applicable Tier 1 BSP examples, while others are broken, requiring additional peripheral migrations before they can be fixed.

Author: kyp44

boards/feather_m0/examples/async_dmac.rs

@@ -32,7 +32,7 @@ async fn main(_s: embassy_executor::Spawner) {
     );
 
     // Initialize DMA Controller
-    let dmac = DmaController::init(peripherals.dmac, &mut peripherals.pm);
+    let dmac = DmaController::new(peripherals.dmac, &mut peripherals.pm);
 
     // Turn dmac into an async controller
     let mut dmac = dmac.into_future(crate::Irqs);

boards/feather_m0/examples/async_i2c.rs

@@ -41,7 +41,7 @@ async fn main(_s: embassy_executor::Spawner) {
     let i2c_sercom = bsp::periph_alias!(peripherals.i2c_sercom);
 
     // Initialize DMA Controller
-    let dmac = DmaController::init(peripherals.dmac, &mut peripherals.pm);
+    let dmac = DmaController::new(peripherals.dmac, &mut peripherals.pm);
 
     // Turn dmac into an async controller
     let mut dmac = dmac.into_future(Irqs);

boards/feather_m0/examples/async_spi.rs

@@ -41,7 +41,7 @@ async fn main(_s: embassy_executor::Spawner) {
     let spi_sercom = bsp::periph_alias!(peripherals.spi_sercom);
 
     // Initialize DMA Controller
-    let dmac = DmaController::init(peripherals.dmac, &mut peripherals.pm);
+    let dmac = DmaController::new(peripherals.dmac, &mut peripherals.pm);
 
     // Turn dmac into an async controller
     let mut dmac = dmac.into_future(Irqs);

boards/feather_m0/examples/async_uart.rs

@@ -41,7 +41,7 @@ async fn main(spawner: embassy_executor::Spawner) {
     let uart_sercom = periph_alias!(peripherals.uart_sercom);
 
     // Initialize DMA Controller
-    let dmac = DmaController::init(peripherals.dmac, &mut peripherals.pm);
+    let dmac = DmaController::new(peripherals.dmac, &mut peripherals.pm);
     // Turn dmac into an async controller
     let mut dmac = dmac.into_future(Irqs);
     // Get individual handles to DMA channels

boards/feather_m0/examples/dmac.rs

@@ -41,7 +41,7 @@ fn main() -> ! {
         cortex_m::singleton!(: [u8; LENGTH] = [0x00; LENGTH]).unwrap();
 
     // Initialize DMA Controller
-    let mut dmac = DmaController::init(dmac, &mut pm);
+    let mut dmac = DmaController::new(dmac, &mut pm);
     // Get individual handles to DMA channels
     let mut channels = dmac.split();
 

boards/feather_m0/examples/i2c.rs

@@ -46,7 +46,7 @@ fn main() -> ! {
     let (sda, scl) = (pins.sda, pins.scl);
 
     // Setup DMA channels for later use
-    let mut dmac = DmaController::init(dmac, &mut pm);
+    let mut dmac = DmaController::new(dmac, &mut pm);
     let channels = dmac.split();
     let chan0 = channels.0.init(PriorityLevel::Lvl0);
 

boards/feather_m0/examples/spi.rs

@@ -40,7 +40,7 @@ fn main() -> ! {
     let (miso, mosi, sclk) = (pins.miso, pins.mosi, pins.sclk);
 
     // Setup DMA channels for later use
-    let mut dmac = DmaController::init(dmac, &mut pm);
+    let mut dmac = DmaController::new(dmac, &mut pm);
     let channels = dmac.split();
     let chan0 = channels.0.init(PriorityLevel::Lvl0);
     let chan1 = channels.1.init(PriorityLevel::Lvl0);

boards/feather_m0/examples/uart_dma_blocking.rs

@@ -36,7 +36,7 @@ fn main() -> ! {
     let pins = bsp::Pins::new(peripherals.port);
 
     // Setup DMA channels for later use
-    let mut dmac = DmaController::init(dmac, &mut pm);
+    let mut dmac = DmaController::new(dmac, &mut pm);
     let channels = dmac.split();
 
     let chan0 = channels.0.init(PriorityLevel::Lvl0);

boards/feather_m0/examples/uart_dma_nonblocking.rs

@@ -36,7 +36,7 @@ fn main() -> ! {
     let pins = bsp::Pins::new(peripherals.port);
 
     // Setup DMA channels for later use
-    let mut dmac = DmaController::init(dmac, &mut pm);
+    let mut dmac = DmaController::new(dmac, &mut pm);
     let channels = dmac.split();
 
     let chan0 = channels.0.init(PriorityLevel::Lvl0);

boards/feather_m4/examples/dmac.rs

@@ -9,28 +9,21 @@ use cortex_m::asm;
 use feather_m4 as bsp;
 use panic_halt as _;
 
-use hal::{
-    clock::GenericClockController,
-    pac::{CorePeripherals, Peripherals},
-};
-
 use hal::dmac::{DmaController, PriorityLevel, Transfer, TriggerAction, TriggerSource};
+use hal::pac::Peripherals;
 
 #[bsp::entry]
 fn main() -> ! {
     let mut peripherals = Peripherals::take().unwrap();
-    let core = CorePeripherals::take().unwrap();
-    let _clocks = GenericClockController::with_external_32kosc(
+    let (mut _buses, clocks, _tokens) = hal::clock::v2::clock_system_at_reset(
+        peripherals.oscctrl,
+        peripherals.osc32kctrl,
         peripherals.gclk,
-        &mut peripherals.mclk,
-        &mut peripherals.osc32kctrl,
-        &mut peripherals.oscctrl,
+        peripherals.mclk,
         &mut peripherals.nvmctrl,
     );
 
-    let mut pm = peripherals.pm;
     let dmac = peripherals.dmac;
-    let _nvic = core.NVIC;
 
     // Initialize buffers
     const LENGTH: usize = 50;
@@ -40,7 +33,7 @@ fn main() -> ! {
         cortex_m::singleton!(: [u8; LENGTH] = [0x00; LENGTH]).unwrap();
 
     // Initialize DMA Controller
-    let mut dmac = DmaController::init(dmac, &mut pm);
+    let mut dmac = DmaController::new(dmac, clocks.ahbs.dmac);
     // Get individual handles to DMA channels
     let mut channels = dmac.split();
 
@@ -95,7 +88,7 @@ fn main() -> ! {
     // Move split channels back into the Channels struct
     channels.0 = chan0.into();
     // Free the DmaController and return the PAC DMAC struct
-    let _dmac = dmac.free(channels, &mut pm);
+    let (_dmac, _ahb_clk) = dmac.free(channels);
 
     loop {
         asm::nop();