LoRa SX1276 LoRaWAN Sleep Mode Low Power Fix

connectivity/drivers/emac/TARGET_STM/TARGET_STM32F7/stm32f7_eth_conf.c

@@ -17,6 +17,8 @@
 
 #include "stm32f7xx_hal.h"
 
+#if defined ETH
+
 void _eth_config_mac(ETH_HandleTypeDef *heth)
 {
     ETH_MACInitTypeDef macconf = {
@@ -59,3 +61,5 @@ void _eth_config_mac(ETH_HandleTypeDef *heth)
 
     (void) HAL_ETH_ConfigMAC(heth, &macconf);
 }
+
+#endif // defined ETH

connectivity/drivers/lora/COMPONENT_SX1276/SX1276_LoRaRadio.cpp

@@ -35,7 +35,8 @@ SPDX-License-Identifier: BSD-3-Clause
 #include "sx1276Regs-LoRa.h"
 
 #include <math.h> //rint
-
+#include <chrono>
+using namespace std::chrono_literals;
 using namespace rtos;
 using namespace mbed;
 
@@ -210,6 +211,8 @@ SX1276_LoRaRadio::SX1276_LoRaRadio(PinName spi_mosi,
 
     if (tcxo != NC) {
         _tcxo = 1;
+        // TCXO startup time
+        ThisThread::sleep_for(60ms);
     }
 
 #ifdef MBED_CONF_RTOS_PRESENT
@@ -288,9 +291,9 @@ void SX1276_LoRaRadio::radio_reset()
 {
     _reset_ctl.output();
     _reset_ctl = 0;
-    ThisThread::sleep_for(2);
+    ThisThread::sleep_for(2ms);
     _reset_ctl.input();
-    ThisThread::sleep_for(6);
+    ThisThread::sleep_for(6ms);
 }
 
 /**
@@ -357,7 +360,7 @@ uint32_t SX1276_LoRaRadio::random(void)
     set_operation_mode(RF_OPMODE_RECEIVER);
 
     for (i = 0; i < 32; i++) {
-        ThisThread::sleep_for(1);
+        ThisThread::sleep_for(1ms);
         // Unfiltered RSSI value reading. Only takes the LSB value
         rnd |= ((uint32_t) read_register(REG_LR_RSSIWIDEBAND) & 0x01) << i;
     }
@@ -805,7 +808,7 @@ void SX1276_LoRaRadio::send(uint8_t *buffer, uint8_t size)
             // FIFO operations can not take place in Sleep mode
             if ((read_register(REG_OPMODE) & ~RF_OPMODE_MASK) == RF_OPMODE_SLEEP) {
                 standby();
-                ThisThread::sleep_for(1);
+                ThisThread::sleep_for(1ms);
             }
             // write_to_register payload buffer
             write_fifo(buffer, size);
@@ -1025,7 +1028,7 @@ bool SX1276_LoRaRadio::perform_carrier_sense(radio_modems_t modem,
     set_operation_mode(RF_OPMODE_RECEIVER);
 
     // hold on a bit, radio turn-around time
-    ThisThread::sleep_for(1);
+    ThisThread::sleep_for(1ms);
 
     Timer elapsed_time;
     elapsed_time.start();
@@ -1263,13 +1266,27 @@ void SX1276_LoRaRadio::read_fifo(uint8_t *buffer, uint8_t size)
 void SX1276_LoRaRadio::set_operation_mode(uint8_t mode)
 {
     if (mode == RF_OPMODE_SLEEP) {
+        write_to_register(REG_OPMODE, (read_register(REG_OPMODE) & RF_OPMODE_MASK) | mode);
         set_low_power_mode();
+        /* FIXME taken from set_modem, it reduces the power consumption
+         *from 300µA to 1.5µA */
+        write_to_register(REG_DIOMAPPING1, 0x00); // sets DIO0-DI03 in default mode
+        write_to_register(REG_DIOMAPPING2, 0x30); // bits 4-5 are turned on i.e.,
+        if (_rf_ctrls.tcxo != NC) {
+            ThisThread::sleep_for(10ms);
+            _tcxo = 0;
+        }
     } else {
+        if (_rf_ctrls.tcxo != NC) {
+            _tcxo = 1;
+            // TCXO startup time
+            ThisThread::sleep_for(60ms);
+        }
         set_low_power_mode();
+        write_to_register(REG_OPMODE, (read_register(REG_OPMODE) & RF_OPMODE_MASK) | mode);
         set_antenna_switch(mode);
     }
 
-    write_to_register(REG_OPMODE, (read_register(REG_OPMODE) & RF_OPMODE_MASK) | mode);
 }
 
 /**
@@ -1327,14 +1344,14 @@ void SX1276_LoRaRadio::set_sx1276_variant_type()
 {
     if (_rf_ctrls.ant_switch != NC) {
         _ant_switch.input();
-        ThisThread::sleep_for(1);
+        ThisThread::sleep_for(1ms);
         if (_ant_switch == 1) {
             radio_variant = SX1276MB1LAS;
         } else {
             radio_variant = SX1276MB1MAS;
         }
         _ant_switch.output();
-        ThisThread::sleep_for(1);
+        ThisThread::sleep_for(1ms);
     } else {
         radio_variant = MBED_CONF_SX1276_LORA_DRIVER_RADIO_VARIANT;
     }

connectivity/netsocket/include/netsocket/DTLSSocketWrapper.h

@@ -40,6 +40,14 @@ class DTLSSocketWrapper : public TLSSocketWrapper {
      * @param control      Transport control mode. See @ref control_transport.
      */
     DTLSSocketWrapper(Socket *transport, const char *hostname = NULL, control_transport control = TRANSPORT_CONNECT_AND_CLOSE);
+
+    /** Destroy a socket wrapper.
+     *
+     *  Closes socket wrapper if the socket wrapper is still opened.
+     */
+    ~DTLSSocketWrapper();
+
+    nsapi_error_t close() override;
 private:
     static void timing_set_delay(void *ctx, uint32_t int_ms, uint32_t fin_ms);
     static int timing_get_delay(void *ctx);

connectivity/netsocket/source/DTLSSocketWrapper.cpp

@@ -36,6 +36,11 @@ DTLSSocketWrapper::DTLSSocketWrapper(Socket *transport, const char *hostname, co
 #endif /* !defined(MBEDTLS_SSL_CONF_SET_TIMER) && !defined(MBEDTLS_SSL_CONF_GET_TIMER) */
 }
 
+DTLSSocketWrapper::~DTLSSocketWrapper()
+{
+    close();
+}
+
 void DTLSSocketWrapper::timing_set_delay(void *ctx, uint32_t int_ms, uint32_t fin_ms)
 {
     DTLSSocketWrapper *context = static_cast<DTLSSocketWrapper *>(ctx);
@@ -74,6 +79,16 @@ int DTLSSocketWrapper::timing_get_delay(void *ctx)
     }
 }
 
+nsapi_error_t DTLSSocketWrapper::close()
+{
+    if (_timer_event_id != 0) {
+        mbed::mbed_event_queue()->cancel(_timer_event_id);
+        _timer_event_id = 0;
+    }
+
+    return TLSSocketWrapper::close();
+}
+
 void DTLSSocketWrapper::timer_event(void)
 {
     _timer_expired = true;

platform/include/platform/mbed_version.h

@@ -45,7 +45,7 @@
   *
   * @note 99 is default value for development version (master branch)
   */
-#define MBED_PATCH_VERSION 0
+#define MBED_PATCH_VERSION 1
 
 #define MBED_ENCODE_VERSION(major, minor, patch) ((major)*10000 + (minor)*100 + (patch))
 

targets/TARGET_NUVOTON/TARGET_M2354/TARGET_TFM/TARGET_NU_M2354/COMPONENT_TFM_S_FW/partition/flash_layout.h

@@ -31,13 +31,13 @@
  * 0x0010_0000 Secondary image area (2KB):
  *    0x0010_0000 Secure     image secondary (320KB) (Dummy)
  *    0x0015_0000 Non-secure image secondary (576KB) (Dummy)
- * 0x001E_0000 Scratch area (4KB) (Dummy)
+ * 0x001E_0000 Scratch area (16KB) (Dummy)
  *
  * SDH Flash:
  * 0x0000_0000 Secondary image area (896KB)
  *    0x0000_0000 Secure     image secondary (320KB)
  *    0x0005_0000 Non-secure image secondary (576KB)
- * 0x0020_0000 Scratch area (4 KB)
+ * 0x0020_0000 Scratch area (16 KB)
  *
  * Flash layout on M2354 with BL2 (multiple image boot):
  *
@@ -50,12 +50,12 @@
  * 0x0007_0000 Non-secure image primary slot (576KB)
  * 0x0010_0000 Secure image     secondary slot (320KB) (Dummy)
  * 0x0015_0000 Non-secure image secondary slot (576KB) (Dummy)
- * 0x001E_0000 Scratch area (4KB) (Dummy)
+ * 0x001E_0000 Scratch area (16KB) (Dummy)
  *
  * SDH Flash:
  * 0x0000_0000 Secure image     secondary slot (320KB)
  * 0x0010_0000 Non-secure image secondary slot (576KB)
- * 0x0020_0000 Scratch area (2 KB)
+ * 0x0020_0000 Scratch area (16 KB)
  */
 
 /* This header file is included from linker scatter file as well, where only a
@@ -123,13 +123,13 @@
 #if NU_UPDATE_STAGE_SDH
 #define FLASH_AREA_SCRATCH_ID      (FLASH_AREA_2_ID + 1)
 #define FLASH_AREA_SCRATCH_OFFSET  (0x200000)
-#define FLASH_AREA_SCRATCH_SIZE    (0x1000)
+#define FLASH_AREA_SCRATCH_SIZE    (0x4000)
 #define FLASH_DEVICE_ID_SCRATCH    SDH_FLASH_DEVICE_ID
 #define FLASH_DEV_NAME_SCRATCH     SDH_FLASH_DEV_NAME
 #else
 #define FLASH_AREA_SCRATCH_ID      (FLASH_AREA_2_ID + 1)
 #define FLASH_AREA_SCRATCH_OFFSET  (FLASH_AREA_2_OFFSET + FLASH_AREA_2_SIZE)
-#define FLASH_AREA_SCRATCH_SIZE    (0x1000)
+#define FLASH_AREA_SCRATCH_SIZE    (0x4000)
 #endif
 
 /* The maximum number of status entries supported by the bootloader. */
@@ -181,13 +181,13 @@
 #if NU_UPDATE_STAGE_SDH
 #define FLASH_AREA_SCRATCH_ID      (FLASH_AREA_3_ID + 1)
 #define FLASH_AREA_SCRATCH_OFFSET  (0x200000)
-#define FLASH_AREA_SCRATCH_SIZE    (0x1000)
+#define FLASH_AREA_SCRATCH_SIZE    (0x4000)
 #define FLASH_DEVICE_ID_SCRATCH    SDH_FLASH_DEVICE_ID
 #define FLASH_DEV_NAME_SCRATCH     SDH_FLASH_DEV_NAME
 #else
 #define FLASH_AREA_SCRATCH_ID      (FLASH_AREA_3_ID + 1)
 #define FLASH_AREA_SCRATCH_OFFSET  (FLASH_AREA_3_OFFSET + FLASH_AREA_3_SIZE)
-#define FLASH_AREA_SCRATCH_SIZE    (0x1000)
+#define FLASH_AREA_SCRATCH_SIZE    (0x4000)
 #endif
 
 /* The maximum number of status entries supported by the bootloader. */

targets/TARGET_STM/TARGET_STM32F7/CMakeLists.txt

@@ -1,6 +1,7 @@
 # Copyright (c) 2020 ARM Limited. All rights reserved.
 # SPDX-License-Identifier: Apache-2.0
 
+add_subdirectory(TARGET_STM32F722xE EXCLUDE_FROM_ALL)
 add_subdirectory(TARGET_STM32F746xG EXCLUDE_FROM_ALL)
 add_subdirectory(TARGET_STM32F756xG EXCLUDE_FROM_ALL)
 add_subdirectory(TARGET_STM32F767xI EXCLUDE_FROM_ALL)

targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F722xE/CMakeLists.txt

@@ -0,0 +1,28 @@
+# Copyright (c) 2020 ARM Limited. All rights reserved.
+# SPDX-License-Identifier: Apache-2.0
+
+add_subdirectory(TARGET_NUCLEO_F722ZE EXCLUDE_FROM_ALL)
+
+if(${MBED_TOOLCHAIN} STREQUAL "GCC_ARM")
+    set(STARTUP_FILE TOOLCHAIN_GCC_ARM/startup_stm32f722xx.S)
+    set(LINKER_FILE TOOLCHAIN_GCC_ARM/stm32f722xe.ld)
+elseif(${MBED_TOOLCHAIN} STREQUAL "ARM")
+    set(STARTUP_FILE TOOLCHAIN_ARM/startup_stm32f722xx.S)
+    set(LINKER_FILE TOOLCHAIN_ARM/stm32f722xe.sct)
+endif()
+
+add_library(mbed-stm32f722xe INTERFACE)
+
+target_sources(mbed-stm32f722xe
+    INTERFACE
+        ${STARTUP_FILE}
+)
+
+target_include_directories(mbed-stm32f722xe
+    INTERFACE
+        .
+)
+
+mbed_set_linker_script(mbed-stm32f722xe ${CMAKE_CURRENT_SOURCE_DIR}/${LINKER_FILE})
+
+target_link_libraries(mbed-stm32f722xe INTERFACE mbed-stm32f7)

targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F722xE/TARGET_NUCLEO_F722ZE/CMakeLists.txt

@@ -0,0 +1,17 @@
+# Copyright (c) 2020 ARM Limited. All rights reserved.
+# SPDX-License-Identifier: Apache-2.0
+
+add_library(mbed-nucleo-f722ze INTERFACE)
+
+target_sources(mbed-nucleo-f722ze
+    INTERFACE
+        PeripheralPins.c
+        system_clock.c
+)
+
+target_include_directories(mbed-nucleo-f722ze
+    INTERFACE
+        .
+)
+
+target_link_libraries(mbed-nucleo-f722ze INTERFACE mbed-stm32f722xe)

targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F722xE/TARGET_NUCLEO_F722ZE/PeripheralNames.h

@@ -0,0 +1,107 @@
+/* mbed Microcontroller Library
+ *******************************************************************************
+ * Copyright (c) 2016, STMicroelectronics
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. Neither the name of STMicroelectronics nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *******************************************************************************
+ */
+#ifndef MBED_PERIPHERALNAMES_H
+#define MBED_PERIPHERALNAMES_H
+
+#include "cmsis.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef enum {
+    ADC_1 = (int)ADC1_BASE,
+    ADC_2 = (int)ADC2_BASE,
+    ADC_3 = (int)ADC3_BASE
+} ADCName;
+
+typedef enum {
+    DAC_1 = DAC_BASE
+} DACName;
+
+typedef enum {
+    UART_1 = (int)USART1_BASE,
+    UART_2 = (int)USART2_BASE,
+    UART_3 = (int)USART3_BASE,
+    UART_4 = (int)UART4_BASE,
+    UART_5 = (int)UART5_BASE,
+    UART_6 = (int)USART6_BASE,
+    UART_7 = (int)UART7_BASE,
+    UART_8 = (int)UART8_BASE
+} UARTName;
+
+#define DEVICE_SPI_COUNT 6
+typedef enum {
+    SPI_1 = (int)SPI1_BASE,
+    SPI_2 = (int)SPI2_BASE,
+    SPI_3 = (int)SPI3_BASE,
+    SPI_4 = (int)SPI4_BASE,
+    SPI_5 = (int)SPI5_BASE
+} SPIName;
+
+typedef enum {
+    I2C_1 = (int)I2C1_BASE,
+    I2C_2 = (int)I2C2_BASE,
+    I2C_3 = (int)I2C3_BASE
+} I2CName;
+
+typedef enum {
+    PWM_1  = (int)TIM1_BASE,
+    PWM_2  = (int)TIM2_BASE,
+    PWM_3  = (int)TIM3_BASE,
+    PWM_4  = (int)TIM4_BASE,
+    PWM_5  = (int)TIM5_BASE,
+    PWM_8  = (int)TIM8_BASE,
+    PWM_9  = (int)TIM9_BASE,
+    PWM_10 = (int)TIM10_BASE,
+    PWM_11 = (int)TIM11_BASE,
+    PWM_12 = (int)TIM12_BASE,
+    PWM_13 = (int)TIM13_BASE,
+    PWM_14 = (int)TIM14_BASE
+} PWMName;
+
+typedef enum {
+    CAN_1 = (int)CAN1_BASE
+} CANName;
+
+typedef enum {
+    QSPI_1 = (int)QSPI_R_BASE,
+} QSPIName;
+
+typedef enum {
+    USB_FS = (int)USB_OTG_FS_PERIPH_BASE,
+    USB_HS = (int)USB_OTG_HS_PERIPH_BASE
+} USBName;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif