-
Notifications
You must be signed in to change notification settings - Fork 3k
STM32L4 TRNG clock configuration #11679
New issue
Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.
By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.
Already on GitHub? Sign in to your account
Conversation
@jeromecoutant, thank you for your changes. |
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
This addition fixes the seen issues. Will the USE_PLL_MSI be 0x1 with all the future boards as well? If there are going to be changes to the TRNG-initialisation (adding more different possibilities for RNG clock selections), there might be a need to make modifications here, and could be good to document.
f2dbaa0
to
7b9bc1c
Compare
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
While cleaning up I'd like to have comment updated
targets/TARGET_STM/trng_api.c
Outdated
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) { | ||
error("RNG clock configuration error\n"); | ||
} | ||
|
||
#elif defined(TARGET_STM32L4) | ||
/* RNG clock configuration could be already done by USB */ |
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
to be very precise it's not RNG clock configuration but RNG clock source selection
and comment should add that RNG and USB clocks have the same source, so the common source selection could be already done by USB
targets/TARGET_STM/trng_api.c
Outdated
} | ||
} | ||
else { | ||
/* MSI clock is not enabled, RNG clock is configured on PLL */ |
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
/* MSI clock is not enabled, so PLL selected as RNG clock source */
7b9bc1c
to
772be32
Compare
Thank you for the quick response and fix. |
@0xc0170 could you please review and start CI for this? |
marked for CI, we are finilizing 5.14.1 RC, this PR will go into once it is completed. |
@jeromecoutant Ready for ci but rebase needed, please do and will start CI |
772be32
to
7db11e0
Compare
Rebase done, please start CI |
CI started |
Test run: FAILEDSummary: 1 of 4 test jobs failed Failed test jobs:
|
CI restarted |
Test run: FAILEDSummary: 3 of 4 test jobs failed Failed test jobs:
|
CI restarted |
Test run: SUCCESSSummary: 11 of 11 test jobs passed |
Description
Fixes #11674
In some cases, mainly STM32L4, STM targets that have TRNG will use RCC_RNGCLKSOURCE_PLL even if the CLOCK_SOURCE is defined to be USE_PLL_MSI and TRNG should use RCC_RNGCLKSOURCE_MSI instead.
USE_PLL_MSI was defined in the system_clock.c and isn't seen in the trng_api.c thus evaluating to 0 when preprocessing
Pull request type
Reviewers
@jarlamsa
Release Notes