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STM32 TRNG clock configuration
1 parent 31fb3f9 commit 772be32

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+33
-8
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1 file changed

+33
-8
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targets/TARGET_STM/trng_api.c

Lines changed: 33 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -42,23 +42,48 @@ void trng_init(trng_t *obj)
4242
error("Only 1 RNG instance supported\r\n");
4343
}
4444

45-
#if !defined(TARGET_STM32WB)
46-
/* Because M0 core of WB also needs RG RNG is already clocked by default */
47-
#if defined(RCC_PERIPHCLK_RNG)
45+
#if defined(RCC_PERIPHCLK_RNG) /* STM32L4 / STM32H7 / STM32WB */
46+
47+
#if defined(TARGET_STM32WB)
48+
/* No need to reconfigure RngClockSelection as RNG is already clocked by M0 */
49+
50+
#elif defined(TARGET_STM32H7)
4851
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct;
4952

5053
/*Select PLLQ output as RNG clock source */
5154
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_RNG;
52-
#if ((CLOCK_SOURCE) & USE_PLL_MSI)
53-
PeriphClkInitStruct.RngClockSelection = RCC_RNGCLKSOURCE_MSI;
54-
#else
5555
PeriphClkInitStruct.RngClockSelection = RCC_RNGCLKSOURCE_PLL;
56-
#endif
5756
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) {
5857
error("RNG clock configuration error\n");
5958
}
59+
60+
#elif defined(TARGET_STM32L4)
61+
/* RNG and USB clocks have the same source, so the common source selection could be already done by USB */
62+
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct;
63+
64+
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_RNG;
65+
66+
if (__HAL_RCC_GET_FLAG(RCC_FLAG_MSIRDY)) {
67+
/* MSI clock is enabled, MSI selected as RNG clock source if not alredy done */
68+
if (__HAL_RCC_GET_RNG_SOURCE() != RCC_RNGCLKSOURCE_MSI) {
69+
PeriphClkInitStruct.RngClockSelection = RCC_RNGCLKSOURCE_MSI;
70+
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) {
71+
error("RNG clock configuration error\n");
72+
}
73+
}
74+
}
75+
else {
76+
/* MSI clock is not enabled, PLL selected as RNG clock source */
77+
PeriphClkInitStruct.RngClockSelection = RCC_RNGCLKSOURCE_PLL;
78+
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) {
79+
error("RNG clock configuration error\n");
80+
}
81+
}
82+
83+
#else
84+
#error("RNG clock not configured");
6085
#endif
61-
#endif //!defined(TARGET_STM32WB)
86+
#endif /* defined(RCC_PERIPHCLK_RNG) */
6287

6388
/* RNG Peripheral clock enable */
6489
__HAL_RCC_RNG_CLK_ENABLE();

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