Enhance memory management #348
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I've tested these fixes on the Nucleo-L432KC, and they work perfectly. It would be helpful to get them released. Thank you for doing this work! |
Signed-off-by: Frederic.Pillon <[email protected]>
Signed-off-by: Frederic.Pillon <[email protected]>
This will allow to user to override the default behavior. Signed-off-by: Frederic.Pillon <[email protected]>
Minimum stack size is defined in linker script: _Min_Stack_Size = 0x400;; /* required amount of stack */ If more stack is requested, then user have to ensure that heap and stack can fit in the SRAM. Fix stm32duino#307 Signed-off-by: Frederic.Pillon <[email protected]>
STM32L432xx SRAM is split into two blocks: • 48 Kbyte mapped at address 0x2000 0000 (SRAM1) • 16 Kbyte located at address 0x1000 0000 with hardware parity check (SRAM2). This memory is also mapped at address 0x2000 C000, offering a contiguous address space with the SRAM1 (16 Kbyte aliased by bit band Signed-off-by: Frederic.Pillon <[email protected]>
STM32L476xx SRAM is split into two blocks: • 96 Kbyte mapped at address 0x2000 0000 (SRAM1) • 32 Kbyte located at address 0x1000 0000 with hardware parity check (SRAM2). Only the SRAM1 is managed. One enhancement could be done to use SRAM1 for the heap and SRAM2 for the stack. (Refer to MBED) Signed-off-by: Frederic.Pillon <[email protected]>
Signed-off-by: Frederic.Pillon <[email protected]>
benwaffle
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Apr 10, 2019
Enhance memory management
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This PR include:
_sbrkas weak (Required by Memory manager to safely use malloc() from other libraries STM32FreeRTOS#9)