more SystemVerilog changes and style change for clk · stevej/tt09-jtag-example-v2-stevej@7d1fb92

Triggered via push November 6, 2024 18:50

stevej

main

Status Success

Total duration 33s

Artifacts 1

test.yaml

on: push

Produced during runtime

Name	Size	Digest
test-vcd Expired	3 KB	`sha256:30a4a9369a240346b908b4ca8d700ae0423e85a437fb8bac31d9da5d97f6d4fc`