Fix MXCSR configuration dependent timing #111139
Merged
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Dependent on the (potentially secret) data some vector instructions operate on, and the content in MXCSR, instruction retirement may be delayed by one cycle. This is a potential side channel.
This PR fixes this vulnerability for the
x86_64-fortanix-unknown-sgx
platform by loading MXCSR with0x1fbf
through anxrstor
instruction when the enclave is entered and executing anlfence
immediately after. Other changes of the MXCSR happen only when the enclave is about to be exited and no vector instructions will be executed before it will actually do so. Users of EDP who change the MXCSR and do wish to defend against this side channel, will need to implement the software mitigation described here.cc: @jethrogb @monokles