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Add Cortex-R support #2261
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m-braunschweig
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Add Cortex-R support #2261
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Original file line number | Diff line number | Diff line change |
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@@ -0,0 +1,70 @@ | ||
/* | ||
* Copyright (c) 2020 Nordic Semiconductor ASA | ||
* Copyright (c) 2025 Siemens Mobility GmbH | ||
* | ||
* SPDX-License-Identifier: Apache-2.0 | ||
*/ | ||
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#include <stdint.h> | ||
#include <zephyr/irq.h> | ||
#include <zephyr/sys/util_macro.h> | ||
#include <zephyr/toolchain.h> | ||
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#ifdef CONFIG_ARM_CUSTOM_INTERRUPT_CONTROLLER | ||
extern void z_soc_irq_eoi(unsigned int irq); | ||
#else | ||
#include <zephyr/drivers/interrupt_controller/gic.h> | ||
#endif | ||
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#define READ_COPROCESSOR_REGISTER(out, coproc, opc1, crn, crm, opc2) \ | ||
__asm__ volatile("mrc " #coproc ", " #opc1 ", %0, " #crn ", " #crm ", " #opc2 "\n" : "=r" (out) ::); | ||
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#define WRITE_COPROCESSOR_REGISTER(in, coproc, opc1, crn, crm, opc2) \ | ||
__asm__ volatile("mcr " #coproc ", " #opc1 ", %0, " #crn ", " #crm ", " #opc2 "\n" :: "r" (in) :) | ||
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void cleanup_arm_interrupts(void) | ||
{ | ||
/* Allow any pending interrupts to be recognized */ | ||
__ISB(); | ||
__disable_irq(); | ||
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for (unsigned int i = 0; i < CONFIG_NUM_IRQS; ++i) { | ||
irq_disable(i); | ||
} | ||
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for (unsigned int i = 0; i < CONFIG_NUM_IRQS; ++i) { | ||
#ifdef CONFIG_ARM_CUSTOM_INTERRUPT_CONTROLLER | ||
z_soc_irq_eoi(i); | ||
#else | ||
arm_gic_eoi(i); | ||
#endif /* CONFIG_ARM_CUSTOM_INTERRUPT_CONTROLLER */ | ||
} | ||
} | ||
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#if CONFIG_CPU_HAS_ARM_MPU | ||
__weak void z_arm_clear_arm_mpu_config(void) | ||
{ | ||
uint8_t i; | ||
uint8_t num_regions; | ||
uint32_t mpu_type_register; | ||
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/* Disable MPU */ | ||
uint32_t val; | ||
READ_COPROCESSOR_REGISTER(val, p15, 0, c1, c0, 0); | ||
val &= ~BIT(0); | ||
__DSB(); | ||
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WRITE_COPROCESSOR_REGISTER(val, p15, 0, c1, c0, 0); | ||
__ISB(); | ||
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/* The number of MPU regions is stored in bits 15:8 of the MPU type register */ | ||
READ_COPROCESSOR_REGISTER(mpu_type_register, p15, 0, c0, c0, 4); | ||
num_regions = (uint8_t) ((mpu_type_register >> 8) & BIT_MASK(8)); | ||
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for (i = 0; i < num_regions; ++i) { | ||
/* Select region in the MPU and clear the region size field */ | ||
WRITE_COPROCESSOR_REGISTER(i, p15, 0, c6, c2, 0); | ||
WRITE_COPROCESSOR_REGISTER(0, p15, 0, c6, c1, 2); | ||
} | ||
} | ||
#endif |
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Original file line number | Diff line number | Diff line change |
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- Added support for booting Cortex-R5 images |
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Original file line number | Diff line number | Diff line change |
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- Add support for cleaning up the Cortex-R core before final jumping |
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I am good with it as it is but can we do
#ifdef CONFIG_ARMV7_R
here just to make the use case clearer. Same with other#else
s as well?