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Implement firstbitlow test #209
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cdd0d7b
Implment firstbitlow test
V-FEXrt 2d1eaab
Address comments
V-FEXrt 0a6eed9
Add 16/64 bit tests
V-FEXrt 1eb5194
Add missing REQUIRES
V-FEXrt 8fab991
XFAIL DXC-Vulkan
V-FEXrt 3a7861a
XFAIL Metal
V-FEXrt cbd79f0
test
V-FEXrt d9b64b8
More test excludes
V-FEXrt 4251258
test
V-FEXrt 6181e06
Update unsupported/xfail
V-FEXrt 9fba526
Address comments
V-FEXrt 11c8e81
try fix ci
V-FEXrt 3262816
Merge branch 'main' into 113-ots-firstbitlow
V-FEXrt 6fff239
nl
V-FEXrt d960d20
bad merge
V-FEXrt ba298b4
Update deps
V-FEXrt 2eef805
Merge branch 'main' into 113-ots-firstbitlow
V-FEXrt 6a4df96
Narrow failures and add issue
V-FEXrt 5f2c2cd
Missed exclusion
V-FEXrt 1da8c2a
Revert xfail with asserts enabled
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Original file line number | Diff line number | Diff line change |
---|---|---|
@@ -0,0 +1,88 @@ | ||
#--- source.hlsl | ||
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||
StructuredBuffer<uint16_t4> In1 : register(t0); | ||
StructuredBuffer<int16_t4> In2 : register(t1); | ||
RWStructuredBuffer<uint32_t4> Out : register(u2); | ||
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||
[numthreads(1,1,1)] | ||
void main() { | ||
Out[0] = firstbitlow(In1[0]); | ||
uint32_t4 Out1 = {firstbitlow(In1[0].xyz), firstbitlow(In1[0].w)}; | ||
uint32_t4 Out2 = {firstbitlow(In2[0].xy), firstbitlow(In2[0].zw)}; | ||
Out[1] = Out1; | ||
Out[2] = Out2; | ||
} | ||
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||
//--- pipeline.yaml | ||
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--- | ||
Shaders: | ||
- Stage: Compute | ||
Entry: main | ||
DispatchSize: [1, 1, 1] | ||
Buffers: | ||
- Name: In1 | ||
Format: Hex16 | ||
Stride: 8 | ||
Data: [ | ||
0x0000, | ||
0x00E8, | ||
0x8000, | ||
0xFFFF, | ||
] | ||
- Name: In2 | ||
Format: Int16 | ||
Stride: 8 | ||
Data: [-1, -8, 8, 0] | ||
- Name: Out | ||
Format: UInt32 | ||
Stride: 16 | ||
ZeroInitSize: 48 | ||
- Name: ExpectedOut # The result we expect | ||
Format: UInt32 | ||
Stride: 16 | ||
# All bits set (4294967295) is returned when no bit is set on the input | ||
Data: [4294967295, 3, 15, 0, 4294967295, 3, 15, 0, 0, 3, 3, 4294967295] | ||
Results: | ||
- Result: Test1 | ||
Rule: BufferExact | ||
Actual: Out | ||
Expected: ExpectedOut | ||
DescriptorSets: | ||
- Resources: | ||
- Name: In1 | ||
Kind: StructuredBuffer | ||
DirectXBinding: | ||
Register: 0 | ||
Space: 0 | ||
VulkanBinding: | ||
Binding: 0 | ||
- Name: In2 | ||
Kind: StructuredBuffer | ||
DirectXBinding: | ||
Register: 1 | ||
Space: 0 | ||
VulkanBinding: | ||
Binding: 1 | ||
- Name: Out | ||
Kind: RWStructuredBuffer | ||
DirectXBinding: | ||
Register: 2 | ||
Space: 0 | ||
VulkanBinding: | ||
Binding: 2 | ||
... | ||
#--- end | ||
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||
# REQUIRES: Int16 | ||
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||
# Fails with 'gpu-exec: error: Failed to materializeAll.:' | ||
# XFAIL: Metal | ||
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||
# 16/64 bit firstbitlow doesn't have a DXC-Vulkan lowering | ||
# https://github.com/microsoft/DirectXShaderCompiler/blob/48d6e3c635f0ab3ae79580c37003e6faeca6c671/tools/clang/test/CodeGenSPIRV/intrinsics.firstbitlow.64bit.hlsl#L5 | ||
# UNSUPPORTED: DXC-Vulkan | ||
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||
# RUN: split-file %s %t | ||
# RUN: %dxc_target -T cs_6_5 -enable-16bit-types -Fo %t.o %t/source.hlsl | ||
# RUN: %offloader %t/pipeline.yaml %t.o |
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Original file line number | Diff line number | Diff line change |
---|---|---|
@@ -0,0 +1,79 @@ | ||
#--- source.hlsl | ||
|
||
StructuredBuffer<uint4> In1 : register(t0); | ||
StructuredBuffer<int4> In2 : register(t1); | ||
RWStructuredBuffer<uint4> Out : register(u2); | ||
|
||
[numthreads(1,1,1)] | ||
void main() { | ||
Out[0] = firstbitlow(In1[0]); | ||
uint4 Out1 = {firstbitlow(In1[0].xyz), firstbitlow(In1[0].w)}; | ||
uint4 Out2 = {firstbitlow(In2[0].xy), firstbitlow(In2[0].zw)}; | ||
Out[1] = Out1; | ||
Out[2] = Out2; | ||
} | ||
|
||
//--- pipeline.yaml | ||
|
||
--- | ||
Shaders: | ||
- Stage: Compute | ||
Entry: main | ||
DispatchSize: [1, 1, 1] | ||
Buffers: | ||
- Name: In1 | ||
Format: Hex32 | ||
Stride: 16 | ||
Data: [ | ||
0x00000000, | ||
0x000000E8, | ||
0x80000000, | ||
0xFFFFFFFF, | ||
] | ||
- Name: In2 | ||
Format: Int32 | ||
Stride: 16 | ||
Data: [-1, -8, 8, 0] | ||
- Name: Out | ||
Format: UInt32 | ||
Stride: 16 | ||
ZeroInitSize: 48 | ||
- Name: ExpectedOut # The result we expect | ||
Format: UInt32 | ||
Stride: 16 | ||
# All bits set (4294967295) is returned when no bit is set on the input | ||
Data: [4294967295, 3, 31, 0, 4294967295, 3, 31, 0, 0, 3, 3, 4294967295] | ||
Results: | ||
- Result: Test1 | ||
Rule: BufferExact | ||
Actual: Out | ||
Expected: ExpectedOut | ||
DescriptorSets: | ||
- Resources: | ||
- Name: In1 | ||
Kind: StructuredBuffer | ||
DirectXBinding: | ||
Register: 0 | ||
Space: 0 | ||
VulkanBinding: | ||
Binding: 0 | ||
- Name: In2 | ||
Kind: StructuredBuffer | ||
DirectXBinding: | ||
Register: 1 | ||
Space: 0 | ||
VulkanBinding: | ||
Binding: 1 | ||
- Name: Out | ||
Kind: RWStructuredBuffer | ||
DirectXBinding: | ||
Register: 2 | ||
Space: 0 | ||
VulkanBinding: | ||
Binding: 2 | ||
... | ||
#--- end | ||
|
||
# RUN: split-file %s %t | ||
# RUN: %dxc_target -T cs_6_5 -Fo %t.o %t/source.hlsl | ||
# RUN: %offloader %t/pipeline.yaml %t.o |
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Original file line number | Diff line number | Diff line change |
---|---|---|
@@ -0,0 +1,91 @@ | ||
#--- source.hlsl | ||
|
||
StructuredBuffer<uint64_t4> In1 : register(t0); | ||
StructuredBuffer<int64_t4> In2 : register(t1); | ||
RWStructuredBuffer<uint32_t4> Out : register(u2); | ||
|
||
[numthreads(1,1,1)] | ||
void main() { | ||
Out[0] = firstbitlow(In1[0]); | ||
uint32_t4 Out1 = {firstbitlow(In1[0].xyz), firstbitlow(In1[0].w)}; | ||
uint32_t4 Out2 = {firstbitlow(In2[0].xy), firstbitlow(In2[0].zw)}; | ||
Out[1] = Out1; | ||
Out[2] = Out2; | ||
} | ||
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||
//--- pipeline.yaml | ||
|
||
--- | ||
Shaders: | ||
- Stage: Compute | ||
Entry: main | ||
DispatchSize: [1, 1, 1] | ||
Buffers: | ||
- Name: In1 | ||
Format: Hex64 | ||
Stride: 32 | ||
Data: [ | ||
0x0000000000000000, | ||
0x00000000000000E8, | ||
0x8000000000000000, | ||
0xFFFFFFFFFFFFFFFF, | ||
] | ||
- Name: In2 | ||
Format: Int64 | ||
Stride: 32 | ||
Data: [-1, -8, 8, 0] | ||
- Name: Out | ||
Format: UInt32 | ||
Stride: 16 | ||
ZeroInitSize: 48 | ||
- Name: ExpectedOut # The result we expect | ||
Format: UInt32 | ||
Stride: 16 | ||
# All bits set (4294967295) is returned when no bit is set on the input | ||
Data: [4294967295, 3, 63, 0, 4294967295, 3, 63, 0, 0, 3, 3, 4294967295] | ||
Results: | ||
- Result: Test1 | ||
Rule: BufferExact | ||
Actual: Out | ||
Expected: ExpectedOut | ||
DescriptorSets: | ||
- Resources: | ||
- Name: In1 | ||
Kind: StructuredBuffer | ||
DirectXBinding: | ||
Register: 0 | ||
Space: 0 | ||
VulkanBinding: | ||
Binding: 0 | ||
- Name: In2 | ||
Kind: StructuredBuffer | ||
DirectXBinding: | ||
Register: 1 | ||
Space: 0 | ||
VulkanBinding: | ||
Binding: 1 | ||
- Name: Out | ||
Kind: RWStructuredBuffer | ||
DirectXBinding: | ||
Register: 2 | ||
Space: 0 | ||
VulkanBinding: | ||
Binding: 2 | ||
... | ||
#--- end | ||
|
||
# REQUIRES: Int64 | ||
|
||
# Fails with 'gpu-exec: error: Failed to materializeAll.:' | ||
# XFAIL: Metal | ||
|
||
# 16/64 bit firstbitlow doesn't have a DXC-Vulkan lowering | ||
# https://github.com/microsoft/DirectXShaderCompiler/blob/48d6e3c635f0ab3ae79580c37003e6faeca6c671/tools/clang/test/CodeGenSPIRV/intrinsics.firstbitlow.64bit.hlsl#L5 | ||
# UNSUPPORTED: DXC-Vulkan | ||
|
||
# https://github.com/llvm/llvm-project/issues/143003 | ||
# XFAIL: Clang-Vulkan | ||
|
||
# RUN: split-file %s %t | ||
# RUN: %dxc_target -T cs_6_5 -Fo %t.o %t/source.hlsl | ||
# RUN: %offloader %t/pipeline.yaml %t.o |
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