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2 changes: 1 addition & 1 deletion llvm/lib/Target/X86/X86IndirectBranchTracking.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -147,7 +147,7 @@ bool X86IndirectBranchTrackingPass::runOnMachineFunction(MachineFunction &MF) {
for (auto &MBB : MF) {
// Find all basic blocks that their address was taken (for example
// in the case of indirect jump) and add ENDBR instruction.
if (MBB.hasAddressTaken())
if (MBB.isMachineBlockAddressTaken() || MBB.isIRBlockAddressTaken())
Changed |= addENDBR(MBB, MBB.begin());

for (MachineBasicBlock::iterator I = MBB.begin(); I != MBB.end(); ++I) {
Expand Down
34 changes: 34 additions & 0 deletions llvm/test/CodeGen/X86/callbr-asm-endbr.ll
Original file line number Diff line number Diff line change
@@ -0,0 +1,34 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s

define i32 @test1(i32 %a) {
; CHECK-LABEL: test1:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: endbr64
; CHECK-NEXT: addl $4, %edi
; CHECK-NEXT: #APP
; CHECK-NEXT: xorl %edi, %edi
; CHECK-NEXT: jmp .LBB0_2
; CHECK-NEXT: #NO_APP
; CHECK-NEXT: # %bb.1: # %normal
; CHECK-NEXT: xorl %eax, %eax
; CHECK-NEXT: retq
; CHECK-NEXT: .LBB0_2: # Inline asm indirect target
; CHECK-NEXT: # %fail
; CHECK-NEXT: # Label of block must be emitted
; CHECK-NEXT: movl $1, %eax
; CHECK-NEXT: retq
entry:
%0 = add i32 %a, 4
callbr void asm "xorl $0, $0; jmp ${1:l}", "r,!i,~{dirflag},~{fpsr},~{flags}"(i32 %0) to label %normal [label %fail]

normal:
ret i32 0

fail:
ret i32 1
}

!llvm.module.flags = !{!0}

!0 = !{i32 8, !"cf-protection-branch", i32 1}
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