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[MC][AMDGPU] Support .reloc BFD_RELOC_{NONE,32,64} #114617

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Merged
merged 2 commits into from
Nov 13, 2024
Merged

[MC][AMDGPU] Support .reloc BFD_RELOC_{NONE,32,64} #114617

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aa0fcc4
[MC][AMDGPU] Support .reloc BFD_RELOC_{NONE,32,64}
EthanLuisMcDonough Nov 1, 2024
019035c
[MC][AMDGPU] Add BFD_RELOC test
EthanLuisMcDonough Nov 13, 2024
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13 changes: 9 additions & 4 deletions llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUAsmBackend.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -163,12 +163,17 @@ void AMDGPUAsmBackend::applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,

std::optional<MCFixupKind>
AMDGPUAsmBackend::getFixupKind(StringRef Name) const {
return StringSwitch<std::optional<MCFixupKind>>(Name)
#define ELF_RELOC(Name, Value) \
.Case(#Name, MCFixupKind(FirstLiteralRelocationKind + Value))
auto Type = StringSwitch<unsigned>(Name)
#define ELF_RELOC(Name, Value) .Case(#Name, Value)
#include "llvm/BinaryFormat/ELFRelocs/AMDGPU.def"
#undef ELF_RELOC
.Default(std::nullopt);
.Case("BFD_RELOC_NONE", ELF::R_AMDGPU_NONE)
.Case("BFD_RELOC_32", ELF::R_AMDGPU_ABS32)
.Case("BFD_RELOC_64", ELF::R_AMDGPU_ABS64)
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Why are they not added to "llvm/BinaryFormat/ELFRelocs/AMDGPU.def" ?

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@arsenm This is how the other backends do it (4f7562d), would you prefer it this way or added to the .def file?

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I have no idea why it's like this, why wouldn't these all be in the def? I guess it's fine to copy the pattern and clean them all later?

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We just need to decide which way we want to do it.

.Default(-1u);
if (Type != -1u)
return static_cast<MCFixupKind>(FirstLiteralRelocationKind + Type);
return std::nullopt;
}

const MCFixupKindInfo &AMDGPUAsmBackend::getFixupKindInfo(
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9 changes: 9 additions & 0 deletions llvm/test/MC/AMDGPU/reloc-directive.s
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Expand Up @@ -19,6 +19,9 @@
# PRINT-NEXT: .reloc 0, R_AMDGPU_REL32_HI, .data
# PRINT-NEXT: .reloc 0, R_AMDGPU_RELATIVE64, .data
# PRINT-NEXT: .reloc 0, R_AMDGPU_REL16, .data
# PRINT-NEXT: .reloc 0, BFD_RELOC_NONE, .data
# PRINT-NEXT: .reloc 0, BFD_RELOC_32, .data
# PRINT-NEXT: .reloc 0, BFD_RELOC_64, .data

# CHECK: 0x2 R_AMDGPU_NONE .data
# CHECK-NEXT: 0x1 R_AMDGPU_NONE foo 0x4
Expand All @@ -36,6 +39,9 @@
# CHECK-NEXT: 0x0 R_AMDGPU_REL32_HI .data
# CHECK-NEXT: 0x0 R_AMDGPU_RELATIVE64 .data
# CHECK-NEXT: 0x0 R_AMDGPU_REL16 .data
# CHECK-NEXT: 0x0 R_AMDGPU_NONE .data
# CHECK-NEXT: 0x0 R_AMDGPU_ABS32 .data
# CHECK-NEXT: 0x0 R_AMDGPU_ABS64 .data

.text
s_nop 0
Expand All @@ -56,6 +62,9 @@
.reloc 0, R_AMDGPU_REL32_HI, .data
.reloc 0, R_AMDGPU_RELATIVE64, .data
.reloc 0, R_AMDGPU_REL16, .data
.reloc 0, BFD_RELOC_NONE, .data
.reloc 0, BFD_RELOC_32, .data
.reloc 0, BFD_RELOC_64, .data

.data
.globl foo
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