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[LLHD] Add new RefType to replace hw::InOutType #9081
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Scheremo
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Mostly LGTM. Quite a bit of churn, but very sensible changes imo!
Lots of doc comment in LLHD Op table gen files still refer to operators returning hw.inout types. Would be nice to update 😃
| typeConverter.addConversion([&](RefType type) -> std::optional<Type> { | ||
| if (auto innerType = typeConverter.convertType(type.getNestedType())) { | ||
| if (hw::isHWValueType(innerType)) | ||
| return hw::InOutType::get(innerType); | ||
| // TODO: There is some abstraction missing here to correctly return a | ||
| // reference of a CHandle; return an error for now. | ||
| if (isa<mlir::LLVM::LLVMPointerType>(innerType)) { | ||
| mlir::emitError(mlir::UnknownLoc::get(type.getContext())) | ||
| << "Emission of references of LLVMPointerType is currently " | ||
| "unsupported!"; | ||
| return {}; | ||
| } | ||
| } | ||
| if (auto innerType = typeConverter.convertType(type.getNestedType())) | ||
| return llhd::RefType::get(innerType); |
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Much nicer!
| // CHECK: [[TMP:%.+]] = llvm.mlir.zero : !llvm.ptr | ||
| // CHECK: llhd.sig [[TMP]] : !llvm.ptr | ||
| moore.variable : <!moore.chandle> | ||
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| // CHECK: [[TMP:%.+]] = llhd.constant_time <0 | ||
| // CHECK: llhd.sig [[TMP]] : !llhd.time | ||
| moore.variable : <!moore.time> | ||
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| // CHECK: [[TMP:%.+]] = llhd.constant_time | ||
| // CHECK: llhd.sig [[TMP]] : !llhd.time | ||
| %c42_fs = moore.constant_time 42 fs | ||
| moore.variable %c42_fs : <!moore.time> | ||
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Love to see this!
Add a `RefType` to the LLHD dialect and replace all uses of HW's `InOutType` across the LLHD dialect and the ImportVerilog pipeline. We have been abusing the inout type to mean "signal/variable reference", which becomes problematic if we are trying to place `!llhd.time` or `!llvm.ptr` values behind such a reference. (The HW inout type requires the inner type to be a plain hardware value.) This change now allows the circt-verilog frontend to generate variables with the `time` type and treat them just like any other type. Most of the changes here are just systematic name replacements. I have also removed a few `qualified(...)` wrappers around types and made sure that when an op is known to accept or return a ref type, the printer would just print `<T>` instead of `!llhd.ref<T>`. This is the default behavior for unambiguous types, but sometimes this gets lost when explicitly askign for qualified types, or using `functional-type`.
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Add a
RefTypeto the LLHD dialect and replace all uses of HW'sInOutTypeacross the LLHD dialect and the ImportVerilog pipeline. We have been abusing the inout type to mean "signal/variable reference", which becomes problematic if we are trying to place!llhd.timeor!llvm.ptrvalues behind such a reference. (The HW inout type requires the inner type to be a plain hardware value.)This change now allows the circt-verilog frontend to generate variables with the
timetype and treat them just like any other type.Most of the changes here are just systematic name replacements. I have also removed a few
qualified(...)wrappers around types and made sure that when an op is known to accept or return a ref type, the printer would just print<T>instead of!llhd.ref<T>. This is the default behavior for unambiguous types, but sometimes this gets lost when explicitly askign for qualified types, or usingfunctional-type.