Remove single state restriction on FSM to SV #8665
Merged
Conversation
This file contains hidden or bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
teqdruid
reviewed
Jul 8, 2025
Contributor
teqdruid
left a comment
teqdruid
left a comment
There was a problem hiding this comment.
Could you add some tests for this edge case?
Member
Author
|
Sure, sorry for delay. I'm not sure where to put it, I can do a unit test of just the conversion to SV, but it feels like seeing the verilog shows no further issues. But could also stop at this point and just test output of this pass. I could also split it in 2: do one here and on in export pass that uses the output of the first two as input. |
teqdruid
approved these changes
Aug 20, 2025
Contributor
teqdruid
left a comment
teqdruid
left a comment
There was a problem hiding this comment.
But could also stop at this point and just test output of this pass.
This please. Just ensure that there's really no reason for that edge case detection to be there.
The conversion seems to work and gets to Verilog. It seems correct, if not most efficient lowered form if there is only one state. Not sure if there was a different reason for this restriction (beyond, this would be better as just HWModule, although didn't see a pattern that would do that).
jpienaar
force-pushed
the
jpienaar/fsmtosv
branch
from
28a01f4 to
5111a4b
Compare
jpienaar
force-pushed
the
jpienaar/fsmtosv
branch
from
5111a4b to
8ead883
Compare
Sign up for free
to join this conversation on GitHub.
Already have an account?
Sign in to comment
Add this suggestion to a batch that can be applied as a single commit.
This suggestion is invalid because no changes were made to the code.
Suggestions cannot be applied while the pull request is closed.
Suggestions cannot be applied while viewing a subset of changes.
Only one suggestion per line can be applied in a batch.
Add this suggestion to a batch that can be applied as a single commit.
Applying suggestions on deleted lines is not supported.
You must change the existing code in this line in order to create a valid suggestion.
Outdated suggestions cannot be applied.
This suggestion has been applied or marked resolved.
Suggestions cannot be applied from pending reviews.
Suggestions cannot be applied on multi-line comments.
Suggestions cannot be applied while the pull request is queued to merge.
Suggestion cannot be applied right now. Please check back later.
The conversion seems to work and gets to Verilog. It seems correct, if not most efficient lowered form if there is only one state. Not sure if there was a different reason for this restriction (beyond, this would be better as just HWModule, although didn't see a pattern that would do that).