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Bugfix: s_always is a temporal logic operator #1025

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Merged
merged 1 commit into from
Mar 20, 2025
Merged

Bugfix: s_always is a temporal logic operator #1025

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2 changes: 1 addition & 1 deletion regression/verilog/SVA/initial1.desc
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Original file line number Diff line number Diff line change
Expand Up @@ -5,7 +5,7 @@ initial1.sv
^\[main\.p1\] main\.counter == 100: REFUTED$
^\[main\.p2\] ##1 main\.counter == 1: PROVED up to bound 5$
^\[main\.p3\] ##1 main\.counter == 100: REFUTED$
^\[main\.p4\] s_nexttime main\.counter == 1: PROVED$
^\[main\.p4\] s_nexttime main\.counter == 1: PROVED up to bound 5$
^EXIT=10$
^SIGNAL=0$
--
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15 changes: 8 additions & 7 deletions src/temporal-logic/temporal_logic.cpp
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Expand Up @@ -117,13 +117,14 @@ bool is_SVA_operator(const exprt &expr)
return is_SVA_sequence(expr) || id == ID_sva_disable_iff ||
id == ID_sva_accept_on || id == ID_sva_reject_on ||
id == ID_sva_sync_accept_on || id == ID_sva_sync_reject_on ||
id == ID_sva_always || id == ID_sva_ranged_always ||
id == ID_sva_nexttime || id == ID_sva_s_nexttime ||
id == ID_sva_indexed_nexttime || id == ID_sva_until ||
id == ID_sva_s_until || id == ID_sva_until_with ||
id == ID_sva_s_until_with || id == ID_sva_eventually ||
id == ID_sva_s_eventually || id == ID_sva_ranged_s_eventually ||
id == ID_sva_cycle_delay || id == ID_sva_overlapped_followed_by ||
id == ID_sva_always || id == ID_sva_s_always ||
id == ID_sva_ranged_always || id == ID_sva_nexttime ||
id == ID_sva_s_nexttime || id == ID_sva_indexed_nexttime ||
id == ID_sva_until || id == ID_sva_s_until ||
id == ID_sva_until_with || id == ID_sva_s_until_with ||
id == ID_sva_eventually || id == ID_sva_s_eventually ||
id == ID_sva_ranged_s_eventually || id == ID_sva_cycle_delay ||
id == ID_sva_overlapped_followed_by ||
id == ID_sva_nonoverlapped_followed_by;
}

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