WIP: Update SIMD instructions

crates/wasmparser/src/binary_reader.rs

@@ -350,7 +350,7 @@ impl<'a> BinaryReader<'a> {
 
     pub(crate) fn read_memory_type(&mut self) -> Result<MemoryType> {
         let pos = self.original_position();
-        let flags = self.read_var_u32()?;
+        let flags = self.read_u8()?;
         if (flags & !0x7) != 0 {
             return Err(BinaryReaderError::new(
                 "invalid table resizable limits flags",
@@ -1481,34 +1481,34 @@ impl<'a> BinaryReader<'a> {
             0x00 => Operator::V128Load {
                 memarg: self.read_memarg()?,
             },
-            0x01 => Operator::I16x8Load8x8S {
+            0x01 => Operator::V128Load8x8S {
                 memarg: self.read_memarg_of_align(3)?,
             },
-            0x02 => Operator::I16x8Load8x8U {
+            0x02 => Operator::V128Load8x8U {
                 memarg: self.read_memarg_of_align(3)?,
             },
-            0x03 => Operator::I32x4Load16x4S {
+            0x03 => Operator::V128Load16x4S {
                 memarg: self.read_memarg_of_align(3)?,
             },
-            0x04 => Operator::I32x4Load16x4U {
+            0x04 => Operator::V128Load16x4U {
                 memarg: self.read_memarg_of_align(3)?,
             },
-            0x05 => Operator::I64x2Load32x2S {
+            0x05 => Operator::V128Load32x2S {
                 memarg: self.read_memarg_of_align(3)?,
             },
-            0x06 => Operator::I64x2Load32x2U {
+            0x06 => Operator::V128Load32x2U {
                 memarg: self.read_memarg_of_align(3)?,
             },
-            0x07 => Operator::V8x16LoadSplat {
+            0x07 => Operator::V128Load8Splat {
                 memarg: self.read_memarg_of_align(0)?,
             },
-            0x08 => Operator::V16x8LoadSplat {
+            0x08 => Operator::V128Load16Splat {
                 memarg: self.read_memarg_of_align(1)?,
             },
-            0x09 => Operator::V32x4LoadSplat {
+            0x09 => Operator::V128Load32Splat {
                 memarg: self.read_memarg_of_align(2)?,
             },
-            0x0a => Operator::V64x2LoadSplat {
+            0x0a => Operator::V128Load64Splat {
                 memarg: self.read_memarg_of_align(3)?,
             },
             0x0b => Operator::V128Store {
@@ -1522,9 +1522,9 @@ impl<'a> BinaryReader<'a> {
                 for lane in &mut lanes {
                     *lane = self.read_lane_index(32)?
                 }
-                Operator::V8x16Shuffle { lanes }
+                Operator::I8x16Shuffle { lanes }
             }
-            0x0e => Operator::V8x16Swizzle,
+            0x0e => Operator::I8x16Swizzle,
             0x0f => Operator::I8x16Splat,
             0x10 => Operator::I16x8Splat,
             0x11 => Operator::I32x4Splat,
@@ -1632,11 +1632,11 @@ impl<'a> BinaryReader<'a> {
             0x6c => Operator::I8x16ShrS,
             0x6d => Operator::I8x16ShrU,
             0x6e => Operator::I8x16Add,
-            0x6f => Operator::I8x16AddSaturateS,
-            0x70 => Operator::I8x16AddSaturateU,
+            0x6f => Operator::I8x16AddSatS,
+            0x70 => Operator::I8x16AddSatU,
             0x71 => Operator::I8x16Sub,
-            0x72 => Operator::I8x16SubSaturateS,
-            0x73 => Operator::I8x16SubSaturateU,
+            0x72 => Operator::I8x16SubSatS,
+            0x73 => Operator::I8x16SubSatU,
             0x76 => Operator::I8x16MinS,
             0x77 => Operator::I8x16MinU,
             0x78 => Operator::I8x16MaxS,
@@ -1657,11 +1657,11 @@ impl<'a> BinaryReader<'a> {
             0x8c => Operator::I16x8ShrS,
             0x8d => Operator::I16x8ShrU,
             0x8e => Operator::I16x8Add,
-            0x8f => Operator::I16x8AddSaturateS,
-            0x90 => Operator::I16x8AddSaturateU,
+            0x8f => Operator::I16x8AddSatS,
+            0x90 => Operator::I16x8AddSatU,
             0x91 => Operator::I16x8Sub,
-            0x92 => Operator::I16x8SubSaturateS,
-            0x93 => Operator::I16x8SubSaturateU,
+            0x92 => Operator::I16x8SubSatS,
+            0x93 => Operator::I16x8SubSatU,
             0x95 => Operator::I16x8Mul,
             0x96 => Operator::I16x8MinS,
             0x97 => Operator::I16x8MinU,
@@ -1694,6 +1694,14 @@ impl<'a> BinaryReader<'a> {
             0xce => Operator::I64x2Add,
             0xd1 => Operator::I64x2Sub,
             0xd5 => Operator::I64x2Mul,
+            0xd8 => Operator::F32x4Ceil,
+            0xd9 => Operator::F32x4Floor,
+            0xda => Operator::F32x4Trunc,
+            0xdb => Operator::F32x4Nearest,
+            0xdc => Operator::F64x2Ceil,
+            0xdd => Operator::F64x2Floor,
+            0xde => Operator::F64x2Trunc,
+            0xdf => Operator::F64x2Nearest,
             0xe0 => Operator::F32x4Abs,
             0xe1 => Operator::F32x4Neg,
             0xe3 => Operator::F32x4Sqrt,
@@ -1703,6 +1711,8 @@ impl<'a> BinaryReader<'a> {
             0xe7 => Operator::F32x4Div,
             0xe8 => Operator::F32x4Min,
             0xe9 => Operator::F32x4Max,
+            0xea => Operator::F32x4PMin,
+            0xeb => Operator::F32x4PMax,
             0xec => Operator::F64x2Abs,
             0xed => Operator::F64x2Neg,
             0xef => Operator::F64x2Sqrt,
@@ -1712,6 +1722,8 @@ impl<'a> BinaryReader<'a> {
             0xf3 => Operator::F64x2Div,
             0xf4 => Operator::F64x2Min,
             0xf5 => Operator::F64x2Max,
+            0xf6 => Operator::F64x2PMin,
+            0xf7 => Operator::F64x2PMax,
             0xf8 => Operator::I32x4TruncSatF32x4S,
             0xf9 => Operator::I32x4TruncSatF32x4U,
             0xfa => Operator::F32x4ConvertI32x4S,

crates/wasmparser/src/operators_validator.rs

@@ -1385,12 +1385,16 @@ impl OperatorValidator {
             | Operator::F32x4Div
             | Operator::F32x4Min
             | Operator::F32x4Max
+            | Operator::F32x4PMin
+            | Operator::F32x4PMax
             | Operator::F64x2Add
             | Operator::F64x2Sub
             | Operator::F64x2Mul
             | Operator::F64x2Div
             | Operator::F64x2Min
-            | Operator::F64x2Max => {
+            | Operator::F64x2Max
+            | Operator::F64x2PMin
+            | Operator::F64x2PMax => {
                 self.check_non_deterministic_enabled()?;
                 self.check_simd_enabled()?;
                 self.pop_operand(Some(Type::V128))?;
@@ -1432,21 +1436,21 @@ impl OperatorValidator {
             | Operator::V128Or
             | Operator::V128Xor
             | Operator::I8x16Add
-            | Operator::I8x16AddSaturateS
-            | Operator::I8x16AddSaturateU
+            | Operator::I8x16AddSatS
+            | Operator::I8x16AddSatU
             | Operator::I8x16Sub
-            | Operator::I8x16SubSaturateS
-            | Operator::I8x16SubSaturateU
+            | Operator::I8x16SubSatS
+            | Operator::I8x16SubSatU
             | Operator::I8x16MinS
             | Operator::I8x16MinU
             | Operator::I8x16MaxS
             | Operator::I8x16MaxU
             | Operator::I16x8Add
-            | Operator::I16x8AddSaturateS
-            | Operator::I16x8AddSaturateU
+            | Operator::I16x8AddSatS
+            | Operator::I16x8AddSatU
             | Operator::I16x8Sub
-            | Operator::I16x8SubSaturateS
-            | Operator::I16x8SubSaturateU
+            | Operator::I16x8SubSatS
+            | Operator::I16x8SubSatU
             | Operator::I16x8Mul
             | Operator::I16x8MinS
             | Operator::I16x8MinU
@@ -1473,7 +1477,15 @@ impl OperatorValidator {
                 self.pop_operand(Some(Type::V128))?;
                 self.push_operand(Type::V128)?;
             }
-            Operator::F32x4Abs
+            Operator::F32x4Ceil
+            | Operator::F32x4Floor
+            | Operator::F32x4Trunc
+            | Operator::F32x4Nearest
+            | Operator::F64x2Ceil
+            | Operator::F64x2Floor
+            | Operator::F64x2Trunc
+            | Operator::F64x2Nearest
+            | Operator::F32x4Abs
             | Operator::F32x4Neg
             | Operator::F32x4Sqrt
             | Operator::F64x2Abs
@@ -1545,13 +1557,13 @@ impl OperatorValidator {
                 self.pop_operand(Some(Type::V128))?;
                 self.push_operand(Type::V128)?;
             }
-            Operator::V8x16Swizzle => {
+            Operator::I8x16Swizzle => {
                 self.check_simd_enabled()?;
                 self.pop_operand(Some(Type::V128))?;
                 self.pop_operand(Some(Type::V128))?;
                 self.push_operand(Type::V128)?;
             }
-            Operator::V8x16Shuffle { ref lanes } => {
+            Operator::I8x16Shuffle { ref lanes } => {
                 self.check_simd_enabled()?;
                 self.pop_operand(Some(Type::V128))?;
                 self.pop_operand(Some(Type::V128))?;
@@ -1560,31 +1572,31 @@ impl OperatorValidator {
                 }
                 self.push_operand(Type::V128)?;
             }
-            Operator::V8x16LoadSplat { memarg } => {
+            Operator::V128Load8Splat { memarg } => {
                 self.check_simd_enabled()?;
                 let ty = self.check_memarg(memarg, 0, resources)?;
                 self.pop_operand(Some(ty))?;
                 self.push_operand(Type::V128)?;
             }
-            Operator::V16x8LoadSplat { memarg } => {
+            Operator::V128Load16Splat { memarg } => {
                 self.check_simd_enabled()?;
                 let ty = self.check_memarg(memarg, 1, resources)?;
                 self.pop_operand(Some(ty))?;
                 self.push_operand(Type::V128)?;
             }
-            Operator::V32x4LoadSplat { memarg } => {
+            Operator::V128Load32Splat { memarg } => {
                 self.check_simd_enabled()?;
                 let ty = self.check_memarg(memarg, 2, resources)?;
                 self.pop_operand(Some(ty))?;
                 self.push_operand(Type::V128)?;
             }
-            Operator::V64x2LoadSplat { memarg }
-            | Operator::I16x8Load8x8S { memarg }
-            | Operator::I16x8Load8x8U { memarg }
-            | Operator::I32x4Load16x4S { memarg }
-            | Operator::I32x4Load16x4U { memarg }
-            | Operator::I64x2Load32x2S { memarg }
-            | Operator::I64x2Load32x2U { memarg } => {
+            Operator::V128Load64Splat { memarg }
+            | Operator::V128Load8x8S { memarg }
+            | Operator::V128Load8x8U { memarg }
+            | Operator::V128Load16x4S { memarg }
+            | Operator::V128Load16x4U { memarg }
+            | Operator::V128Load32x2S { memarg }
+            | Operator::V128Load32x2U { memarg } => {
                 self.check_simd_enabled()?;
                 let idx = self.check_memarg(memarg, 3, resources)?;
                 self.pop_operand(Some(idx))?;

crates/wasmparser/src/primitives.rs

@@ -692,11 +692,11 @@ pub enum Operator<'a> {
     I8x16ShrS,
     I8x16ShrU,
     I8x16Add,
-    I8x16AddSaturateS,
-    I8x16AddSaturateU,
+    I8x16AddSatS,
+    I8x16AddSatU,
     I8x16Sub,
-    I8x16SubSaturateS,
-    I8x16SubSaturateU,
+    I8x16SubSatS,
+    I8x16SubSatU,
     I8x16MinS,
     I8x16MinU,
     I8x16MaxS,
@@ -710,11 +710,11 @@ pub enum Operator<'a> {
     I16x8ShrS,
     I16x8ShrU,
     I16x8Add,
-    I16x8AddSaturateS,
-    I16x8AddSaturateU,
+    I16x8AddSatS,
+    I16x8AddSatU,
     I16x8Sub,
-    I16x8SubSaturateS,
-    I16x8SubSaturateU,
+    I16x8SubSatS,
+    I16x8SubSatU,
     I16x8Mul,
     I16x8MinS,
     I16x8MinU,
@@ -742,6 +742,14 @@ pub enum Operator<'a> {
     I64x2Add,
     I64x2Sub,
     I64x2Mul,
+    F32x4Ceil,
+    F32x4Floor,
+    F32x4Trunc,
+    F32x4Nearest,
+    F64x2Ceil,
+    F64x2Floor,
+    F64x2Trunc,
+    F64x2Nearest,
     F32x4Abs,
     F32x4Neg,
     F32x4Sqrt,
@@ -751,6 +759,8 @@ pub enum Operator<'a> {
     F32x4Div,
     F32x4Min,
     F32x4Max,
+    F32x4PMin,
+    F32x4PMax,
     F64x2Abs,
     F64x2Neg,
     F64x2Sqrt,
@@ -760,16 +770,18 @@ pub enum Operator<'a> {
     F64x2Div,
     F64x2Min,
     F64x2Max,
+    F64x2PMin,
+    F64x2PMax,
     I32x4TruncSatF32x4S,
     I32x4TruncSatF32x4U,
     F32x4ConvertI32x4S,
     F32x4ConvertI32x4U,
-    V8x16Swizzle,
-    V8x16Shuffle { lanes: [SIMDLaneIndex; 16] },
-    V8x16LoadSplat { memarg: MemoryImmediate },
-    V16x8LoadSplat { memarg: MemoryImmediate },
-    V32x4LoadSplat { memarg: MemoryImmediate },
-    V64x2LoadSplat { memarg: MemoryImmediate },
+    I8x16Swizzle,
+    I8x16Shuffle { lanes: [SIMDLaneIndex; 16] },
+    V128Load8Splat { memarg: MemoryImmediate },
+    V128Load16Splat { memarg: MemoryImmediate },
+    V128Load32Splat { memarg: MemoryImmediate },
+    V128Load64Splat { memarg: MemoryImmediate },
     I8x16NarrowI16x8S,
     I8x16NarrowI16x8U,
     I16x8NarrowI32x4S,
@@ -782,12 +794,12 @@ pub enum Operator<'a> {
     I32x4WidenHighI16x8S,
     I32x4WidenLowI16x8U,
     I32x4WidenHighI16x8U,
-    I16x8Load8x8S { memarg: MemoryImmediate },
-    I16x8Load8x8U { memarg: MemoryImmediate },
-    I32x4Load16x4S { memarg: MemoryImmediate },
-    I32x4Load16x4U { memarg: MemoryImmediate },
-    I64x2Load32x2S { memarg: MemoryImmediate },
-    I64x2Load32x2U { memarg: MemoryImmediate },
+    V128Load8x8S { memarg: MemoryImmediate },
+    V128Load8x8U { memarg: MemoryImmediate },
+    V128Load16x4S { memarg: MemoryImmediate },
+    V128Load16x4U { memarg: MemoryImmediate },
+    V128Load32x2S { memarg: MemoryImmediate },
+    V128Load32x2U { memarg: MemoryImmediate },
     I8x16RoundingAverageU,
     I16x8RoundingAverageU,
 }