Add timing paths export to Liberty

examples/timing_cell_dff.lib

@@ -0,0 +1,192 @@
+library (timing_cell_dff) {
+  comment                        : "";
+  delay_model                    : table_lookup;
+  simulation                     : false;
+  capacitive_load_unit (1,fF);
+  leakage_power_unit             : 1pW;
+  current_unit                   : "1mA";
+  pulling_resistance_unit        : "1kohm";
+  time_unit                      : "1ns";
+  voltage_unit                   : "1v";
+  library_features(report_delay_calculation);
+
+  input_threshold_pct_rise : 50;
+  input_threshold_pct_fall : 50;
+  output_threshold_pct_rise : 50;
+  output_threshold_pct_fall : 50;
+  slew_lower_threshold_pct_rise : 30;
+  slew_lower_threshold_pct_fall : 30;
+  slew_upper_threshold_pct_rise : 70;
+  slew_upper_threshold_pct_fall : 70;
+  slew_derate_from_library : 1.0;
+
+
+  nom_process                    : 1.0;
+  nom_temperature                : 125.0;
+  nom_voltage                    : 0.95;
+
+  lu_table_template(template_1) {
+    variable_1 : total_output_net_capacitance;
+    index_1("0.36562,  1.89781,  3.79562,  7.59125,  15.18250,  30.36500,  60.73000");
+  }
+
+  cell ("timing_cell_dff") {
+    area : 11.438 
+    is_macro_cell : true;
+    pin("in") {
+      direction : input;
+      capacitance : 0.9346;
+      timing() {
+        related_pin : "clk";
+        timing_type : hold_rising;
+	rise_constraint(scalar) {
+          values("-0.02757");
+	}
+	fall_constraint(scalar) {
+          values("-0.07072");
+	}
+        paths() {
+          slack : 0.02757;
+          fall_data_required() {
+            time: 0.00300;
+            vertex("r1", "DFF_X1", "r1/CK", "clk", "^", 0.00000, 0.00000, 1.64207, 0);
+          }
+          fall_data_arrival() {
+            time: 0.07373;
+            vertex("", "timing_cell_dff", "in", "", "v", 0.00000, 0.00000, 0.83524, 1);
+            vertex("u1", "BUF_X1", "u1/A", "in", "v", 0.00000, 0.00000, 0.83524, 0);
+            vertex("u1", "BUF_X1", "u1/Z", "w1", "v", 0.07373, 0.01504, 1.03013, 1);
+            vertex("r1", "DFF_X1", "r1/D", "w1", "v", 0.07373, 0.01504, 1.03013, 0);
+          }
+          rise_data_required() {
+            time: 0.01713;
+            vertex("r1", "DFF_X1", "r1/CK", "clk", "^", 0.00000, 0.00000, 1.81915, 0);
+          }
+          rise_data_arrival() {
+            time: 0.04470;
+            vertex("", "timing_cell_dff", "in", "", "^", 0.00000, 0.00000, 0.93456, 1);
+            vertex("u1", "BUF_X1", "u1/A", "in", "^", 0.00000, 0.00000, 0.93456, 0);
+            vertex("u1", "BUF_X1", "u1/Z", "w1", "^", 0.04470, 0.01908, 1.10913, 1);
+            vertex("r1", "DFF_X1", "r1/D", "w1", "^", 0.04470, 0.01908, 1.10913, 0);
+          }
+        }
+      }
+      timing() {
+        related_pin : "clk";
+        timing_type : setup_rising;
+	rise_constraint(scalar) {
+          values("0.11670");
+	}
+	fall_constraint(scalar) {
+          values("0.23045");
+	}
+        paths() {
+          slack : 9.76955;
+          fall_data_required() {
+            time: 9.84328;
+            vertex("r1", "DFF_X1", "r1/CK", "clk", "^", 0.00000, 0.00000, 1.64207, 0);
+          }
+          fall_data_arrival() {
+            time: 0.07373;
+            vertex("", "timing_cell_dff", "in", "", "v", 0.00000, 0.00000, 0.83524, 1);
+            vertex("u1", "BUF_X1", "u1/A", "in", "v", 0.00000, 0.00000, 0.83524, 0);
+            vertex("u1", "BUF_X1", "u1/Z", "w1", "v", 0.07373, 0.01504, 1.03013, 1);
+            vertex("r1", "DFF_X1", "r1/D", "w1", "v", 0.07373, 0.01504, 1.03013, 0);
+          }
+          rise_data_required() {
+            time: 9.92800;
+            vertex("r1", "DFF_X1", "r1/CK", "clk", "^", 0.00000, 0.00000, 1.81915, 0);
+          }
+          rise_data_arrival() {
+            time: 0.04470;
+            vertex("", "timing_cell_dff", "in", "", "^", 0.00000, 0.00000, 0.93456, 1);
+            vertex("u1", "BUF_X1", "u1/A", "in", "^", 0.00000, 0.00000, 0.93456, 0);
+            vertex("u1", "BUF_X1", "u1/Z", "w1", "^", 0.04470, 0.01908, 1.10913, 1);
+            vertex("r1", "DFF_X1", "r1/D", "w1", "^", 0.04470, 0.01908, 1.10913, 0);
+          }
+        }
+      }
+    }
+    pin("clk") {
+      direction : input;
+      clock : true;
+      capacitance : 1.8192;
+      timing() {
+        timing_sense : positive_unate;
+        timing_type : min_clock_tree_path;
+	cell_rise(scalar) {
+          values("0.00000");
+	}
+	cell_fall(scalar) {
+          values("0.00000");
+	}
+      }
+      timing() {
+        timing_sense : positive_unate;
+        timing_type : max_clock_tree_path;
+	cell_rise(scalar) {
+          values("0.00000");
+	}
+	cell_fall(scalar) {
+          values("0.00000");
+	}
+      }
+    }
+    pin("out") {
+      direction : output;
+      capacitance : 0.0000;
+      timing() {
+        related_pin : "clk";
+        timing_type : rising_edge;
+	cell_rise(template_1) {
+          index_1("0.36562,  1.89781,  3.79562,  7.59125,  15.18250,  30.36500,  60.73000");
+          values("0.29101,0.30130,0.31279,0.33950,0.39956,0.52522,0.77978");
+	}
+	rise_transition(template_1) {
+          index_1("0.36562,  1.89781,  3.79562,  7.59125,  15.18250,  30.36500,  60.73000");
+          values("0.01964,0.02937,0.04223,0.07118,0.13205,0.25458,0.49990");
+	}
+	cell_fall(template_1) {
+          index_1("0.36562,  1.89781,  3.79562,  7.59125,  15.18250,  30.36500,  60.73000");
+          values("0.23051,0.23926,0.24731,0.26050,0.28251,0.32097,0.39267");
+	}
+	fall_transition(template_1) {
+          index_1("0.36562,  1.89781,  3.79562,  7.59125,  15.18250,  30.36500,  60.73000");
+          values("0.01522,0.01891,0.02276,0.03000,0.04411,0.07298,0.13352");
+	}
+        paths() {
+          slack : 0.22842;
+          fall_clocked_output() {
+            time: 0.22842;
+            vertex("r2", "DFF_X1", "r2/CK", "clk", "^", 0.00000, 0.00000, 1.64207, 0);
+            vertex("r2", "DFF_X1", "r2/Q", "out", "v", 0.22842, 0.01434, 0.00000, 1);
+            vertex("", "timing_cell_dff", "out", "", "v", 0.22842, 0.01434, 0.00000, 0);
+          }
+          rise_clocked_output() {
+            time: 0.28855;
+            vertex("r2", "DFF_X1", "r2/CK", "clk", "^", 0.00000, 0.00000, 1.81915, 0);
+            vertex("r2", "DFF_X1", "r2/Q", "out", "^", 0.28855, 0.01732, 0.00000, 1);
+            vertex("", "timing_cell_dff", "out", "", "^", 0.28855, 0.01732, 0.00000, 0);
+          }
+        }
+      }
+    }
+    worst_slack_path() {
+      slack : 0.09420;
+      rise_data_arrival() {
+        time: 0.11136;
+        vertex("r1", "DFF_X1", "r1/Q", "w2", "^", 0.00000, 0.02325, 0.93456, 1);
+        vertex("u2", "BUF_X1", "u2/A", "w2", "^", 0.00000, 0.02325, 0.93456, 0);
+        vertex("u2", "BUF_X1", "u2/Z", "w3", "^", 0.05639, 0.01783, 0.93456, 1);
+        vertex("u3", "BUF_X1", "u3/A", "w3", "^", 0.05639, 0.01783, 0.93456, 0);
+        vertex("u3", "BUF_X1", "u3/Z", "w4", "^", 0.11136, 0.01913, 1.10913, 1);
+        vertex("r2", "DFF_X1", "r2/D", "w4", "^", 0.11136, 0.01913, 1.10913, 0);
+      }
+      rise_data_required() {
+        time: 0.01716;
+        vertex("r2", "DFF_X1", "r2/CK", "clk", "^", 0.00000, 0.00000, 1.81915, 0);
+      }
+    }
+  }
+
+}

examples/timing_cell_dff.tcl

@@ -0,0 +1,8 @@
+# timing cell dff example
+read_liberty nangate45_slow.lib.gz
+read_verilog timing_cell_dff.v
+link_design timing_cell_dff
+create_clock -name clk -period 10 {clk}
+set_input_delay -clock clk 0 {in}
+write_timing_model -paths timing_cell_dff.lib
+report_checks -path_delay min_rise -from r1/Q

examples/timing_cell_dff.v

@@ -0,0 +1,16 @@
+module timing_cell_dff (in, clk, out);
+
+  input in, clk;
+  output out;
+  wire w1, w2, w3, w4;
+
+  BUF_X1 u1 (.A(in), .Z(w1));
+
+  DFF_X1 r1 (.D(w1), .CK(clk), .Q(w2));
+
+  BUF_X1 u2 (.A(w2), .Z(w3));
+  BUF_X1 u3 (.A(w3), .Z(w4));
+
+  DFF_X1 r2 (.D(w4), .CK(clk), .Q(out));
+
+endmodule

include/sta/Liberty.hh

@@ -36,6 +36,7 @@
 #include "Transition.hh"
 #include "Delay.hh"
 #include "LibertyClass.hh"
+#include "TimingArc.hh"
 
 namespace sta {
 
@@ -561,6 +562,13 @@ public:
   const char *userFunctionClass() const;
   void setUserFunctionClass(const char *user_function_class);
 
+  void setWorstSlackTimingPath(const InputRegisterTimingPath& timing_path,
+                               const MinMax *min_max,
+                               const RiseFall *rise_fall);
+  const InputRegisterTimingPath &getWorstSlackTimingPath(const MinMax *min_max,
+                                                         const RiseFall *rise_fall) const;
+  bool hasWorstSlackTimingPaths() const;
+
 protected:
   void addPort(ConcretePort *port);
   void setHasInternalPorts(bool has_internal);
@@ -652,6 +660,8 @@ protected:
   std::mutex waveform_lock_;
   std::string footprint_;
   std::string user_function_class_;
+  float worst_slack_{std::numeric_limits<float>::max()};
+  std::array<std::array<InputRegisterTimingPath, 2>, 2> worst_slack_timing_paths_;
 
 private:
   friend class LibertyLibrary;

include/sta/LibertyWriter.hh

@@ -33,6 +33,7 @@ class StaState;
 void
 writeLiberty(LibertyLibrary *lib,
              const char *filename,
-             StaState *sta);
+             StaState *sta,
+             bool write_timing_paths);
 
 } // namespace

include/sta/Sta.hh

@@ -1248,7 +1248,8 @@ public:
                         const char *cell_name,
                         const char *filename,
                         const Corner *corner,
-			const bool scalar);
+			const bool scalar,
+			const bool paths);
 
   // Find equivalent cells in equiv_libs.
   // Optionally add mappings for cells in map_libs.

include/sta/TimingArc.hh

@@ -25,11 +25,14 @@
 #pragma once
 
 #include <memory>
+#include <unordered_map>
+#include <limits>
 
 #include "Vector.hh"
 #include "Transition.hh"
 #include "Delay.hh"
 #include "LibertyClass.hh"
+#include "TimingRole.hh"
 
 namespace sta {
 
@@ -93,6 +96,58 @@ timingTypeScaleFactorType(TimingType type);
 
 ////////////////////////////////////////////////////////////////
 
+struct TimingPathVertex
+{
+  std::string instance;
+  std::string cell;
+  std::string pin;
+  std::string net;
+  std::string transition;
+  float arrival;
+  float slew;
+  float capacitance;
+  bool is_driver;
+};
+
+struct TimingPath
+{
+  std::string name{};
+  std::vector<TimingPathVertex> vertices{};
+  float time{0.0f};
+  const RiseFall* rise_fall;
+
+  struct Names
+  {
+    static constexpr std::array<const char*, 2> DATA_ARRIVAL{"rise_data_arrival", "fall_data_arrival"};
+    static constexpr std::array<const char*, 2> DATA_REQUIRED{"rise_data_required", "fall_data_required"};
+    static constexpr std::array<const char*, 2> CLOCKED_OUTPUT{"rise_clocked_output", "fall_clocked_output"};
+    static constexpr std::array<const char*, 2> COMBINATIONAL{"rise_combinational", "fall_combinational"};
+  };
+
+  inline static const std::unordered_map<const TimingRole*, std::array<const char*, 2>> ROLE_PATH_MAPPINGS =
+  {
+    {TimingRole::regClkToQ(), Names::CLOCKED_OUTPUT},
+    {TimingRole::combinational(), Names::COMBINATIONAL},
+    {TimingRole::setup(), Names::DATA_ARRIVAL},
+    {TimingRole::hold(), Names::DATA_ARRIVAL}
+  };
+};
+
+struct InputRegisterTimingPath
+{
+  float slack{std::numeric_limits<float>::max()};
+  TimingPath data_arrival_path{};
+  TimingPath data_required_path{};
+};
+
+struct CombinationalTimingPath
+{
+  float slack{std::numeric_limits<float>::max()};
+  TimingPath combinational_delay_path{};
+};
+
+////////////////////////////////////////////////////////////////
+
 class TimingArcAttrs
 {
 public:
@@ -120,6 +175,11 @@ public:
 		TimingModel *model);
   float ocvArcDepth() const { return ocv_arc_depth_; }
   void setOcvArcDepth(float depth);
+  void setSlack(float slack);
+  void mergeSlack(float slack);
+  void addTimingPath(TimingPath timing_path);
+  float slack() const { return slack_; }
+  const std::unordered_map<std::string, TimingPath>& timingPaths() const { return timing_paths_; }
 
 protected:
   TimingType timing_type_;
@@ -132,6 +192,8 @@ protected:
   const char *mode_value_;
   float ocv_arc_depth_;
   TimingModel *models_[RiseFall::index_count];
+  float slack_{std::numeric_limits<float>::max()};
+  std::unordered_map<std::string, TimingPath> timing_paths_;
 };
 
 // A timing arc set is a group of related timing arcs between from/to
@@ -184,6 +246,10 @@ public:
   const char *sdfCondEnd() const { return attrs_->sdfCondEnd(); }
   const char *modeName() const { return attrs_->modeName(); }
   const char *modeValue() const { return attrs_->modeValue(); }
+  float slack() const { return attrs_->slack(); }
+  bool hasTimingPaths() const { return !attrs_->timingPaths().empty(); }
+  const std::unordered_map<std::string, TimingPath>& timingPaths() const { return attrs_->timingPaths(); }
+
   // Timing arc set index in cell.
   TimingArcIndex index() const { return index_; }
   bool isDisabledConstraint() const { return is_disabled_constraint_; }