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4 | 4 | ; RUN: spirv-val %t.spv |
5 | 5 | ; RUN: llvm-spirv -r %t.spv -o - | llvm-dis -o - | FileCheck %s --check-prefix=CHECK-LLVM |
6 | 6 |
|
7 | | -; RUN: llvm-spirv -spirv-text %t.bc --spirv-max-version=1.6 |
8 | | -; FileCheck < %t.spt %s --check-prefixes=CHECK-SPIRV,CHECK-SPIRV-16 |
| 7 | +; The next 2 lines do not check the individual flags for each fcmp. Only for 'r1', 'r2' and 'r6'. |
| 8 | +; RUN: llvm-spirv -spirv-text %t.bc --spirv-max-version=1.6 -o - | FileCheck %s --check-prefixes=CHECK-SPIRV,CHECK-SPIRV-16,CHECK-SPIRV-16-DEFAULT |
| 9 | +; RUN: llvm-spirv -spirv-text %t.bc --spirv-max-version=1.6 --spirv-ext=+SPV_KHR_float_controls2 -o - | FileCheck %s --check-prefixes=CHECK-SPIRV,CHECK-SPIRV-16,CHECK-SPIRV-16-FC2 |
| 10 | + |
9 | 11 | ; RUN: llvm-spirv %t.bc --spirv-max-version=1.6 -o %t.spv |
| 12 | +; RUN: llvm-spirv %t.bc --spirv-max-version=1.6 --spirv-ext=+SPV_KHR_float_controls2 -o %t.fc2.spv |
10 | 13 | ; RUN: spirv-val %t.spv |
11 | | -; RUN: llvm-spirv -r %t.spv -o - | llvm-dis -o %t.rev.ll |
12 | | -; RUN: FileCheck < %t.rev.ll %s --check-prefix=CHECK-LLVM-16 |
| 14 | +; RUN: spirv-val %t.fc2.spv |
| 15 | +; RUN: llvm-spirv -r %t.spv -o - | llvm-dis -o - | FileCheck %s --check-prefixes=CHECK-LLVM-16,CHECK-LLVM-16-DEFAULT |
| 16 | +; RUN: llvm-spirv -r %t.fc2.spv -o - | llvm-dis -o - | FileCheck %s --check-prefixes=CHECK-LLVM-16,CHECK-LLVM-16-FC2 |
13 | 17 |
|
14 | 18 | ; CHECK-SPIRV: 3 Name [[#r1:]] "r1" |
15 | 19 | ; CHECK-SPIRV: 3 Name [[#r2:]] "r2" |
|
104 | 108 | ; CHECK-SPIRV-15-NOT: 4 Decorate {{.*}} FPFastMathMode |
105 | 109 | ; CHECK-SPIRV-16-NOT: 4 Decorate [[#r1]] FPFastMathMode |
106 | 110 | ; CHECK-SPIRV-16: Decorate [[#r2]] FPFastMathMode 1 |
| 111 | +; CHECK-SPIRV-16-DEFAULT: Decorate [[#r6]] FPFastMathMode 16 |
| 112 | +; CHECK-SPIRV-16-FC2: Decorate [[#r6]] FPFastMathMode 458767 |
107 | 113 | ; CHECK-SPIRV: 2 TypeBool [[#bool:]] |
108 | 114 | ; CHECK-SPIRV: 5 FOrdEqual [[#bool]] [[#r1]] |
109 | 115 | ; CHECK-SPIRV: 5 FOrdEqual [[#bool]] [[#r2]] |
|
293 | 299 | ; CHECK-LLVM-16: %r3 = fcmp ninf oeq float %a, %b |
294 | 300 | ; CHECK-LLVM-16: %r4 = fcmp nsz oeq float %a, %b |
295 | 301 | ; CHECK-LLVM-16: %r5 = fcmp arcp oeq float %a, %b |
296 | | -; CHECK-LLVM-16: %r6 = fcmp fast oeq float %a, %b |
| 302 | +; CHECK-LLVM-16-DEFAULT: %r6 = fcmp fast oeq float %a, %b |
| 303 | +; CHECK-LLVM-16-FC2: %r6 = fcmp reassoc nnan ninf nsz arcp contract oeq float %a, %b |
297 | 304 | ; CHECK-LLVM-16: %r7 = fcmp nnan ninf oeq float %a, %b |
298 | 305 | ; CHECK-LLVM-16: %r8 = fcmp one float %a, %b |
299 | 306 | ; CHECK-LLVM-16: %r9 = fcmp nnan one float %a, %b |
300 | 307 | ; CHECK-LLVM-16: %r10 = fcmp ninf one float %a, %b |
301 | 308 | ; CHECK-LLVM-16: %r11 = fcmp nsz one float %a, %b |
302 | 309 | ; CHECK-LLVM-16: %r12 = fcmp arcp one float %a, %b |
303 | | -; CHECK-LLVM-16: %r13 = fcmp fast one float %a, %b |
| 310 | +; CHECK-LLVM-16-DEFAULT: %r13 = fcmp fast one float %a, %b |
| 311 | +; CHECK-LLVM-16-FC2: %r13 = fcmp reassoc nnan ninf nsz arcp contract one float %a, %b |
304 | 312 | ; CHECK-LLVM-16: %r14 = fcmp nnan ninf one float %a, %b |
305 | 313 | ; CHECK-LLVM-16: %r15 = fcmp olt float %a, %b |
306 | 314 | ; CHECK-LLVM-16: %r16 = fcmp nnan olt float %a, %b |
307 | 315 | ; CHECK-LLVM-16: %r17 = fcmp ninf olt float %a, %b |
308 | 316 | ; CHECK-LLVM-16: %r18 = fcmp nsz olt float %a, %b |
309 | 317 | ; CHECK-LLVM-16: %r19 = fcmp arcp olt float %a, %b |
310 | | -; CHECK-LLVM-16: %r20 = fcmp fast olt float %a, %b |
| 318 | +; CHECK-LLVM-16-DEFAULT: %r20 = fcmp fast olt float %a, %b |
| 319 | +; CHECK-LLVM-16-FC2: %r20 = fcmp reassoc nnan ninf nsz arcp contract olt float %a, %b |
311 | 320 | ; CHECK-LLVM-16: %r21 = fcmp nnan ninf olt float %a, %b |
312 | 321 | ; CHECK-LLVM-16: %r22 = fcmp ogt float %a, %b |
313 | 322 | ; CHECK-LLVM-16: %r23 = fcmp nnan ogt float %a, %b |
314 | 323 | ; CHECK-LLVM-16: %r24 = fcmp ninf ogt float %a, %b |
315 | 324 | ; CHECK-LLVM-16: %r25 = fcmp nsz ogt float %a, %b |
316 | 325 | ; CHECK-LLVM-16: %r26 = fcmp arcp ogt float %a, %b |
317 | | -; CHECK-LLVM-16: %r27 = fcmp fast ogt float %a, %b |
| 326 | +; CHECK-LLVM-16-DEFAULT: %r27 = fcmp fast ogt float %a, %b |
| 327 | +; CHECK-LLVM-16-FC2: %r27 = fcmp reassoc nnan ninf nsz arcp contract ogt float %a, %b |
318 | 328 | ; CHECK-LLVM-16: %r28 = fcmp nnan ninf ogt float %a, %b |
319 | 329 | ; CHECK-LLVM-16: %r29 = fcmp ole float %a, %b |
320 | 330 | ; CHECK-LLVM-16: %r30 = fcmp nnan ole float %a, %b |
321 | 331 | ; CHECK-LLVM-16: %r31 = fcmp ninf ole float %a, %b |
322 | 332 | ; CHECK-LLVM-16: %r32 = fcmp nsz ole float %a, %b |
323 | 333 | ; CHECK-LLVM-16: %r33 = fcmp arcp ole float %a, %b |
324 | | -; CHECK-LLVM-16: %r34 = fcmp fast ole float %a, %b |
| 334 | +; CHECK-LLVM-16-DEFAULT: %r34 = fcmp fast ole float %a, %b |
| 335 | +; CHECK-LLVM-16-FC2: %r34 = fcmp reassoc nnan ninf nsz arcp contract ole float %a, %b |
325 | 336 | ; CHECK-LLVM-16: %r35 = fcmp nnan ninf ole float %a, %b |
326 | 337 | ; CHECK-LLVM-16: %r36 = fcmp oge float %a, %b |
327 | 338 | ; CHECK-LLVM-16: %r37 = fcmp nnan oge float %a, %b |
328 | 339 | ; CHECK-LLVM-16: %r38 = fcmp ninf oge float %a, %b |
329 | 340 | ; CHECK-LLVM-16: %r39 = fcmp nsz oge float %a, %b |
330 | 341 | ; CHECK-LLVM-16: %r40 = fcmp arcp oge float %a, %b |
331 | | -; CHECK-LLVM-16: %r41 = fcmp fast oge float %a, %b |
| 342 | +; CHECK-LLVM-16-DEFAULT: %r41 = fcmp fast oge float %a, %b |
| 343 | +; CHECK-LLVM-16-FC2: %r41 = fcmp reassoc nnan ninf nsz arcp contract oge float %a, %b |
332 | 344 | ; CHECK-LLVM-16: %r42 = fcmp nnan ninf oge float %a, %b |
333 | 345 | ; CHECK-LLVM-16: %r43 = fcmp ord float %a, %b |
334 | 346 | ; CHECK-LLVM-16: %r44 = fcmp ninf ord float %a, %b |
|
338 | 350 | ; CHECK-LLVM-16: %r48 = fcmp ninf ueq float %a, %b |
339 | 351 | ; CHECK-LLVM-16: %r49 = fcmp nsz ueq float %a, %b |
340 | 352 | ; CHECK-LLVM-16: %r50 = fcmp arcp ueq float %a, %b |
341 | | -; CHECK-LLVM-16: %r51 = fcmp fast ueq float %a, %b |
| 353 | +; CHECK-LLVM-16-DEFAULT: %r51 = fcmp fast ueq float %a, %b |
| 354 | +; CHECK-LLVM-16-FC2: %r51 = fcmp reassoc nnan ninf nsz arcp contract ueq float %a, %b |
342 | 355 | ; CHECK-LLVM-16: %r52 = fcmp nnan ninf ueq float %a, %b |
343 | 356 | ; CHECK-LLVM-16: %r53 = fcmp une float %a, %b |
344 | 357 | ; CHECK-LLVM-16: %r54 = fcmp nnan une float %a, %b |
345 | 358 | ; CHECK-LLVM-16: %r55 = fcmp ninf une float %a, %b |
346 | 359 | ; CHECK-LLVM-16: %r56 = fcmp nsz une float %a, %b |
347 | 360 | ; CHECK-LLVM-16: %r57 = fcmp arcp une float %a, %b |
348 | | -; CHECK-LLVM-16: %r58 = fcmp fast une float %a, %b |
| 361 | +; CHECK-LLVM-16-DEFAULT: %r58 = fcmp fast une float %a, %b |
| 362 | +; CHECK-LLVM-16-FC2: %r58 = fcmp reassoc nnan ninf nsz arcp contract une float %a, %b |
349 | 363 | ; CHECK-LLVM-16: %r59 = fcmp nnan ninf une float %a, %b |
350 | 364 | ; CHECK-LLVM-16: %r60 = fcmp ult float %a, %b |
351 | 365 | ; CHECK-LLVM-16: %r61 = fcmp nnan ult float %a, %b |
352 | 366 | ; CHECK-LLVM-16: %r62 = fcmp ninf ult float %a, %b |
353 | 367 | ; CHECK-LLVM-16: %r63 = fcmp nsz ult float %a, %b |
354 | 368 | ; CHECK-LLVM-16: %r64 = fcmp arcp ult float %a, %b |
355 | | -; CHECK-LLVM-16: %r65 = fcmp fast ult float %a, %b |
| 369 | +; CHECK-LLVM-16-DEFAULT: %r65 = fcmp fast ult float %a, %b |
| 370 | +; CHECK-LLVM-16-FC2: %r65 = fcmp reassoc nnan ninf nsz arcp contract ult float %a, %b |
356 | 371 | ; CHECK-LLVM-16: %r66 = fcmp nnan ninf ult float %a, %b |
357 | 372 | ; CHECK-LLVM-16: %r67 = fcmp ugt float %a, %b |
358 | 373 | ; CHECK-LLVM-16: %r68 = fcmp nnan ugt float %a, %b |
359 | 374 | ; CHECK-LLVM-16: %r69 = fcmp ninf ugt float %a, %b |
360 | 375 | ; CHECK-LLVM-16: %r70 = fcmp nsz ugt float %a, %b |
361 | 376 | ; CHECK-LLVM-16: %r71 = fcmp arcp ugt float %a, %b |
362 | | -; CHECK-LLVM-16: %r72 = fcmp fast ugt float %a, %b |
| 377 | +; CHECK-LLVM-16-DEFAULT: %r72 = fcmp fast ugt float %a, %b |
| 378 | +; CHECK-LLVM-16-FC2: %r72 = fcmp reassoc nnan ninf nsz arcp contract ugt float %a, %b |
363 | 379 | ; CHECK-LLVM-16: %r73 = fcmp nnan ninf ugt float %a, %b |
364 | 380 | ; CHECK-LLVM-16: %r74 = fcmp ule float %a, %b |
365 | 381 | ; CHECK-LLVM-16: %r75 = fcmp nnan ule float %a, %b |
366 | 382 | ; CHECK-LLVM-16: %r76 = fcmp ninf ule float %a, %b |
367 | 383 | ; CHECK-LLVM-16: %r77 = fcmp nsz ule float %a, %b |
368 | 384 | ; CHECK-LLVM-16: %r78 = fcmp arcp ule float %a, %b |
369 | | -; CHECK-LLVM-16: %r79 = fcmp fast ule float %a, %b |
| 385 | +; CHECK-LLVM-16-DEFAULT: %r79 = fcmp fast ule float %a, %b |
| 386 | +; CHECK-LLVM-16-FC2: %r79 = fcmp reassoc nnan ninf nsz arcp contract ule float %a, %b |
370 | 387 | ; CHECK-LLVM-16: %r80 = fcmp nnan ninf ule float %a, %b |
371 | 388 | ; CHECK-LLVM-16: %r81 = fcmp uge float %a, %b |
372 | 389 | ; CHECK-LLVM-16: %r82 = fcmp nnan uge float %a, %b |
373 | 390 | ; CHECK-LLVM-16: %r83 = fcmp ninf uge float %a, %b |
374 | 391 | ; CHECK-LLVM-16: %r84 = fcmp nsz uge float %a, %b |
375 | 392 | ; CHECK-LLVM-16: %r85 = fcmp arcp uge float %a, %b |
376 | | -; CHECK-LLVM-16: %r86 = fcmp fast uge float %a, %b |
| 393 | +; CHECK-LLVM-16-DEFAULT: %r86 = fcmp fast uge float %a, %b |
| 394 | +; CHECK-LLVM-16-FC2: %r86 = fcmp reassoc nnan ninf nsz arcp contract uge float %a, %b |
377 | 395 | ; CHECK-LLVM-16: %r87 = fcmp nnan ninf uge float %a, %b |
378 | 396 | ; CHECK-LLVM-16: %r88 = fcmp uno float %a, %b |
379 | 397 | ; CHECK-LLVM-16: %r89 = fcmp ninf uno float %a, %b |
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