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jmmartinezjmmartinez
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[Review] Add test showing reassoc->AllowTransform->reassoc contract
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6 files changed

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6 files changed

+43
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‎test/transcoding/fadd.ll‎

Lines changed: 7 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -16,6 +16,7 @@
1616
; CHECK-SPIRV: 3 Name [[#r6:]] "r6"
1717
; CHECK-SPIRV: 3 Name [[#r7:]] "r7"
1818
; CHECK-SPIRV: 3 Name [[#r8:]] "r8"
19+
; CHECK-SPIRV: 3 Name [[#r9:]] "r9"
1920
; CHECK-SPIRV-NOT: 4 Decorate [[#r1]] FPFastMathMode
2021
; CHECK-SPIRV-DAG: 4 Decorate [[#r2]] FPFastMathMode 1
2122
; CHECK-SPIRV-DAG: 4 Decorate [[#r3]] FPFastMathMode 2
@@ -26,6 +27,8 @@
2627
; CHECK-SPIRV-DAG: 4 Decorate [[#r7]] FPFastMathMode 3
2728
; CHECK-SPIRV-DEFAULT-NOT: 4 Decorate [[#r8]] FPFastMathMode
2829
; CHECK-SPIRV-FC2-DAG: 4 Decorate [[#r8]] FPFastMathMode 65536
30+
; CHECK-SPIRV-DEFAULT-NOT: 4 Decorate [[#r9]] FPFastMathMode
31+
; CHECK-SPIRV-FC2-DAG: 4 Decorate [[#r9]] FPFastMathMode 458752
2932
; CHECK-SPIRV: 3 TypeFloat [[float:[0-9]+]] 32
3033
; CHECK-SPIRV: 5 FAdd [[float]] [[#r1]]
3134
; CHECK-SPIRV: 5 FAdd [[float]] [[#r2]]
@@ -35,6 +38,7 @@
3538
; CHECK-SPIRV: 5 FAdd [[float]] [[#r6]]
3639
; CHECK-SPIRV: 5 FAdd [[float]] [[#r7]]
3740
; CHECK-SPIRV: 5 FAdd [[float]] [[#r8]]
41+
; CHECK-SPIRV: 5 FAdd [[float]] [[#r9]]
3842

3943
; CHECK-LLVM: %r1 = fadd float %a, %b
4044
; CHECK-LLVM: %r2 = fadd nnan float %a, %b
@@ -46,6 +50,8 @@
4650
; CHECK-LLVM: %r7 = fadd nnan ninf float %a, %b
4751
; CHECK-LLVM-DEFAULT: %r8 = fadd float %a, %b
4852
; CHECK-LLVM-FC2: %r8 = fadd contract float %a, %b
53+
; CHECK-LLVM-DEFAULT: %r9 = fadd float %a, %b
54+
; CHECK-LLVM-FC2: %r9 = fadd reassoc contract float %a, %b
4955

5056
target datalayout = "e-p:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024"
5157
target triple = "spir-unknown-unknown"
@@ -61,6 +67,7 @@ entry:
6167
%r6 = fadd fast float %a, %b
6268
%r7 = fadd nnan ninf float %a, %b
6369
%r8 = fadd contract float %a, %b
70+
%r9 = fadd reassoc float %a, %b
6471
ret void
6572
}
6673

‎test/transcoding/fdiv.ll‎

Lines changed: 7 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -16,6 +16,7 @@
1616
; CHECK-SPIRV: 3 Name [[#r6:]] "r6"
1717
; CHECK-SPIRV: 3 Name [[#r7:]] "r7"
1818
; CHECK-SPIRV: 3 Name [[#r8:]] "r8"
19+
; CHECK-SPIRV: 3 Name [[#r9:]] "r9"
1920
; CHECK-SPIRV-NOT: 4 Decorate [[#r1]] FPFastMathMode
2021
; CHECK-SPIRV-DAG: 4 Decorate [[#r2]] FPFastMathMode 1
2122
; CHECK-SPIRV-DAG: 4 Decorate [[#r3]] FPFastMathMode 2
@@ -26,6 +27,8 @@
2627
; CHECK-SPIRV-DAG: 4 Decorate [[#r7]] FPFastMathMode 3
2728
; CHECK-SPIRV-DEFAULT-NOT: 4 Decorate [[#r8]] FPFastMathMode
2829
; CHECK-SPIRV-FC2-DAG: 4 Decorate [[#r8]] FPFastMathMode 65536
30+
; CHECK-SPIRV-DEFAULT-NOT: 4 Decorate [[#r9]] FPFastMathMode
31+
; CHECK-SPIRV-FC2-DAG: 4 Decorate [[#r9]] FPFastMathMode 458752
2932
; CHECK-SPIRV: 3 TypeFloat [[float:[0-9]+]] 32
3033
; CHECK-SPIRV: 5 FDiv [[float]] [[#r1]]
3134
; CHECK-SPIRV: 5 FDiv [[float]] [[#r2]]
@@ -35,6 +38,7 @@
3538
; CHECK-SPIRV: 5 FDiv [[float]] [[#r6]]
3639
; CHECK-SPIRV: 5 FDiv [[float]] [[#r7]]
3740
; CHECK-SPIRV: 5 FDiv [[float]] [[#r8]]
41+
; CHECK-SPIRV: 5 FDiv [[float]] [[#r9]]
3842

3943
; CHECK-LLVM: %r1 = fdiv float %a, %b
4044
; CHECK-LLVM: %r2 = fdiv nnan float %a, %b
@@ -46,6 +50,8 @@
4650
; CHECK-LLVM: %r7 = fdiv nnan ninf float %a, %b
4751
; CHECK-LLVM-DEFAULT: %r8 = fdiv float %a, %b
4852
; CHECK-LLVM-FC2: %r8 = fdiv contract float %a, %b
53+
; CHECK-LLVM-DEFAULT: %r9 = fdiv float %a, %b
54+
; CHECK-LLVM-FC2: %r9 = fdiv reassoc contract float %a, %b
4955

5056
target datalayout = "e-p:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024"
5157
target triple = "spir-unknown-unknown"
@@ -61,6 +67,7 @@ entry:
6167
%r6 = fdiv fast float %a, %b
6268
%r7 = fdiv nnan ninf float %a, %b
6369
%r8 = fdiv contract float %a, %b
70+
%r9 = fdiv reassoc float %a, %b
6471
ret void
6572
}
6673

‎test/transcoding/fmul.ll‎

Lines changed: 7 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -16,6 +16,7 @@
1616
; CHECK-SPIRV: 3 Name [[#r6:]] "r6"
1717
; CHECK-SPIRV: 3 Name [[#r7:]] "r7"
1818
; CHECK-SPIRV: 3 Name [[#r8:]] "r8"
19+
; CHECK-SPIRV: 3 Name [[#r9:]] "r9"
1920
; CHECK-SPIRV-NOT: 4 Decorate [[#r1]] FPFastMathMode
2021
; CHECK-SPIRV-DAG: 4 Decorate [[#r2]] FPFastMathMode 1
2122
; CHECK-SPIRV-DAG: 4 Decorate [[#r3]] FPFastMathMode 2
@@ -26,6 +27,8 @@
2627
; CHECK-SPIRV-DAG: 4 Decorate [[#r7]] FPFastMathMode 3
2728
; CHECK-SPIRV-DEFAULT-NOT: 4 Decorate [[#r8]] FPFastMathMode
2829
; CHECK-SPIRV-FC2-DAG: 4 Decorate [[#r8]] FPFastMathMode 65536
30+
; CHECK-SPIRV-DEFAULT-NOT: 4 Decorate [[#r9]] FPFastMathMode
31+
; CHECK-SPIRV-FC2-DAG: 4 Decorate [[#r9]] FPFastMathMode 458752
2932
; CHECK-SPIRV: 3 TypeFloat [[float:[0-9]+]] 32
3033
; CHECK-SPIRV: 5 FMul [[float]] [[#r1]]
3134
; CHECK-SPIRV: 5 FMul [[float]] [[#r2]]
@@ -35,6 +38,7 @@
3538
; CHECK-SPIRV: 5 FMul [[float]] [[#r6]]
3639
; CHECK-SPIRV: 5 FMul [[float]] [[#r7]]
3740
; CHECK-SPIRV: 5 FMul [[float]] [[#r8]]
41+
; CHECK-SPIRV: 5 FMul [[float]] [[#r9]]
3842

3943
; CHECK-LLVM: %r1 = fmul float %a, %b
4044
; CHECK-LLVM: %r2 = fmul nnan float %a, %b
@@ -46,6 +50,8 @@
4650
; CHECK-LLVM: %r7 = fmul nnan ninf float %a, %b
4751
; CHECK-LLVM-DEFAULT: %r8 = fmul float %a, %b
4852
; CHECK-LLVM-FC2: %r8 = fmul contract float %a, %b
53+
; CHECK-LLVM-DEFAULT: %r9 = fmul float %a, %b
54+
; CHECK-LLVM-FC2: %r9 = fmul reassoc contract float %a, %b
4955

5056
target datalayout = "e-p:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024"
5157
target triple = "spir-unknown-unknown"
@@ -61,6 +67,7 @@ entry:
6167
%r6 = fmul fast float %a, %b
6268
%r7 = fmul nnan ninf float %a, %b
6369
%r8 = fmul contract float %a, %b
70+
%r9 = fmul reassoc float %a, %b
6471
ret void
6572
}
6673

‎test/transcoding/fneg.ll‎

Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -23,6 +23,7 @@
2323
; CHECK-SPIRV: 3 Name [[#r6:]] "r6"
2424
; CHECK-SPIRV: 3 Name [[#r7:]] "r7"
2525
; CHECK-SPIRV: 3 Name [[#r8:]] "r8"
26+
; CHECK-SPIRV: 3 Name [[#r9:]] "r9"
2627
; CHECK-SPIRV-15-NOT: 4 Decorate {{.*}} FPFastMathMode
2728

2829
; CHECK-SPIRV-16-NOT: Decorate [[#r1]] FPFastMathMode
@@ -35,6 +36,8 @@
3536
; CHECK-SPIRV-16-DAG: Decorate [[#r7]] FPFastMathMode 3
3637
; CHECK-SPIRV-16-DEFAULT-NOT: Decorate [[#r8]] FPFastMathMode
3738
; CHECK-SPIRV-16-FC2-DAG: Decorate [[#r8]] FPFastMathMode 65536
39+
; CHECK-SPIRV-16-DEFAULT-NOT: Decorate [[#r9]] FPFastMathMode
40+
; CHECK-SPIRV-16-FC2-DAG: Decorate [[#r9]] FPFastMathMode 458752
3841

3942
; CHECK-SPIRV: 3 TypeFloat [[float:[0-9]+]] 32
4043
; CHECK-SPIRV: 4 FNegate [[float]] [[#r1]]
@@ -45,6 +48,7 @@
4548
; CHECK-SPIRV: 4 FNegate [[float]] [[#r6]]
4649
; CHECK-SPIRV: 4 FNegate [[float]] [[#r7]]
4750
; CHECK-SPIRV: 4 FNegate [[float]] [[#r8]]
51+
; CHECK-SPIRV: 4 FNegate [[float]] [[#r9]]
4852

4953
; CHECK-LLVM: %r1 = fneg float %a
5054
; CHECK-LLVM: %r2 = fneg float %a
@@ -54,6 +58,7 @@
5458
; CHECK-LLVM: %r6 = fneg float %a
5559
; CHECK-LLVM: %r7 = fneg float %a
5660
; CHECK-LLVM: %r8 = fneg float %a
61+
; CHECK-LLVM: %r9 = fneg float %a
5762

5863
; CHECK-LLVM-16: %r1 = fneg float %a
5964
; CHECK-LLVM-16: %r2 = fneg nnan float %a
@@ -65,6 +70,8 @@
6570
; CHECK-LLVM-16: %r7 = fneg nnan ninf float %a
6671
; CHECK-LLVM-16-DEFAULT: %r8 = fneg float %a
6772
; CHECK-LLVM-16-FC2: %r8 = fneg contract float %a
73+
; CHECK-LLVM-16-DEFAULT: %r9 = fneg float %a
74+
; CHECK-LLVM-16-FC2: %r9 = fneg reassoc contract float %a
6875

6976
target datalayout = "e-p:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024"
7077
target triple = "spir-unknown-unknown"
@@ -80,6 +87,7 @@ entry:
8087
%r6 = fneg fast float %a
8188
%r7 = fneg nnan ninf float %a
8289
%r8 = fneg contract float %a
90+
%r9 = fneg reassoc float %a
8391
ret void
8492
}
8593

‎test/transcoding/frem.ll‎

Lines changed: 7 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -16,6 +16,7 @@
1616
; CHECK-SPIRV: 3 Name [[#r6:]] "r6"
1717
; CHECK-SPIRV: 3 Name [[#r7:]] "r7"
1818
; CHECK-SPIRV: 3 Name [[#r8:]] "r8"
19+
; CHECK-SPIRV: 3 Name [[#r9:]] "r9"
1920
; CHECK-SPIRV-NOT: 4 Decorate [[#r1]] FPFastMathMode
2021
; CHECK-SPIRV-DAG: 4 Decorate [[#r2]] FPFastMathMode 1
2122
; CHECK-SPIRV-DAG: 4 Decorate [[#r3]] FPFastMathMode 2
@@ -26,6 +27,8 @@
2627
; CHECK-SPIRV-DAG: 4 Decorate [[#r7]] FPFastMathMode 3
2728
; CHECK-SPIRV-DEFAULT-NOT: 4 Decorate [[#r8]] FPFastMathMode
2829
; CHECK-SPIRV-FC2-DAG: 4 Decorate [[#r8]] FPFastMathMode 65536
30+
; CHECK-SPIRV-DEFAULT-NOT: 4 Decorate [[#r9]] FPFastMathMode
31+
; CHECK-SPIRV-FC2-DAG: 4 Decorate [[#r9]] FPFastMathMode 458752
2932
; CHECK-SPIRV: 3 TypeFloat [[float:[0-9]+]] 32
3033
; CHECK-SPIRV: 5 FRem [[float]] [[#r1]]
3134
; CHECK-SPIRV: 5 FRem [[float]] [[#r2]]
@@ -35,6 +38,7 @@
3538
; CHECK-SPIRV: 5 FRem [[float]] [[#r6]]
3639
; CHECK-SPIRV: 5 FRem [[float]] [[#r7]]
3740
; CHECK-SPIRV: 5 FRem [[float]] [[#r8]]
41+
; CHECK-SPIRV: 5 FRem [[float]] [[#r9]]
3842

3943
; CHECK-LLVM: %r1 = frem float %a, %b
4044
; CHECK-LLVM: %r2 = frem nnan float %a, %b
@@ -46,6 +50,8 @@
4650
; CHECK-LLVM: %r7 = frem nnan ninf float %a, %b
4751
; CHECK-LLVM-DEFAULT: %r8 = frem float %a, %b
4852
; CHECK-LLVM-FC2: %r8 = frem contract float %a, %b
53+
; CHECK-LLVM-DEFAULT: %r9 = frem float %a, %b
54+
; CHECK-LLVM-FC2: %r9 = frem reassoc contract float %a, %b
4955

5056
target datalayout = "e-p:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024"
5157
target triple = "spir-unknown-unknown"
@@ -61,6 +67,7 @@ entry:
6167
%r6 = frem fast float %a, %b
6268
%r7 = frem nnan ninf float %a, %b
6369
%r8 = frem contract float %a, %b
70+
%r9 = frem reassoc float %a, %b
6471
ret void
6572
}
6673

‎test/transcoding/fsub.ll‎

Lines changed: 7 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -16,6 +16,7 @@
1616
; CHECK-SPIRV: 3 Name [[#r6:]] "r6"
1717
; CHECK-SPIRV: 3 Name [[#r7:]] "r7"
1818
; CHECK-SPIRV: 3 Name [[#r8:]] "r8"
19+
; CHECK-SPIRV: 3 Name [[#r9:]] "r9"
1920
; CHECK-SPIRV-NOT: 4 Decorate [[#r1]] FPFastMathMode
2021
; CHECK-SPIRV-DAG: 4 Decorate [[#r2]] FPFastMathMode 1
2122
; CHECK-SPIRV-DAG: 4 Decorate [[#r3]] FPFastMathMode 2
@@ -26,6 +27,8 @@
2627
; CHECK-SPIRV-DAG: 4 Decorate [[#r7]] FPFastMathMode 3
2728
; CHECK-SPIRV-DEFAULT-NOT: 4 Decorate [[#r8]] FPFastMathMode
2829
; CHECK-SPIRV-FC2-DAG: 4 Decorate [[#r8]] FPFastMathMode 65536
30+
; CHECK-SPIRV-DEFAULT-NOT: 4 Decorate [[#r9]] FPFastMathMode
31+
; CHECK-SPIRV-FC2-DAG: 4 Decorate [[#r9]] FPFastMathMode 458752
2932
; CHECK-SPIRV: 3 TypeFloat [[float:[0-9]+]] 32
3033
; CHECK-SPIRV: 5 FSub [[float]] [[#r1]]
3134
; CHECK-SPIRV: 5 FSub [[float]] [[#r2]]
@@ -35,6 +38,7 @@
3538
; CHECK-SPIRV: 5 FSub [[float]] [[#r6]]
3639
; CHECK-SPIRV: 5 FSub [[float]] [[#r7]]
3740
; CHECK-SPIRV: 5 FSub [[float]] [[#r8]]
41+
; CHECK-SPIRV: 5 FSub [[float]] [[#r9]]
3842

3943
; CHECK-LLVM: %r1 = fsub float %a, %b
4044
; CHECK-LLVM: %r2 = fsub nnan float %a, %b
@@ -46,6 +50,8 @@
4650
; CHECK-LLVM: %r7 = fsub nnan ninf float %a, %b
4751
; CHECK-LLVM-DEFAULT: %r8 = fsub float %a, %b
4852
; CHECK-LLVM-FC2: %r8 = fsub contract float %a, %b
53+
; CHECK-LLVM-DEFAULT: %r9 = fsub float %a, %b
54+
; CHECK-LLVM-FC2: %r9 = fsub reassoc contract float %a, %b
4955

5056
target datalayout = "e-p:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024"
5157
target triple = "spir-unknown-unknown"
@@ -61,6 +67,7 @@ entry:
6167
%r6 = fsub fast float %a, %b
6268
%r7 = fsub nnan ninf float %a, %b
6369
%r8 = fsub contract float %a, %b
70+
%r9 = fsub reassoc float %a, %b
6471
ret void
6572
}
6673

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