aspeed_g5_defconfig "error: invalid operand for instruction"

[nathanchance]

After commit b9baf5c8c5c3 ("ARM: Spectre-BHB workaround"):

$ make -skj"$(nproc)" ARCH=arm LLVM=1 mrproper aspeed_g5_defconfig all
...
<instantiation>:1:21: error: invalid operand for instruction
mcr p15, 0, r0, c7, r5, 4
                    ^
<instantiation>:50:2: note: while in macro instantiation
 isb
 ^
arch/arm/kernel/entry-armv.S:1198:2: note: while in macro instantiation
 vector_stub fiq, 0x00000011, 4
 ^
...

Turns out that GNU as agrees with this as well, with a bit more of a helpful error message:

$ make -skj"$(nproc)" ARCH=arm CROSS_COMPILE=arm-linux-gnueabi- mrproper aspeed_g5_defconfig all
...
arch/arm/mm/cache-v7.S: Assembler messages:
arch/arm/mm/cache-v7.S:42: Error: co-processor register expected -- `mcr p15,0,r0,c7,r5,4'
arch/arm/mm/cache-v7.S:69: Error: co-processor register expected -- `mcr p15,0,r0,c7,r5,4'
arch/arm/mm/cache-v7.S:142: Error: co-processor register expected -- `mcr p15,0,r0,c7,r5,4'
arch/arm/mm/cache-v7.S:179: Error: co-processor register expected -- `mcr p15,0,r0,c7,r5,4'
arch/arm/mm/cache-v7.S:312: Error: co-processor register expected -- `mcr p15,0,r0,c7,r5,4'
...

[nickdesaulniers]

fix submitted

[nathanchance]

https://git.kernel.org/linus/33970b031dc4653cc9dc80f2886976706c4c8ef1