Skip to content

HAL LPCs SPI: Fix mask bits for SPI clock rate #4869

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Merged
merged 7 commits into from
Aug 14, 2017
Merged

HAL LPCs SPI: Fix mask bits for SPI clock rate #4869

Show file tree
Hide file tree
Changes from all commits
Commits
Show all changes
7 commits
Select commit Hold shift + click to select a range
9ad17b2
[HAL LPC176x] Fix mask bits for SPI clock rate
toyowata Aug 8, 2017
fdc071d
[HAL LPC11U6x] Fix mask bits for SPI clock rate
toyowata Aug 8, 2017
aa334b0
[HAL LPC11Uxx] Fix mask bits for SPI clock rate
toyowata Aug 8, 2017
db2da2e
[HAL LPC11xx_11Cxx] Fix mask bits for SPI clock rate
toyowata Aug 8, 2017
cb9b2b0
[HAL LPC13xx] Fix mask bits for SPI clock rate
toyowata Aug 8, 2017
72e8241
[HAL LPC408x] Fix mask bits for SPI clock rate
toyowata Aug 8, 2017
da7fa0d
[HAL LPC43xx] Fix mask bits for SPI clock rate
toyowata Aug 8, 2017
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
4 changes: 2 additions & 2 deletions targets/TARGET_NXP/TARGET_LPC11U6X/spi_api.c
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -110,7 +110,7 @@ void spi_format(spi_t *obj, int bits, int mode, int slave) {

int FRF = 0; // FRF (frame format) = SPI
uint32_t tmp = obj->spi->CR0;
tmp &= ~(0xFFFF);
tmp &= ~(0x00FF); // Clear DSS, FRF, CPOL and CPHA [7:0]
tmp |= DSS << 0
| FRF << 4
| SPO << 6
Expand Down Expand Up @@ -146,7 +146,7 @@ void spi_frequency(spi_t *obj, int hz) {
obj->spi->CPSR = prescaler;

// divider
obj->spi->CR0 &= ~(0xFFFF << 8);
obj->spi->CR0 &= ~(0xFF00); // Clear SCR: Serial clock rate [15:8]
obj->spi->CR0 |= (divider - 1) << 8;
ssp_enable(obj);
return;
Expand Down
4 changes: 2 additions & 2 deletions targets/TARGET_NXP/TARGET_LPC11UXX/spi_api.c
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -76,7 +76,7 @@ void spi_format(spi_t *obj, int bits, int mode, int slave) {

int FRF = 0; // FRF (frame format) = SPI
uint32_t tmp = obj->spi->CR0;
tmp &= ~(0xFFFF);
tmp &= ~(0x00FF); // Clear DSS, FRF, CPOL and CPHA [7:0]
tmp |= DSS << 0
| FRF << 4
| SPO << 6
Expand Down Expand Up @@ -112,7 +112,7 @@ void spi_frequency(spi_t *obj, int hz) {
obj->spi->CPSR = prescaler;

// divider
obj->spi->CR0 &= ~(0xFFFF << 8);
obj->spi->CR0 &= ~(0xFF00); // Clear SCR: Serial clock rate [15:8]
obj->spi->CR0 |= (divider - 1) << 8;
ssp_enable(obj);
return;
Expand Down
4 changes: 2 additions & 2 deletions targets/TARGET_NXP/TARGET_LPC11XX_11CXX/spi_api.c
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -112,7 +112,7 @@ void spi_format(spi_t *obj, int bits, int mode, int slave) {

int FRF = 0; // FRF (frame format) = SPI
uint32_t tmp = obj->spi->CR0;
tmp &= ~(0xFFFF);
tmp &= ~(0x00FF); // Clear DSS, FRF, CPOL and CPHA [7:0]
tmp |= DSS << 0
| FRF << 4
| SPO << 6
Expand Down Expand Up @@ -148,7 +148,7 @@ void spi_frequency(spi_t *obj, int hz) {
obj->spi->CPSR = prescaler;

// divider
obj->spi->CR0 &= ~(0xFFFF << 8);
obj->spi->CR0 &= ~(0xFF00); // Clear SCR: Serial clock rate [15:8]
obj->spi->CR0 |= (divider - 1) << 8;
ssp_enable(obj);
return;
Expand Down
4 changes: 2 additions & 2 deletions targets/TARGET_NXP/TARGET_LPC13XX/spi_api.c
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -104,7 +104,7 @@ void spi_format(spi_t *obj, int bits, int mode, int slave) {

int FRF = 0; // FRF (frame format) = SPI
uint32_t tmp = obj->spi->CR0;
tmp &= ~(0xFFFF);
tmp &= ~(0x00FF); // Clear DSS, FRF, CPOL and CPHA [7:0]
tmp |= DSS << 0
| FRF << 4
| SPO << 6
Expand Down Expand Up @@ -140,7 +140,7 @@ void spi_frequency(spi_t *obj, int hz) {
obj->spi->CPSR = prescaler;

// divider
obj->spi->CR0 &= ~(0xFFFF << 8);
obj->spi->CR0 &= ~(0xFF00); // Clear SCR: Serial clock rate [15:8]
obj->spi->CR0 |= (divider - 1) << 8;
ssp_enable(obj);
return;
Expand Down
4 changes: 2 additions & 2 deletions targets/TARGET_NXP/TARGET_LPC176X/spi_api.c
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -98,7 +98,7 @@ void spi_format(spi_t *obj, int bits, int mode, int slave) {

int FRF = 0; // FRF (frame format) = SPI
uint32_t tmp = obj->spi->CR0;
tmp &= ~(0xFFFF);
tmp &= ~(0x00FF); // Clear DSS, FRF, CPOL and CPHA [7:0]
tmp |= DSS << 0
| FRF << 4
| SPO << 6
Expand Down Expand Up @@ -146,7 +146,7 @@ void spi_frequency(spi_t *obj, int hz) {
obj->spi->CPSR = prescaler;

// divider
obj->spi->CR0 &= ~(0xFFFF << 8);
obj->spi->CR0 &= ~(0xFF00); // Clear SCR: Serial clock rate [15:8]
obj->spi->CR0 |= (divider - 1) << 8;
ssp_enable(obj);
return;
Expand Down
4 changes: 2 additions & 2 deletions targets/TARGET_NXP/TARGET_LPC408X/TARGET_LPC4088/spi_api.c
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -118,7 +118,7 @@ void spi_format(spi_t *obj, int bits, int mode, int slave) {

int FRF = 0; // FRF (frame format) = SPI
uint32_t tmp = obj->spi->CR0;
tmp &= ~(0xFFFF);
tmp &= ~(0x00FF); // Clear DSS, FRF, CPOL and CPHA [7:0]
tmp |= DSS << 0
| FRF << 4
| SPO << 6
Expand Down Expand Up @@ -153,7 +153,7 @@ void spi_frequency(spi_t *obj, int hz) {
obj->spi->CPSR = prescaler;

// divider
obj->spi->CR0 &= ~(0xFFFF << 8);
obj->spi->CR0 &= ~(0xFF00); // Clear SCR: Serial clock rate [15:8]
obj->spi->CR0 |= (divider - 1) << 8;
ssp_enable(obj);
return;
Expand Down
4 changes: 2 additions & 2 deletions targets/TARGET_NXP/TARGET_LPC408X/TARGET_LPC4088_DM/spi_api.c
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -98,7 +98,7 @@ void spi_format(spi_t *obj, int bits, int mode, int slave) {

int FRF = 0; // FRF (frame format) = SPI
uint32_t tmp = obj->spi->CR0;
tmp &= ~(0xFFFF);
tmp &= ~(0x00FF); // Clear DSS, FRF, CPOL and CPHA [7:0]
tmp |= DSS << 0
| FRF << 4
| SPO << 6
Expand Down Expand Up @@ -133,7 +133,7 @@ void spi_frequency(spi_t *obj, int hz) {
obj->spi->CPSR = prescaler;

// divider
obj->spi->CR0 &= ~(0xFFFF << 8);
obj->spi->CR0 &= ~(0xFF00); // Clear SCR: Serial clock rate [15:8]
obj->spi->CR0 |= (divider - 1) << 8;
ssp_enable(obj);
return;
Expand Down
4 changes: 2 additions & 2 deletions targets/TARGET_NXP/TARGET_LPC43XX/spi_api.c
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -117,7 +117,7 @@ void spi_format(spi_t *obj, int bits, int mode, int slave) {

int FRF = 0; // FRF (frame format) = SPI
uint32_t tmp = obj->spi->CR0;
tmp &= ~(0xFFFF);
tmp &= ~(0x00FF); // Clear DSS, FRF, CPOL and CPHA [7:0]
tmp |= DSS << 0
| FRF << 4
| SPO << 6
Expand Down Expand Up @@ -152,7 +152,7 @@ void spi_frequency(spi_t *obj, int hz) {
obj->spi->CPSR = prescaler;

// divider
obj->spi->CR0 &= ~(0xFFFF << 8);
obj->spi->CR0 &= ~(0xFF00); // Clear SCR: Serial clock rate [15:8]
obj->spi->CR0 |= (divider - 1) << 8;
ssp_enable(obj);
return;
Expand Down