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Merge pull request #15137 from jeromecoutant/PR_WL_1_1_0
STM32WL update drivers version to CUBE V1.1.0
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connectivity/drivers/lora/TARGET_STM32WL/CMakeLists.txt

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@@ -9,4 +9,5 @@ target_include_directories(mbed-lorawan
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target_sources(mbed-lorawan
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INTERFACE
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STM32WL_LoRaRadio.cpp
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STM32WL_radio_driver.cpp
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)

targets/TARGET_STM/README.md

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@@ -118,7 +118,7 @@ This table summarizes the STM32Cube versions currently used in Mbed OS master br
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| L5 | 1.4.0 | https://github.com/STMicroelectronics/STM32CubeL5 |
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| U5 | 1.0.0 | https://github.com/STMicroelectronics/STM32CubeU5 |
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| WB | 1.11.1 | https://github.com/STMicroelectronics/STM32CubeWB |
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| WL | 1.0.0 | https://github.com/STMicroelectronics/STM32CubeWL |
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| WL | 1.1.0 | https://github.com/STMicroelectronics/STM32CubeWL |
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In Mbed OS repository, we try to minimize the difference between "official" and copied files.
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targets/TARGET_STM/TARGET_STM32WL/CMakeLists.txt

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@@ -1,13 +1,23 @@
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# Copyright (c) 2020 ARM Limited. All rights reserved.
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# SPDX-License-Identifier: Apache-2.0
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add_subdirectory(TARGET_STM32WL54xC EXCLUDE_FROM_ALL)
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add_subdirectory(TARGET_STM32WL55xC EXCLUDE_FROM_ALL)
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add_subdirectory(TARGET_STM32WLE4x8 EXCLUDE_FROM_ALL)
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add_subdirectory(TARGET_STM32WLE4xB EXCLUDE_FROM_ALL)
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add_subdirectory(TARGET_STM32WLE4xC EXCLUDE_FROM_ALL)
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add_subdirectory(TARGET_STM32WLE5x8 EXCLUDE_FROM_ALL)
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add_subdirectory(TARGET_STM32WLE5xB EXCLUDE_FROM_ALL)
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add_subdirectory(TARGET_STM32WLE5xC EXCLUDE_FROM_ALL)
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add_subdirectory(STM32Cube_FW EXCLUDE_FROM_ALL)
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add_library(mbed-stm32wl INTERFACE)
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target_include_directories(mbed-stm32wl
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INTERFACE
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.
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)
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target_sources(mbed-stm32wl
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INTERFACE
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analogin_device.c
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system_clock.c
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)
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target_include_directories(mbed-stm32wl
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INTERFACE
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.
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)
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target_link_libraries(mbed-stm32wl INTERFACE mbed-stm mbed-stm32wlcube-fw)
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This software component is provided to you as part of a software package and
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applicable license terms are in the Package_license file. If you received this
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software component outside of a package or without applicable license terms,
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the terms of the Apache-2.0 license shall apply.
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You may obtain a copy of the Apache-2.0 at:
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https://opensource.org/licenses/Apache-2.0

targets/TARGET_STM/TARGET_STM32WL/STM32Cube_FW/CMSIS/stm32wl54xx.h

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targets/TARGET_STM/TARGET_STM32WL/STM32Cube_FW/CMSIS/stm32wl55xx.h

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targets/TARGET_STM/TARGET_STM32WL/STM32Cube_FW/CMSIS/stm32wle4xx.h

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targets/TARGET_STM/TARGET_STM32WL/STM32Cube_FW/CMSIS/stm32wle5xx.h

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targets/TARGET_STM/TARGET_STM32WL/STM32Cube_FW/CMSIS/stm32wlxx.h

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@@ -8,21 +8,20 @@
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* is using in the C source code, usually in main.c. This file contains:
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* - Configuration section that allows to select:
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* - The STM32WLxx device used in the target application
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* - To use or not the peripherals drivers in application code(i.e.
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* code will be based on direct access to peripherals registers
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* - To use or not the peripheral's drivers in application code(i.e.
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* code will be based on direct access to peripheral's registers
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* rather than drivers API), this option is controlled by
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* "#define USE_HAL_DRIVER"
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*
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******************************************************************************
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* @attention
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*
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* <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
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* All rights reserved.</center></h2>
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* Copyright (c) 2020(-2021) STMicroelectronics.
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* All rights reserved.
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*
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* This software component is licensed by ST under Apache License, Version 2.0,
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* the "License"; You may not use this file except in compliance with the
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* License. You may obtain a copy of the License at:
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* opensource.org/licenses/Apache-2.0
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* This software is licensed under terms that can be found in the LICENSE file
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* in the root directory of this software component.
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* If no LICENSE file comes with this software, it is provided AS-IS.
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*
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******************************************************************************
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*/
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* @brief CMSIS Device version number
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*/
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#define __STM32WLxx_CMSIS_VERSION_MAIN (0x01U) /*!< [31:24] main version */
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#define __STM32WLxx_CMSIS_VERSION_SUB1 (0x00U) /*!< [23:16] sub1 version */
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#define __STM32WLxx_CMSIS_VERSION_SUB1 (0x01U) /*!< [23:16] sub1 version */
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#define __STM32WLxx_CMSIS_VERSION_SUB2 (0x00U) /*!< [15:8] sub2 version */
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#define __STM32WLxx_CMSIS_VERSION_RC (0x00U) /*!< [7:0] release candidate */
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#define __STM32WLxx_CMSIS_DEVICE_VERSION ((__STM32WLxx_CMSIS_VERSION_MAIN << 24)\
@@ -157,9 +156,105 @@ typedef enum
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#define MODIFY_REG(REG, CLEARMASK, SETMASK) WRITE_REG((REG), (((READ_REG(REG)) & (~(CLEARMASK))) | (SETMASK)))
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159158
#if defined(CORE_CM0PLUS)
159+
/* Use of interrupt control for register exclusive access (privileged mode only) */
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/* Atomic 32-bit register access macro to set one or several bits */
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#define ATOMIC_SET_BIT(REG, BIT) \
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do { \
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uint32_t primask; \
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primask = __get_PRIMASK(); \
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__set_PRIMASK(1); \
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SET_BIT((REG), (BIT)); \
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__set_PRIMASK(primask); \
168+
} while(0)
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/* Atomic 32-bit register access macro to clear one or several bits */
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#define ATOMIC_CLEAR_BIT(REG, BIT) \
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do { \
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uint32_t primask; \
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primask = __get_PRIMASK(); \
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__set_PRIMASK(1); \
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CLEAR_BIT((REG), (BIT)); \
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__set_PRIMASK(primask); \
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} while(0)
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/* Atomic 32-bit register access macro to clear and set one or several bits */
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#define ATOMIC_MODIFY_REG(REG, CLEARMSK, SETMASK) \
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do { \
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uint32_t primask; \
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primask = __get_PRIMASK(); \
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__set_PRIMASK(1); \
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MODIFY_REG((REG), (CLEARMSK), (SETMASK)); \
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__set_PRIMASK(primask); \
188+
} while(0)
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/* Atomic 16-bit register access macro to set one or several bits */
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#define ATOMIC_SETH_BIT(REG, BIT) ATOMIC_SET_BIT(REG, BIT)
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/* Atomic 16-bit register access macro to clear one or several bits */
194+
#define ATOMIC_CLEARH_BIT(REG, BIT) ATOMIC_CLEAR_BIT(REG, BIT)
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196+
/* Atomic 16-bit register access macro to clear and set one or several bits */
197+
#define ATOMIC_MODIFYH_REG(REG, CLEARMSK, SETMASK) ATOMIC_MODIFY_REG(REG, CLEARMSK, SETMASK)
198+
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#else
200+
/* Use of CMSIS compiler intrinsics for register exclusive access */
201+
/* Atomic 32-bit register access macro to set one or several bits */
202+
#define ATOMIC_SET_BIT(REG, BIT) \
203+
do { \
204+
uint32_t val; \
205+
do { \
206+
val = __LDREXW((__IO uint32_t *)&(REG)) | (BIT); \
207+
} while ((__STREXW(val,(__IO uint32_t *)&(REG))) != 0U); \
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} while(0)
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210+
/* Atomic 32-bit register access macro to clear one or several bits */
211+
#define ATOMIC_CLEAR_BIT(REG, BIT) \
212+
do { \
213+
uint32_t val; \
214+
do { \
215+
val = __LDREXW((__IO uint32_t *)&(REG)) & ~(BIT); \
216+
} while ((__STREXW(val,(__IO uint32_t *)&(REG))) != 0U); \
217+
} while(0)
218+
219+
/* Atomic 32-bit register access macro to clear and set one or several bits */
220+
#define ATOMIC_MODIFY_REG(REG, CLEARMSK, SETMASK) \
221+
do { \
222+
uint32_t val; \
223+
do { \
224+
val = (__LDREXW((__IO uint32_t *)&(REG)) & ~(CLEARMSK)) | (SETMASK); \
225+
} while ((__STREXW(val,(__IO uint32_t *)&(REG))) != 0U); \
226+
} while(0)
227+
228+
/* Atomic 16-bit register access macro to set one or several bits */
229+
#define ATOMIC_SETH_BIT(REG, BIT) \
230+
do { \
231+
uint16_t val; \
232+
do { \
233+
val = __LDREXH((__IO uint16_t *)&(REG)) | (BIT); \
234+
} while ((__STREXH(val,(__IO uint16_t *)&(REG))) != 0U); \
235+
} while(0)
236+
237+
/* Atomic 16-bit register access macro to clear one or several bits */
238+
#define ATOMIC_CLEARH_BIT(REG, BIT) \
239+
do { \
240+
uint16_t val; \
241+
do { \
242+
val = __LDREXH((__IO uint16_t *)&(REG)) & ~(BIT); \
243+
} while ((__STREXH(val,(__IO uint16_t *)&(REG))) != 0U); \
244+
} while(0)
245+
246+
/* Atomic 16-bit register access macro to clear and set one or several bits */
247+
#define ATOMIC_MODIFYH_REG(REG, CLEARMSK, SETMASK) \
248+
do { \
249+
uint16_t val; \
250+
do { \
251+
val = (__LDREXH((__IO uint16_t *)&(REG)) & ~(CLEARMSK)) | (SETMASK); \
252+
} while ((__STREXH(val,(__IO uint16_t *)&(REG))) != 0U); \
253+
} while(0)
254+
161255
#define POSITION_VAL(VAL) (__CLZ(__RBIT(VAL)))
162-
#endif
256+
#endif /* CORE_CM0PLUS */
257+
163258
/**
164259
* @}
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*/

targets/TARGET_STM/TARGET_STM32WL/STM32Cube_FW/CMSIS/system_stm32wlxx.h

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@@ -6,13 +6,12 @@
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******************************************************************************
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* @attention
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*
9-
* <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
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* All rights reserved.</center></h2>
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* Copyright (c) 2020(-2021) STMicroelectronics.
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* All rights reserved.
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*
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* This software component is licensed by ST under Apache License, Version 2.0,
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* the "License"; You may not use this file except in compliance with the
14-
* License. You may obtain a copy of the License at:
15-
* opensource.org/licenses/Apache-2.0
12+
* This software is licensed under terms that can be found in the LICENSE file
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* in the root directory of this software component.
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* If no LICENSE file comes with this software, it is provided AS-IS.
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*
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******************************************************************************
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*/

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