Skip to content

Commit 5e7a7f4

Browse files
committed
STM32WL remove non-UTF characters
1 parent 8ae3e19 commit 5e7a7f4

File tree

5 files changed

+158
-158
lines changed

5 files changed

+158
-158
lines changed

targets/TARGET_STM/TARGET_STM32WL/STM32Cube_FW/CMSIS/stm32wl54xx.h

Lines changed: 39 additions & 39 deletions
Original file line numberDiff line numberDiff line change
@@ -932,20 +932,20 @@ typedef struct
932932

933933
/*!< Memory, OTP and Option bytes */
934934
#define RSSLIB_PFUNC_BASE (SYSTEM_FLASH_BASE + 0x00003A00UL) /*!< RSS area */
935-
#define OTP_AREA_BASE (SYSTEM_FLASH_BASE + 0x00007000UL) /*!< OTP area : 1kB (0x1FFF7000 0x1FFF73FF) */
936-
#define ENGI_BYTES_BASE (SYSTEM_FLASH_BASE + 0x00007400UL) /*!< Engi Bytes : 1kB (0x1FFF7400 0x1FFF77FF) */
937-
#define OPTION_BYTES_BASE (SYSTEM_FLASH_BASE + 0x00007800UL) /*!< Option Bytes : 2kB (0x1FFF7800 0x1FFF7FFF) */
935+
#define OTP_AREA_BASE (SYSTEM_FLASH_BASE + 0x00007000UL) /*!< OTP area : 1kB (0x1FFF7000 - 0x1FFF73FF) */
936+
#define ENGI_BYTES_BASE (SYSTEM_FLASH_BASE + 0x00007400UL) /*!< Engi Bytes : 1kB (0x1FFF7400 - 0x1FFF77FF) */
937+
#define OPTION_BYTES_BASE (SYSTEM_FLASH_BASE + 0x00007800UL) /*!< Option Bytes : 2kB (0x1FFF7800 - 0x1FFF7FFF) */
938938

939939
/*!< Device Electronic Signature */
940940
#define PACKAGE_BASE (ENGI_BYTES_BASE + 0x00000100UL) /*!< Package data register base address */
941941
#define UID64_BASE (ENGI_BYTES_BASE + 0x00000180UL) /*!< 64-bit Unique device Identification */
942942
#define UID_BASE (ENGI_BYTES_BASE + 0x00000190UL) /*!< Unique device ID register base address */
943943
#define FLASHSIZE_BASE (ENGI_BYTES_BASE + 0x000001E0UL) /*!< Flash size data register base address */
944944

945-
#define SYSTEM_MEMORY_END_ADDR (0x1FFF6FFFUL) /*!< System Memory : 28KB (0x1FFF0000 0x1FFF6FFF) */
946-
#define OTP_AREA_END_ADDR (0x1FFF73FFUL) /*!< OTP area : 1KB (0x1FFF7000 0x1FFF73FF) */
947-
#define ENGI_BYTE_END_ADDR (0x1FFF77FFUL) /*!< Engi Bytes : 1kB (0x1FFF7400 0x1FFF77FF) */
948-
#define OPTION_BYTE_END_ADDR (0x1FFF7FFFUL) /*!< Option Bytes : 2KB (0x1FFF7800 0x1FFF7FFF) */
945+
#define SYSTEM_MEMORY_END_ADDR (0x1FFF6FFFUL) /*!< System Memory : 28KB (0x1FFF0000 - 0x1FFF6FFF) */
946+
#define OTP_AREA_END_ADDR (0x1FFF73FFUL) /*!< OTP area : 1KB (0x1FFF7000 - 0x1FFF73FF) */
947+
#define ENGI_BYTE_END_ADDR (0x1FFF77FFUL) /*!< Engi Bytes : 1kB (0x1FFF7400 - 0x1FFF77FF) */
948+
#define OPTION_BYTE_END_ADDR (0x1FFF7FFFUL) /*!< Option Bytes : 2KB (0x1FFF7800 - 0x1FFF7FFF) */
949949

950950
/*!< Peripheral memory map */
951951
#define APB1PERIPH_BASE PERIPH_BASE
@@ -9100,100 +9100,100 @@ typedef struct
91009100
/***************** Bit definition for SYSCFG_SWPR register (SYSCFG SRAM2 write protection register) ***********************************************************/
91019101
#define SYSCFG_SWPR_PAGE0_Pos (0U)
91029102
#define SYSCFG_SWPR_PAGE0_Msk (0x1UL << SYSCFG_SWPR_PAGE0_Pos) /*!< 0x00000001 */
9103-
#define SYSCFG_SWPR_PAGE0 SYSCFG_SWPR_PAGE0_Msk /*!< SRAM2 Write protection page 0 (0x20008000 0x200083FF) */
9103+
#define SYSCFG_SWPR_PAGE0 SYSCFG_SWPR_PAGE0_Msk /*!< SRAM2 Write protection page 0 (0x20008000 - 0x200083FF) */
91049104
#define SYSCFG_SWPR_PAGE1_Pos (1U)
91059105
#define SYSCFG_SWPR_PAGE1_Msk (0x1UL << SYSCFG_SWPR_PAGE1_Pos) /*!< 0x00000002 */
9106-
#define SYSCFG_SWPR_PAGE1 SYSCFG_SWPR_PAGE1_Msk /*!< SRAM2 Write protection page 1 (0x20008400 0x200087FF) */
9106+
#define SYSCFG_SWPR_PAGE1 SYSCFG_SWPR_PAGE1_Msk /*!< SRAM2 Write protection page 1 (0x20008400 - 0x200087FF) */
91079107
#define SYSCFG_SWPR_PAGE2_Pos (2U)
91089108
#define SYSCFG_SWPR_PAGE2_Msk (0x1UL << SYSCFG_SWPR_PAGE2_Pos) /*!< 0x00000004 */
9109-
#define SYSCFG_SWPR_PAGE2 SYSCFG_SWPR_PAGE2_Msk /*!< SRAM2 Write protection page 2 (0x20008800 0x20008BFF) */
9109+
#define SYSCFG_SWPR_PAGE2 SYSCFG_SWPR_PAGE2_Msk /*!< SRAM2 Write protection page 2 (0x20008800 - 0x20008BFF) */
91109110
#define SYSCFG_SWPR_PAGE3_Pos (3U)
91119111
#define SYSCFG_SWPR_PAGE3_Msk (0x1UL << SYSCFG_SWPR_PAGE3_Pos) /*!< 0x00000008 */
9112-
#define SYSCFG_SWPR_PAGE3 SYSCFG_SWPR_PAGE3_Msk /*!< SRAM2 Write protection page 3 (0x20008C00 0x20008FFF) */
9112+
#define SYSCFG_SWPR_PAGE3 SYSCFG_SWPR_PAGE3_Msk /*!< SRAM2 Write protection page 3 (0x20008C00 - 0x20008FFF) */
91139113
#define SYSCFG_SWPR_PAGE4_Pos (4U)
91149114
#define SYSCFG_SWPR_PAGE4_Msk (0x1UL << SYSCFG_SWPR_PAGE4_Pos) /*!< 0x00000010 */
9115-
#define SYSCFG_SWPR_PAGE4 SYSCFG_SWPR_PAGE4_Msk /*!< SRAM2 Write protection page 4 (0x20009000 0x200093FF) */
9115+
#define SYSCFG_SWPR_PAGE4 SYSCFG_SWPR_PAGE4_Msk /*!< SRAM2 Write protection page 4 (0x20009000 - 0x200093FF) */
91169116
#define SYSCFG_SWPR_PAGE5_Pos (5U)
91179117
#define SYSCFG_SWPR_PAGE5_Msk (0x1UL << SYSCFG_SWPR_PAGE5_Pos) /*!< 0x00000020 */
9118-
#define SYSCFG_SWPR_PAGE5 SYSCFG_SWPR_PAGE5_Msk /*!< SRAM2 Write protection page 5 (0x20009400 0x200097FF) */
9118+
#define SYSCFG_SWPR_PAGE5 SYSCFG_SWPR_PAGE5_Msk /*!< SRAM2 Write protection page 5 (0x20009400 - 0x200097FF) */
91199119
#define SYSCFG_SWPR_PAGE6_Pos (6U)
91209120
#define SYSCFG_SWPR_PAGE6_Msk (0x1UL << SYSCFG_SWPR_PAGE6_Pos) /*!< 0x00000040 */
9121-
#define SYSCFG_SWPR_PAGE6 SYSCFG_SWPR_PAGE6_Msk /*!< SRAM2 Write protection page 6 (0x20009800 0x20009BFF) */
9121+
#define SYSCFG_SWPR_PAGE6 SYSCFG_SWPR_PAGE6_Msk /*!< SRAM2 Write protection page 6 (0x20009800 - 0x20009BFF) */
91229122
#define SYSCFG_SWPR_PAGE7_Pos (7U)
91239123
#define SYSCFG_SWPR_PAGE7_Msk (0x1UL << SYSCFG_SWPR_PAGE7_Pos) /*!< 0x00000080 */
9124-
#define SYSCFG_SWPR_PAGE7 SYSCFG_SWPR_PAGE7_Msk /*!< SRAM2 Write protection page 7 (0x20009C00 0x20009FFF) */
9124+
#define SYSCFG_SWPR_PAGE7 SYSCFG_SWPR_PAGE7_Msk /*!< SRAM2 Write protection page 7 (0x20009C00 - 0x20009FFF) */
91259125
#define SYSCFG_SWPR_PAGE8_Pos (8U)
91269126
#define SYSCFG_SWPR_PAGE8_Msk (0x1UL << SYSCFG_SWPR_PAGE8_Pos) /*!< 0x00000100 */
9127-
#define SYSCFG_SWPR_PAGE8 SYSCFG_SWPR_PAGE8_Msk /*!< SRAM2 Write protection page 8 (0x2000A000 0x2000A3FF) */
9127+
#define SYSCFG_SWPR_PAGE8 SYSCFG_SWPR_PAGE8_Msk /*!< SRAM2 Write protection page 8 (0x2000A000 - 0x2000A3FF) */
91289128
#define SYSCFG_SWPR_PAGE9_Pos (9U)
91299129
#define SYSCFG_SWPR_PAGE9_Msk (0x1UL << SYSCFG_SWPR_PAGE9_Pos) /*!< 0x00000200 */
9130-
#define SYSCFG_SWPR_PAGE9 SYSCFG_SWPR_PAGE9_Msk /*!< SRAM2 Write protection page 9 (0x2000A400 0x2000A7FF) */
9130+
#define SYSCFG_SWPR_PAGE9 SYSCFG_SWPR_PAGE9_Msk /*!< SRAM2 Write protection page 9 (0x2000A400 - 0x2000A7FF) */
91319131
#define SYSCFG_SWPR_PAGE10_Pos (10U)
91329132
#define SYSCFG_SWPR_PAGE10_Msk (0x1UL << SYSCFG_SWPR_PAGE10_Pos) /*!< 0x00000400 */
9133-
#define SYSCFG_SWPR_PAGE10 SYSCFG_SWPR_PAGE10_Msk /*!< SRAM2 Write protection page 10 (0x2000A800 0x2000ABFF) */
9133+
#define SYSCFG_SWPR_PAGE10 SYSCFG_SWPR_PAGE10_Msk /*!< SRAM2 Write protection page 10 (0x2000A800 - 0x2000ABFF) */
91349134
#define SYSCFG_SWPR_PAGE11_Pos (11U)
91359135
#define SYSCFG_SWPR_PAGE11_Msk (0x1UL << SYSCFG_SWPR_PAGE11_Pos) /*!< 0x00000800 */
9136-
#define SYSCFG_SWPR_PAGE11 SYSCFG_SWPR_PAGE11_Msk /*!< SRAM2 Write protection page 11 (0x2000AC00 0x2000AFFF) */
9136+
#define SYSCFG_SWPR_PAGE11 SYSCFG_SWPR_PAGE11_Msk /*!< SRAM2 Write protection page 11 (0x2000AC00 - 0x2000AFFF) */
91379137
#define SYSCFG_SWPR_PAGE12_Pos (12U)
91389138
#define SYSCFG_SWPR_PAGE12_Msk (0x1UL << SYSCFG_SWPR_PAGE12_Pos) /*!< 0x00001000 */
9139-
#define SYSCFG_SWPR_PAGE12 SYSCFG_SWPR_PAGE12_Msk /*!< SRAM2 Write protection page 12 (0x2000B000 0x2000B3FF) */
9139+
#define SYSCFG_SWPR_PAGE12 SYSCFG_SWPR_PAGE12_Msk /*!< SRAM2 Write protection page 12 (0x2000B000 - 0x2000B3FF) */
91409140
#define SYSCFG_SWPR_PAGE13_Pos (13U)
91419141
#define SYSCFG_SWPR_PAGE13_Msk (0x1UL << SYSCFG_SWPR_PAGE13_Pos) /*!< 0x00002000 */
9142-
#define SYSCFG_SWPR_PAGE13 SYSCFG_SWPR_PAGE13_Msk /*!< SRAM2 Write protection page 13 (0x2000B400 0x2000B7FF) */
9142+
#define SYSCFG_SWPR_PAGE13 SYSCFG_SWPR_PAGE13_Msk /*!< SRAM2 Write protection page 13 (0x2000B400 - 0x2000B7FF) */
91439143
#define SYSCFG_SWPR_PAGE14_Pos (14U)
91449144
#define SYSCFG_SWPR_PAGE14_Msk (0x1UL << SYSCFG_SWPR_PAGE14_Pos) /*!< 0x00004000 */
9145-
#define SYSCFG_SWPR_PAGE14 SYSCFG_SWPR_PAGE14_Msk /*!< SRAM2 Write protection page 14 (0x2000B800 0x2000BBFF) */
9145+
#define SYSCFG_SWPR_PAGE14 SYSCFG_SWPR_PAGE14_Msk /*!< SRAM2 Write protection page 14 (0x2000B800 - 0x2000BBFF) */
91469146
#define SYSCFG_SWPR_PAGE15_Pos (15U)
91479147
#define SYSCFG_SWPR_PAGE15_Msk (0x1UL << SYSCFG_SWPR_PAGE15_Pos) /*!< 0x00008000 */
9148-
#define SYSCFG_SWPR_PAGE15 SYSCFG_SWPR_PAGE15_Msk /*!< SRAM2 Write protection page 15 (0x2000BC00 0x2000BFFF) */
9148+
#define SYSCFG_SWPR_PAGE15 SYSCFG_SWPR_PAGE15_Msk /*!< SRAM2 Write protection page 15 (0x2000BC00 - 0x2000BFFF) */
91499149
#define SYSCFG_SWPR_PAGE16_Pos (16U)
91509150
#define SYSCFG_SWPR_PAGE16_Msk (0x1UL << SYSCFG_SWPR_PAGE16_Pos) /*!< 0x00010000 */
9151-
#define SYSCFG_SWPR_PAGE16 SYSCFG_SWPR_PAGE16_Msk /*!< SRAM2 Write protection page 16 (0x2000C000 0x2000C3FF) */
9151+
#define SYSCFG_SWPR_PAGE16 SYSCFG_SWPR_PAGE16_Msk /*!< SRAM2 Write protection page 16 (0x2000C000 - 0x2000C3FF) */
91529152
#define SYSCFG_SWPR_PAGE17_Pos (17U)
91539153
#define SYSCFG_SWPR_PAGE17_Msk (0x1UL << SYSCFG_SWPR_PAGE17_Pos) /*!< 0x00020000 */
9154-
#define SYSCFG_SWPR_PAGE17 SYSCFG_SWPR_PAGE17_Msk /*!< SRAM2 Write protection page 17 (0x2000C400 0x2000C7FF) */
9154+
#define SYSCFG_SWPR_PAGE17 SYSCFG_SWPR_PAGE17_Msk /*!< SRAM2 Write protection page 17 (0x2000C400 - 0x2000C7FF) */
91559155
#define SYSCFG_SWPR_PAGE18_Pos (18U)
91569156
#define SYSCFG_SWPR_PAGE18_Msk (0x1UL << SYSCFG_SWPR_PAGE18_Pos) /*!< 0x00040000 */
9157-
#define SYSCFG_SWPR_PAGE18 SYSCFG_SWPR_PAGE18_Msk /*!< SRAM2 Write protection page 18 (0x2000C800 0x2000CBFF) */
9157+
#define SYSCFG_SWPR_PAGE18 SYSCFG_SWPR_PAGE18_Msk /*!< SRAM2 Write protection page 18 (0x2000C800 - 0x2000CBFF) */
91589158
#define SYSCFG_SWPR_PAGE19_Pos (19U)
91599159
#define SYSCFG_SWPR_PAGE19_Msk (0x1UL << SYSCFG_SWPR_PAGE19_Pos) /*!< 0x00080000 */
9160-
#define SYSCFG_SWPR_PAGE19 SYSCFG_SWPR_PAGE19_Msk /*!< SRAM2 Write protection page 19 (0x2000CC00 0x2000CFFF) */
9160+
#define SYSCFG_SWPR_PAGE19 SYSCFG_SWPR_PAGE19_Msk /*!< SRAM2 Write protection page 19 (0x2000CC00 - 0x2000CFFF) */
91619161
#define SYSCFG_SWPR_PAGE20_Pos (20U)
91629162
#define SYSCFG_SWPR_PAGE20_Msk (0x1UL << SYSCFG_SWPR_PAGE20_Pos) /*!< 0x00100000 */
9163-
#define SYSCFG_SWPR_PAGE20 SYSCFG_SWPR_PAGE20_Msk /*!< SRAM2 Write protection page 20 (0x2000D000 0x2000D3FF) */
9163+
#define SYSCFG_SWPR_PAGE20 SYSCFG_SWPR_PAGE20_Msk /*!< SRAM2 Write protection page 20 (0x2000D000 - 0x2000D3FF) */
91649164
#define SYSCFG_SWPR_PAGE21_Pos (21U)
91659165
#define SYSCFG_SWPR_PAGE21_Msk (0x1UL << SYSCFG_SWPR_PAGE21_Pos) /*!< 0x00200000 */
9166-
#define SYSCFG_SWPR_PAGE21 SYSCFG_SWPR_PAGE21_Msk /*!< SRAM2 Write protection page 21 (0x2000D400 0x2000D7FF) */
9166+
#define SYSCFG_SWPR_PAGE21 SYSCFG_SWPR_PAGE21_Msk /*!< SRAM2 Write protection page 21 (0x2000D400 - 0x2000D7FF) */
91679167
#define SYSCFG_SWPR_PAGE22_Pos (22U)
91689168
#define SYSCFG_SWPR_PAGE22_Msk (0x1UL << SYSCFG_SWPR_PAGE22_Pos) /*!< 0x00400000 */
9169-
#define SYSCFG_SWPR_PAGE22 SYSCFG_SWPR_PAGE22_Msk /*!< SRAM2 Write protection page 22 (0x2000D800 0x2000DBFF) */
9169+
#define SYSCFG_SWPR_PAGE22 SYSCFG_SWPR_PAGE22_Msk /*!< SRAM2 Write protection page 22 (0x2000D800 - 0x2000DBFF) */
91709170
#define SYSCFG_SWPR_PAGE23_Pos (23U)
91719171
#define SYSCFG_SWPR_PAGE23_Msk (0x1UL << SYSCFG_SWPR_PAGE23_Pos) /*!< 0x00800000 */
9172-
#define SYSCFG_SWPR_PAGE23 SYSCFG_SWPR_PAGE23_Msk /*!< SRAM2 Write protection page 23 (0x2000DC00 0x2000DFFF) */
9172+
#define SYSCFG_SWPR_PAGE23 SYSCFG_SWPR_PAGE23_Msk /*!< SRAM2 Write protection page 23 (0x2000DC00 - 0x2000DFFF) */
91739173
#define SYSCFG_SWPR_PAGE24_Pos (24U)
91749174
#define SYSCFG_SWPR_PAGE24_Msk (0x1UL << SYSCFG_SWPR_PAGE24_Pos) /*!< 0x01000000 */
9175-
#define SYSCFG_SWPR_PAGE24 SYSCFG_SWPR_PAGE24_Msk /*!< SRAM2 Write protection page 24 (0x2000E000 0x2000E3FF) */
9175+
#define SYSCFG_SWPR_PAGE24 SYSCFG_SWPR_PAGE24_Msk /*!< SRAM2 Write protection page 24 (0x2000E000 - 0x2000E3FF) */
91769176
#define SYSCFG_SWPR_PAGE25_Pos (25U)
91779177
#define SYSCFG_SWPR_PAGE25_Msk (0x1UL << SYSCFG_SWPR_PAGE25_Pos) /*!< 0x02000000 */
9178-
#define SYSCFG_SWPR_PAGE25 SYSCFG_SWPR_PAGE25_Msk /*!< SRAM2 Write protection page 25 (0x2000E400 0x2000E7FF) */
9178+
#define SYSCFG_SWPR_PAGE25 SYSCFG_SWPR_PAGE25_Msk /*!< SRAM2 Write protection page 25 (0x2000E400 - 0x2000E7FF) */
91799179
#define SYSCFG_SWPR_PAGE26_Pos (26U)
91809180
#define SYSCFG_SWPR_PAGE26_Msk (0x1UL << SYSCFG_SWPR_PAGE26_Pos) /*!< 0x04000000 */
9181-
#define SYSCFG_SWPR_PAGE26 SYSCFG_SWPR_PAGE26_Msk /*!< SRAM2 Write protection page 26 (0x2000E800 0x2000EBFF) */
9181+
#define SYSCFG_SWPR_PAGE26 SYSCFG_SWPR_PAGE26_Msk /*!< SRAM2 Write protection page 26 (0x2000E800 - 0x2000EBFF) */
91829182
#define SYSCFG_SWPR_PAGE27_Pos (27U)
91839183
#define SYSCFG_SWPR_PAGE27_Msk (0x1UL << SYSCFG_SWPR_PAGE27_Pos) /*!< 0x08000000 */
9184-
#define SYSCFG_SWPR_PAGE27 SYSCFG_SWPR_PAGE27_Msk /*!< SRAM2 Write protection page 27 (0x2000EC00 0x2000EFFF) */
9184+
#define SYSCFG_SWPR_PAGE27 SYSCFG_SWPR_PAGE27_Msk /*!< SRAM2 Write protection page 27 (0x2000EC00 - 0x2000EFFF) */
91859185
#define SYSCFG_SWPR_PAGE28_Pos (28U)
91869186
#define SYSCFG_SWPR_PAGE28_Msk (0x1UL << SYSCFG_SWPR_PAGE28_Pos) /*!< 0x10000000 */
9187-
#define SYSCFG_SWPR_PAGE28 SYSCFG_SWPR_PAGE28_Msk /*!< SRAM2 Write protection page 28 (0x2000F000 0x2000F3FF) */
9187+
#define SYSCFG_SWPR_PAGE28 SYSCFG_SWPR_PAGE28_Msk /*!< SRAM2 Write protection page 28 (0x2000F000 - 0x2000F3FF) */
91889188
#define SYSCFG_SWPR_PAGE29_Pos (29U)
91899189
#define SYSCFG_SWPR_PAGE29_Msk (0x1UL << SYSCFG_SWPR_PAGE29_Pos) /*!< 0x20000000 */
9190-
#define SYSCFG_SWPR_PAGE29 SYSCFG_SWPR_PAGE29_Msk /*!< SRAM2 Write protection page 29 (0x2000F400 0x2000F7FF) */
9190+
#define SYSCFG_SWPR_PAGE29 SYSCFG_SWPR_PAGE29_Msk /*!< SRAM2 Write protection page 29 (0x2000F400 - 0x2000F7FF) */
91919191
#define SYSCFG_SWPR_PAGE30_Pos (30U)
91929192
#define SYSCFG_SWPR_PAGE30_Msk (0x1UL << SYSCFG_SWPR_PAGE30_Pos) /*!< 0x40000000 */
9193-
#define SYSCFG_SWPR_PAGE30 SYSCFG_SWPR_PAGE30_Msk /*!< SRAM2 Write protection page 30 (0x2000F800 0x2000FBFF) */
9193+
#define SYSCFG_SWPR_PAGE30 SYSCFG_SWPR_PAGE30_Msk /*!< SRAM2 Write protection page 30 (0x2000F800 - 0x2000FBFF) */
91949194
#define SYSCFG_SWPR_PAGE31_Pos (31U)
91959195
#define SYSCFG_SWPR_PAGE31_Msk (0x1UL << SYSCFG_SWPR_PAGE31_Pos) /*!< 0x80000000 */
9196-
#define SYSCFG_SWPR_PAGE31 SYSCFG_SWPR_PAGE31_Msk /*!< SRAM2 Write protection page 31 (0x2000FC00 0x2000FFFF) */
9196+
#define SYSCFG_SWPR_PAGE31 SYSCFG_SWPR_PAGE31_Msk /*!< SRAM2 Write protection page 31 (0x2000FC00 - 0x2000FFFF) */
91979197

91989198
/***************** Bit definition for SYSCFG_SKR register (SYSCFG SRAM2 key register) *************************************************************************/
91999199
#define SYSCFG_SKR_KEY_Pos (0U)

0 commit comments

Comments
 (0)