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| 1 | +/* |
| 2 | + * Device Tree file for OpenBlocks A7 board |
| 3 | + * |
| 4 | + * Copyright (C) 2013 Free Electrons |
| 5 | + * |
| 6 | + * Thomas Petazzoni < [email protected]> |
| 7 | + * |
| 8 | + * This file is licensed under the terms of the GNU General Public |
| 9 | + * License version 2. This program is licensed "as is" without any |
| 10 | + * warranty of any kind, whether express or implied. |
| 11 | + */ |
| 12 | + |
| 13 | +/dts-v1/; |
| 14 | + |
| 15 | +#include "kirkwood.dtsi" |
| 16 | +#include "kirkwood-6282.dtsi" |
| 17 | + |
| 18 | +/ { |
| 19 | + model = "Plat'Home OpenBlocksA7"; |
| 20 | + compatible = "plathome,openblocks-a7", "marvell,kirkwood-88f6283", "marvell,kirkwood"; |
| 21 | + |
| 22 | + memory { |
| 23 | + device_type = "memory"; |
| 24 | + reg = <0x00000000 0x40000000>; /* 1 GB */ |
| 25 | + }; |
| 26 | + |
| 27 | + chosen { |
| 28 | + bootargs = "console=ttyS0,115200n8 earlyprintk"; |
| 29 | + }; |
| 30 | + |
| 31 | + ocp@f1000000 { |
| 32 | + serial@12000 { |
| 33 | + status = "ok"; |
| 34 | + pinctrl-0 = <&pmx_uart0>; |
| 35 | + pinctrl-names = "default"; |
| 36 | + }; |
| 37 | + |
| 38 | + serial@12100 { |
| 39 | + status = "ok"; |
| 40 | + pinctrl-0 = <&pmx_uart1>; |
| 41 | + pinctrl-names = "default"; |
| 42 | + }; |
| 43 | + |
| 44 | + sata@80000 { |
| 45 | + nr-ports = <1>; |
| 46 | + status = "okay"; |
| 47 | + }; |
| 48 | + |
| 49 | + i2c@11100 { |
| 50 | + status = "okay"; |
| 51 | + pinctrl-0 = <&pmx_twsi1>; |
| 52 | + pinctrl-names = "default"; |
| 53 | + |
| 54 | + s24c02: s24c02@50 { |
| 55 | + compatible = "24c02"; |
| 56 | + reg = <0x50>; |
| 57 | + }; |
| 58 | + }; |
| 59 | + |
| 60 | + pinctrl: pinctrl@10000 { |
| 61 | + pinctrl-0 = <&pmx_dip_switches &pmx_gpio_header>; |
| 62 | + pinctrl-names = "default"; |
| 63 | + |
| 64 | + pmx_uart0: pmx-uart0 { |
| 65 | + marvell,pins = "mpp10", "mpp11", "mpp15", |
| 66 | + "mpp16"; |
| 67 | + marvell,function = "uart0"; |
| 68 | + }; |
| 69 | + |
| 70 | + pmx_uart1: pmx-uart1 { |
| 71 | + marvell,pins = "mpp13", "mpp14", "mpp8", |
| 72 | + "mpp9"; |
| 73 | + marvell,function = "uart1"; |
| 74 | + }; |
| 75 | + |
| 76 | + pmx_sysrst: pmx-sysrst { |
| 77 | + marvell,pins = "mpp6"; |
| 78 | + marvell,function = "sysrst"; |
| 79 | + }; |
| 80 | + |
| 81 | + pmx_dip_switches: pmx-dip-switches { |
| 82 | + marvell,pins = "mpp44", "mpp45", "mpp46", "mpp47"; |
| 83 | + marvell,function = "gpio"; |
| 84 | + }; |
| 85 | + |
| 86 | + /* |
| 87 | + * Accessible on connector J202. The MPP |
| 88 | + * listed below are pin 1-7, pin 8 is unused, |
| 89 | + * pin 9 is external reset input and pin 10 is |
| 90 | + * ground. |
| 91 | + */ |
| 92 | + pmx_gpio_header: pmx-gpio-header { |
| 93 | + marvell,pins = "mpp17", "mpp7", "mpp29", "mpp28", |
| 94 | + "mpp35", "mpp34", "mpp40"; |
| 95 | + marvell,function = "gpio"; |
| 96 | + }; |
| 97 | + |
| 98 | + pmx_gpio_init: pmx-init { |
| 99 | + marvell,pins = "mpp38"; |
| 100 | + marvell,function = "gpio"; |
| 101 | + }; |
| 102 | + |
| 103 | + pmx_usb_oc: pmx-usb-oc { |
| 104 | + marvell,pins = "mpp39"; |
| 105 | + marvell,function = "gpio"; |
| 106 | + }; |
| 107 | + |
| 108 | + pmx_leds: pmx-leds { |
| 109 | + marvell,pins = "mpp41", "mpp42", "mpp43"; |
| 110 | + marvell,function = "gpio"; |
| 111 | + }; |
| 112 | + |
| 113 | + pmx_ge1: pmx-ge1 { |
| 114 | + marvell,pins = "mpp20", "mpp21", "mpp22", "mpp23", |
| 115 | + "mpp24", "mpp25", "mpp26", "mpp27", |
| 116 | + "mpp30", "mpp31", "mpp32", "mpp33"; |
| 117 | + marvell,function = "ge1"; |
| 118 | + }; |
| 119 | + }; |
| 120 | + }; |
| 121 | + |
| 122 | + gpio-leds { |
| 123 | + compatible = "gpio-leds"; |
| 124 | + pinctrl-0 = <&pmx_leds>; |
| 125 | + pinctrl-names = "default"; |
| 126 | + |
| 127 | + led-red { |
| 128 | + label = "obsa7:red:stat"; |
| 129 | + gpios = <&gpio1 9 1>; |
| 130 | + }; |
| 131 | + |
| 132 | + led-green { |
| 133 | + label = "obsa7:green:stat"; |
| 134 | + gpios = <&gpio1 10 1>; |
| 135 | + }; |
| 136 | + |
| 137 | + led-yellow { |
| 138 | + label = "obsa7:yellow:stat"; |
| 139 | + gpios = <&gpio1 11 1>; |
| 140 | + }; |
| 141 | + }; |
| 142 | + |
| 143 | + gpio_keys { |
| 144 | + compatible = "gpio-keys"; |
| 145 | + pinctrl-0 = <&pmx_gpio_init>; |
| 146 | + pinctrl-names = "default"; |
| 147 | + #address-cells = <1>; |
| 148 | + #size-cells = <0>; |
| 149 | + |
| 150 | + button@1 { |
| 151 | + label = "Init Button"; |
| 152 | + linux,code = <116>; |
| 153 | + gpios = <&gpio1 6 0>; |
| 154 | + }; |
| 155 | + }; |
| 156 | +}; |
| 157 | + |
| 158 | +&nand { |
| 159 | + chip-delay = <25>; |
| 160 | + status = "okay"; |
| 161 | + pinctrl-0 = <&pmx_nand>; |
| 162 | + pinctrl-names = "default"; |
| 163 | + |
| 164 | + partition@0 { |
| 165 | + label = "uboot"; |
| 166 | + reg = <0x0 0x1c0000>; |
| 167 | + }; |
| 168 | + |
| 169 | + partition@1c0000 { |
| 170 | + label = "env"; |
| 171 | + reg = <0x1c0000 0x2c0000>; |
| 172 | + }; |
| 173 | + |
| 174 | + partition@480000 { |
| 175 | + label = "test"; |
| 176 | + reg = <0x480000 0x160000>; |
| 177 | + }; |
| 178 | + |
| 179 | + partition@5e0000 { |
| 180 | + label = "conf"; |
| 181 | + reg = <0x5e0000 0x540000>; |
| 182 | + }; |
| 183 | + |
| 184 | + partition@b20000 { |
| 185 | + label = "linux"; |
| 186 | + reg = <0xb20000 0x3d40000>; |
| 187 | + }; |
| 188 | + |
| 189 | + partition@4860000 { |
| 190 | + label = "user"; |
| 191 | + reg = <0x4860000 0xb7a0000>; |
| 192 | + }; |
| 193 | +}; |
| 194 | + |
| 195 | +&mdio { |
| 196 | + status = "okay"; |
| 197 | + |
| 198 | + ethphy0: ethernet-phy@0 { |
| 199 | + device_type = "ethernet-phy"; |
| 200 | + reg = <0>; |
| 201 | + }; |
| 202 | + |
| 203 | + ethphy1: ethernet-phy@1 { |
| 204 | + device_type = "ethernet-phy"; |
| 205 | + reg = <1>; |
| 206 | + }; |
| 207 | +}; |
| 208 | + |
| 209 | +ð0 { |
| 210 | + status = "okay"; |
| 211 | + ethernet0-port@0 { |
| 212 | + phy-handle = <ðphy0>; |
| 213 | + }; |
| 214 | +}; |
| 215 | + |
| 216 | +ð1 { |
| 217 | + status = "okay"; |
| 218 | + pinctrl-0 = <&pmx_ge1>; |
| 219 | + pinctrl-names = "default"; |
| 220 | + ethernet1-port@0 { |
| 221 | + phy-handle = <ðphy1>; |
| 222 | + }; |
| 223 | +}; |
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