Fix wording of README.md

Author: xiaohan484

README.md

@@ -32,9 +32,9 @@ should appear when Doom is loaded and executed.
 
 ## riscv-arch-test
 
-The RISC-V Architectural Tests, [riscv-arch-test](https://github.com/riscv-non-isa/riscv-arch-test), is the basic set of tests that can ensure the riscv model's behaviour that matches RISC-V specifications while implementing specific software.(not a **substitute for rigorous design verification**)
+The RISC-V Architectural Tests, [riscv-arch-test](https://github.com/riscv-non-isa/riscv-arch-test), is the basic set of tests that can ensure the riscv model's behavior that matches RISC-V specifications while implementing specific software.(not a **substitute for rigorous design verification**)
 
-There have **reference signatures** that are generated by the formal RISCV model [RISC-V SAIL](https://github.com/riscv/sail-riscv) and the test files *.elf. The .elf files contain several testing instructions, data, and **signatures**. The **test signatures** are the specific data location that need to be written by testing model(rv32emu-next) during the test. Once the test is executed, the **test signatures** will be written and compared to the **reference signature**. The test will pass if both signatures exactly match.
+There have **reference signatures** that are generated by the formal RISCV model [RISC-V SAIL](https://github.com/riscv/sail-riscv) and the Executable and Linkable Format(`ELF`) files. The ELF files such as `cadd-01.elf` that contain several testing instructions, data, and **signatures**. The **test signatures** are the specific data location that need to be written by testing model(rv32emu-next) during the test. Once the test is executed, the **test signatures** will be written and compared to the **reference signature**. The test will pass if both signatures exactly match.
 
 [riscv-arch-test](https://github.com/riscv-non-isa/riscv-arch-test) is integrated with submodule, and the setup was done.Once the submodule `riscv-arch-test` is pulled, run all the available riscv-arch-test via command:
 ```shell
@@ -51,7 +51,7 @@ make arch-test RISCV_DEVICE=M RISCV_TEST=div-01
 ```
 The details about the setup environment variables can be found in the [RISC-V Architectural Testing Framework](https://github.com/riscv-non-isa/riscv-arch-test/blob/master/doc/README.adoc), **5.1 Setup environment variables**.
 
-The result of the rv32emu-next in riscv-arch-test(RV32):
+Current progress of rv32emu-next in riscv-arch-test(RV32):
 * Passed Tests
     - `I`: Base Integer Instruction Set
     - `M`: Standard Extension for Integer Multiplication and Division
@@ -60,20 +60,20 @@ The result of the rv32emu-next in riscv-arch-test(RV32):
     - `C`: Standard Extension for Compressed Instruction
         + `cebreak`
     - `privilege`: RISCV Privileged Specification
-        + 2 system call
+        + 2 system calls
             * `ebreak`
             * `ecall`
-        + 5 misaligned CB-type
+        + 5 misaligned CB-type instructions
             * `misalign-beq`
             * `misalign-bge`
             * `misalign-bgeu`
             * `misalign-blt`
             * `misalign-bltu`
-        + 1 misaligned CL-type
+        + 1 misaligned CL-type instructions
             * `misalign-lw`
-        + 1 misaligned CS-type
+        + 1 misaligned CS-type instructions
             * `misalign-sw`
-* Unsupported tests:
+* Unsupported tests
     - `F` Standard Extension for Single-Precision Floating-Point
 
 Detail in riscv-arch-test: