@@ -17,9 +17,9 @@ module jtag (
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input wire tck,
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/* verilator lint_off UNUSED */
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input wire tdi,
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- output wire tdo,
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input wire tms,
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- input wire trst_n
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+ input wire trst_n,
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+ output wire tdo
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);
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wire trst;
@@ -69,14 +69,13 @@ module jtag (
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reg byte_transmitter_enable;
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reg reset_byte_transmitter;
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wire transmitter_channel; // for byte_transmitter to write to TDO
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- reg r_transmitter_channel;
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byte_transmitter id_byte_transmitter (
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.clk(tck),
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.reset(trst | reset_byte_transmitter), // TODO: We need to be able to reset the byte_counter?
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.enable(byte_transmitter_enable),
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.in(IdCodeDrRegister),
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- .out(r_transmitter_channel ), // make this another wire.
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+ .out(transmitter_channel ), // make this another wire.
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.done(idcode_out_done)
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);
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@@ -110,7 +109,6 @@ module jtag (
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current_ir_instruction <= 4'b1110 ; // IDCODE is the default instruction.
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r_output_selector_transmitter <= 1 ; // by default the tap controller writes
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tap_channel <= 0 ; // How can an X sneak in here?
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- r_transmitter_channel <= 0 ;
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byte_transmitter_enable <= 0 ;
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reset_byte_transmitter <= 0 ;
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end else begin
@@ -285,6 +283,7 @@ module jtag (
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assume (trst);
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assert (current_state != 5'bX_XXXX );
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assert (r_output_selector_transmitter != 1'bX );
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+ assert (transmitter_channel != 1'bX );
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assert (tdo != 1'bX );
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end
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end
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