Auto merge of #136930 - GuillaumeGomez:rollup-hjsijmf, r=GuillaumeGomez

Rollup of 9 pull requests

Successful merges:

 - #135025 (Cast allocas to default address space)
 - #136217 (Mark condition/carry bit as clobbered in C-SKY inline assembly)
 - #136699 (std: replace the `FromInner` implementation for addresses with private conversion functions)
 - #136758 (tests: `-Copt-level=3` instead of `-O` in assembly tests)
 - #136761 (tests: `-Copt-level=3` instead of `-O` in codegen tests)
 - #136807 (compiler: internally merge `PtxKernel` into `GpuKernel`)
 - #136818 (Implement `read*_exact` for `std:io::repeat`)
 - #136831 (Update stdarch)
 - #136916 (use cc archiver as default in `cc2ar`)

r? `@ghost`
`@rustbot` modify labels: rollup

Author: bors

compiler/rustc_codegen_cranelift/src/abi/mod.rs

@@ -65,11 +65,7 @@ pub(crate) fn conv_to_call_conv(sess: &Session, c: Conv, default_call_conv: Call
             sess.dcx().fatal("C-cmse-nonsecure-entry call conv is not yet implemented");
         }
 
-        Conv::Msp430Intr
-        | Conv::PtxKernel
-        | Conv::GpuKernel
-        | Conv::AvrInterrupt
-        | Conv::AvrNonBlockingInterrupt => {
+        Conv::Msp430Intr | Conv::GpuKernel | Conv::AvrInterrupt | Conv::AvrNonBlockingInterrupt => {
             unreachable!("tried to use {c:?} call conv which only exists on an unsupported target");
         }
     }

compiler/rustc_codegen_llvm/src/abi.rs

@@ -687,7 +687,6 @@ impl llvm::CallConv {
             Conv::AvrNonBlockingInterrupt => llvm::AvrNonBlockingInterrupt,
             Conv::ArmAapcs => llvm::ArmAapcsCallConv,
             Conv::Msp430Intr => llvm::Msp430Intr,
-            Conv::PtxKernel => llvm::PtxKernel,
             Conv::X86Fastcall => llvm::X86FastcallCallConv,
             Conv::X86Intr => llvm::X86_Intr,
             Conv::X86Stdcall => llvm::X86StdcallCallConv,

compiler/rustc_codegen_llvm/src/asm.rs

@@ -286,7 +286,9 @@ impl<'ll, 'tcx> AsmBuilderMethods<'tcx> for Builder<'_, 'll, 'tcx> {
                 InlineAsmArch::M68k => {
                     constraints.push("~{ccr}".to_string());
                 }
-                InlineAsmArch::CSKY => {}
+                InlineAsmArch::CSKY => {
+                    constraints.push("~{psr}".to_string());
+                }
             }
         }
         if !options.contains(InlineAsmOptions::NOMEM) {

compiler/rustc_codegen_llvm/src/builder.rs

@@ -543,7 +543,8 @@ impl<'a, 'll, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'll, 'tcx> {
         unsafe {
             let alloca = llvm::LLVMBuildAlloca(bx.llbuilder, ty, UNNAMED);
             llvm::LLVMSetAlignment(alloca, align.bytes() as c_uint);
-            alloca
+            // Cast to default addrspace if necessary
+            llvm::LLVMBuildPointerCast(bx.llbuilder, alloca, self.cx().type_ptr(), UNNAMED)
         }
     }
 
@@ -552,7 +553,8 @@ impl<'a, 'll, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'll, 'tcx> {
             let alloca =
                 llvm::LLVMBuildArrayAlloca(self.llbuilder, self.cx().type_i8(), size, UNNAMED);
             llvm::LLVMSetAlignment(alloca, align.bytes() as c_uint);
-            alloca
+            // Cast to default addrspace if necessary
+            llvm::LLVMBuildPointerCast(self.llbuilder, alloca, self.cx().type_ptr(), UNNAMED)
         }
     }
 

compiler/rustc_smir/src/rustc_smir/convert/abi.rs

@@ -105,7 +105,6 @@ impl<'tcx> Stable<'tcx> for callconv::Conv {
             Conv::CCmseNonSecureCall => CallConvention::CCmseNonSecureCall,
             Conv::CCmseNonSecureEntry => CallConvention::CCmseNonSecureEntry,
             Conv::Msp430Intr => CallConvention::Msp430Intr,
-            Conv::PtxKernel => CallConvention::PtxKernel,
             Conv::X86Fastcall => CallConvention::X86Fastcall,
             Conv::X86Intr => CallConvention::X86Intr,
             Conv::X86Stdcall => CallConvention::X86Stdcall,

compiler/rustc_target/src/callconv/mod.rs

@@ -542,8 +542,6 @@ pub enum Conv {
 
     Msp430Intr,
 
-    PtxKernel,
-
     GpuKernel,
 
     X86Fastcall,
@@ -689,7 +687,8 @@ impl<'a, Ty> FnAbi<'a, Ty> {
             "sparc" => sparc::compute_abi_info(cx, self),
             "sparc64" => sparc64::compute_abi_info(cx, self),
             "nvptx64" => {
-                if cx.target_spec().adjust_abi(abi, self.c_variadic) == ExternAbi::PtxKernel {
+                let abi = cx.target_spec().adjust_abi(abi, self.c_variadic);
+                if abi == ExternAbi::PtxKernel || abi == ExternAbi::GpuKernel {
                     nvptx64::compute_ptx_kernel_abi_info(cx, self)
                 } else {
                     nvptx64::compute_abi_info(self)
@@ -841,7 +840,6 @@ impl FromStr for Conv {
             "CCmseNonSecureCall" => Ok(Conv::CCmseNonSecureCall),
             "CCmseNonSecureEntry" => Ok(Conv::CCmseNonSecureEntry),
             "Msp430Intr" => Ok(Conv::Msp430Intr),
-            "PtxKernel" => Ok(Conv::PtxKernel),
             "X86Fastcall" => Ok(Conv::X86Fastcall),
             "X86Intr" => Ok(Conv::X86Intr),
             "X86Stdcall" => Ok(Conv::X86Stdcall),

compiler/rustc_target/src/json.rs

@@ -105,7 +105,6 @@ impl ToJson for crate::callconv::Conv {
             Self::CCmseNonSecureCall => "CCmseNonSecureCall",
             Self::CCmseNonSecureEntry => "CCmseNonSecureEntry",
             Self::Msp430Intr => "Msp430Intr",
-            Self::PtxKernel => "PtxKernel",
             Self::X86Fastcall => "X86Fastcall",
             Self::X86Intr => "X86Intr",
             Self::X86Stdcall => "X86Stdcall",

compiler/rustc_ty_utils/src/abi.rs

@@ -290,7 +290,7 @@ fn conv_from_spec_abi(tcx: TyCtxt<'_>, abi: ExternAbi, c_variadic: bool) -> Conv
         Aapcs { .. } => Conv::ArmAapcs,
         CCmseNonSecureCall => Conv::CCmseNonSecureCall,
         CCmseNonSecureEntry => Conv::CCmseNonSecureEntry,
-        PtxKernel => Conv::PtxKernel,
+        PtxKernel => Conv::GpuKernel,
         Msp430Interrupt => Conv::Msp430Intr,
         X86Interrupt => Conv::X86Intr,
         GpuKernel => Conv::GpuKernel,

library/core/src/lib.rs

@@ -211,6 +211,7 @@
 #![feature(powerpc_target_feature)]
 #![feature(riscv_target_feature)]
 #![feature(rtm_target_feature)]
+#![feature(s390x_target_feature)]
 #![feature(sha512_sm_x86)]
 #![feature(sse4a_target_feature)]
 #![feature(tbm_target_feature)]

library/std/src/io/util.rs

@@ -188,6 +188,13 @@ impl Read for Repeat {
         Ok(buf.len())
     }
 
+    fn read_exact(&mut self, buf: &mut [u8]) -> io::Result<()> {
+        for slot in &mut *buf {
+            *slot = self.byte;
+        }
+        Ok(())
+    }
+
     fn read_buf(&mut self, mut buf: BorrowedCursor<'_>) -> io::Result<()> {
         // SAFETY: No uninit bytes are being written
         for slot in unsafe { buf.as_mut() } {
@@ -204,6 +211,10 @@ impl Read for Repeat {
         Ok(())
     }
 
+    fn read_buf_exact(&mut self, buf: BorrowedCursor<'_>) -> io::Result<()> {
+        self.read_buf(buf)
+    }
+
     /// This function is not supported by `io::Repeat`, because there's no end of its data
     fn read_to_end(&mut self, _: &mut Vec<u8>) -> io::Result<usize> {
         Err(io::Error::from(io::ErrorKind::OutOfMemory))