FPGA and RISC-V

[taqtiqa-mark]

I see that there is initial RISC-V support possibly/potentially/in-the-fullness-of-time landing.
I wonder what the roadmap for RISC-V support would look like:

• limited to micro-controllers
• supporting FPGA use cases (e.g. AWS F1 or F2)

Here the use case is something like the Irreducible FPGA prover service, but where the prover is run privately. Say, with the RISC-Zero verifiable-VM, but should eventually be a zkVM.