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Commit 23f1d4f

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author
Dmitry Chuyko
committed
8337666: AArch64: SHA3 GPR intrinsic
Reviewed-by: aph
1 parent 33ed7c1 commit 23f1d4f

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6 files changed

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-6
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6 files changed

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src/hotspot/cpu/aarch64/globals_aarch64.hpp

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@@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2000, 2024, Oracle and/or its affiliates. All rights reserved.
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* Copyright (c) 2000, 2025, Oracle and/or its affiliates. All rights reserved.
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* Copyright (c) 2015, 2019, Red Hat Inc. All rights reserved.
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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*
@@ -95,6 +95,8 @@ define_pd_global(intx, InlineSmallCode, 1000);
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"Use simplest and shortest implementation for array equals") \
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product(bool, UseSIMDForBigIntegerShiftIntrinsics, true, \
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"Use SIMD instructions for left/right shift of BigInteger") \
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product(bool, UseSIMDForSHA3Intrinsic, true, \
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"Use SIMD SHA3 instructions for SHA3 intrinsic") \
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product(bool, AvoidUnalignedAccesses, false, \
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"Avoid generating unaligned memory accesses") \
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product(bool, UseLSE, false, \

src/hotspot/cpu/aarch64/macroAssembler_aarch64.hpp

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@@ -323,6 +323,27 @@ class MacroAssembler: public Assembler {
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extr(Rd, Rn, Rn, imm);
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}
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inline void rolw(Register Rd, Register Rn, unsigned imm) {
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extrw(Rd, Rn, Rn, (32 - imm));
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}
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inline void rol(Register Rd, Register Rn, unsigned imm) {
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extr(Rd, Rn, Rn, (64 - imm));
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}
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using Assembler::rax1;
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using Assembler::eor3;
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inline void rax1(Register Rd, Register Rn, Register Rm) {
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eor(Rd, Rn, Rm, ROR, 63); // Rd = Rn ^ rol(Rm, 1)
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}
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inline void eor3(Register Rd, Register Rn, Register Rm, Register Rk) {
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assert(Rd != Rn, "Use tmp register");
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eor(Rd, Rm, Rk);
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eor(Rd, Rd, Rn);
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}
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inline void sxtbw(Register Rd, Register Rn) {
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sbfmw(Rd, Rn, 0, 7);
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}

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