From 03e2e8c75cd3ad43986e863b3155de12e9929f95 Mon Sep 17 00:00:00 2001 From: Andrzej Warzynski Date: Wed, 19 Jun 2024 07:57:59 +0100 Subject: [PATCH] [mlir][vector] Always print the in_bounds attribute This patch updates the printer for vector ops attributes so that the `in_bounds` attribute, when present, is always printed (regardless of the contents). ATM, an attribute with all values equal `false`, e.g. `in_bounds = {false, false}`, wouldn't be printed. This makes testing certain behaviours impossible (i.e. to make sure that the attribute is correctly preserved/transformed by patterns that modify it). See e.g. #12345 Separately, it's not clear whether the absence of the `in_bounds` attribute in the printed IR is meant to mean that: * the attribute is absent, * the attribute is present and set to all-true, * the attribute is present and set to all-false. By making sure that the attribute is always present, we are removing this ambiguity. --- mlir/lib/Dialect/Vector/IR/VectorOps.cpp | 3 --- mlir/test/Conversion/VectorToSCF/vector-to-scf.mlir | 2 +- mlir/test/Dialect/Linalg/vectorization-with-patterns.mlir | 6 +++--- mlir/test/Dialect/Vector/ops.mlir | 4 ++-- 4 files changed, 6 insertions(+), 9 deletions(-) diff --git a/mlir/lib/Dialect/Vector/IR/VectorOps.cpp b/mlir/lib/Dialect/Vector/IR/VectorOps.cpp index 2bf4f16f96e6a..d6855d59204cd 100644 --- a/mlir/lib/Dialect/Vector/IR/VectorOps.cpp +++ b/mlir/lib/Dialect/Vector/IR/VectorOps.cpp @@ -3859,9 +3859,6 @@ static void printTransferAttrs(OpAsmPrinter &p, VectorTransferOpInterface op) { elidedAttrs.push_back(TransferReadOp::getOperandSegmentSizeAttr()); if (op.getPermutationMap().isMinorIdentity()) elidedAttrs.push_back(op.getPermutationMapAttrName()); - // Elide in_bounds attribute if all dims are out-of-bounds. - if (llvm::none_of(op.getInBoundsValues(), [](bool b) { return b; })) - elidedAttrs.push_back(op.getInBoundsAttrName()); p.printOptionalAttrDict(op->getAttrs(), elidedAttrs); } diff --git a/mlir/test/Conversion/VectorToSCF/vector-to-scf.mlir b/mlir/test/Conversion/VectorToSCF/vector-to-scf.mlir index e1babdd2f1f63..ea57e2afbaa2b 100644 --- a/mlir/test/Conversion/VectorToSCF/vector-to-scf.mlir +++ b/mlir/test/Conversion/VectorToSCF/vector-to-scf.mlir @@ -174,7 +174,7 @@ func.func @materialize_write(%M: index, %N: index, %O: index, %P: index) { // CHECK: scf.for %[[I6:.*]] = %[[C0]] to %[[C1]] step %[[C1]] { // CHECK: %[[S0:.*]] = affine.apply #[[$ADD]](%[[I2]], %[[I6]]) // CHECK: %[[VEC:.*]] = memref.load %[[VECTOR_VIEW3]][%[[I4]], %[[I5]], %[[I6]]] : memref<3x4x1xvector<5xf32>> - // CHECK: vector.transfer_write %[[VEC]], %{{.*}}[%[[S3]], %[[S1]], %[[S0]], %[[I3]]] : vector<5xf32>, memref + // CHECK: vector.transfer_write %[[VEC]], %{{.*}}[%[[S3]], %[[S1]], %[[S0]], %[[I3]]] {in_bounds = [false]} : vector<5xf32>, memref // CHECK: } // CHECK: } // CHECK: } diff --git a/mlir/test/Dialect/Linalg/vectorization-with-patterns.mlir b/mlir/test/Dialect/Linalg/vectorization-with-patterns.mlir index d7ff1ded9d933..7176dff9bc857 100644 --- a/mlir/test/Dialect/Linalg/vectorization-with-patterns.mlir +++ b/mlir/test/Dialect/Linalg/vectorization-with-patterns.mlir @@ -950,7 +950,7 @@ module attributes {transform.with_named_sequence} { // CHECK-NOT: tensor.pad // CHECK-DAG: %[[C0:.*]] = arith.constant 0 : index // CHECK-DAG: %[[C5:.*]] = arith.constant 5.0 -// CHECK: %[[RESULT:.*]] = vector.transfer_read %[[ARG0]][%[[C0]], %[[C0]]], %[[C5]] : tensor<5x6xf32>, vector<7x9xf32> +// CHECK: %[[RESULT:.*]] = vector.transfer_read %[[ARG0]][%[[C0]], %[[C0]]], %[[C5]] {in_bounds = [false, false]} : tensor<5x6xf32>, vector<7x9xf32> // CHECK: return %[[RESULT]] func.func @pad_and_transfer_read(%arg0: tensor<5x6xf32>) -> vector<7x9xf32> { %c0 = arith.constant 0 : index @@ -984,7 +984,7 @@ func.func private @make_vector() -> vector<7x9xf32> // CHECK-NOT: tensor.pad // CHECK: %[[C0:.*]] = arith.constant 0 : index // CHECK: %[[VEC0:.*]] = call @make_vector() : () -> vector<7x9xf32> -// CHECK: %[[RESULT:.*]] = vector.transfer_write %[[VEC0]], %[[ARG0]][%[[C0]], %[[C0]]] : vector<7x9xf32>, tensor<5x6xf32> +// CHECK: %[[RESULT:.*]] = vector.transfer_write %[[VEC0]], %[[ARG0]][%[[C0]], %[[C0]]] {in_bounds = [false, false]} : vector<7x9xf32>, tensor<5x6xf32> // CHECK: return %[[RESULT]] func.func @pad_and_transfer_write_static( %arg0: tensor<5x6xf32>) -> tensor<5x6xf32> { @@ -1021,7 +1021,7 @@ func.func private @make_vector() -> vector<7x9xf32> // CHECK: %[[C0:.*]] = arith.constant 0 : index // CHECK: %[[SUB:.*]] = tensor.extract_slice %[[ARG0]][0, 0] [%[[SIZE]], 6] [1, 1] : tensor to tensor // CHECK: %[[VEC0:.*]] = call @make_vector() : () -> vector<7x9xf32> -// CHECK: %[[RESULT:.*]] = vector.transfer_write %[[VEC0]], %[[SUB]][%[[C0]], %[[C0]]] : vector<7x9xf32>, tensor +// CHECK: %[[RESULT:.*]] = vector.transfer_write %[[VEC0]], %[[SUB]][%[[C0]], %[[C0]]] {in_bounds = [false, false]} : vector<7x9xf32>, tensor // CHECK: return %[[RESULT]] func.func @pad_and_transfer_write_dynamic_static( %arg0: tensor, %size: index, %padding: index) -> tensor { diff --git a/mlir/test/Dialect/Vector/ops.mlir b/mlir/test/Dialect/Vector/ops.mlir index c868c881d079a..afe62a2427fb0 100644 --- a/mlir/test/Dialect/Vector/ops.mlir +++ b/mlir/test/Dialect/Vector/ops.mlir @@ -78,7 +78,7 @@ func.func @vector_transfer_ops(%arg0: memref, vector.transfer_write %1, %arg0[%c3, %c3] {permutation_map = affine_map<(d0, d1)->(d1, d0)>} : vector<3x7xf32>, memref // CHECK: vector.transfer_write %{{.*}}, %{{.*}}[%[[C3]], %[[C3]]] : vector<1x1x4x3xf32>, memref> vector.transfer_write %4, %arg1[%c3, %c3] {permutation_map = affine_map<(d0, d1)->(d0, d1)>} : vector<1x1x4x3xf32>, memref> - // CHECK: vector.transfer_write %{{.*}}, %{{.*}}[%[[C3]], %[[C3]]] : vector<1x1x4x3xf32>, memref> + // CHECK: vector.transfer_write %{{.*}}, %{{.*}}[%[[C3]], %[[C3]]] {in_bounds = [false, false]} : vector<1x1x4x3xf32>, memref> vector.transfer_write %5, %arg1[%c3, %c3] {in_bounds = [false, false]} : vector<1x1x4x3xf32>, memref> // CHECK: vector.transfer_write %{{.*}}, %{{.*}}[%[[C3]], %[[C3]]] : vector<5x24xi8>, memref> vector.transfer_write %6, %arg2[%c3, %c3] : vector<5x24xi8>, memref> @@ -135,7 +135,7 @@ func.func @vector_transfer_ops_tensor(%arg0: tensor, %9 = vector.transfer_write %1, %arg0[%c3, %c3] {permutation_map = affine_map<(d0, d1)->(d1, d0)>} : vector<3x7xf32>, tensor // CHECK: vector.transfer_write %{{.*}}, %{{.*}}[%[[C3]], %[[C3]]] : vector<1x1x4x3xf32>, tensor> %10 = vector.transfer_write %4, %arg1[%c3, %c3] {permutation_map = affine_map<(d0, d1)->(d0, d1)>} : vector<1x1x4x3xf32>, tensor> - // CHECK: vector.transfer_write %{{.*}}, %{{.*}}[%[[C3]], %[[C3]]] : vector<1x1x4x3xf32>, tensor> + // CHECK: vector.transfer_write %{{.*}}, %{{.*}}[%[[C3]], %[[C3]]] {in_bounds = [false, false]} : vector<1x1x4x3xf32>, tensor> %11 = vector.transfer_write %5, %arg1[%c3, %c3] {in_bounds = [false, false]} : vector<1x1x4x3xf32>, tensor> // CHECK: vector.transfer_write %{{.*}}, %{{.*}}[%[[C3]], %[[C3]]] : vector<5x24xi8>, tensor> %12 = vector.transfer_write %6, %arg2[%c3, %c3] : vector<5x24xi8>, tensor>