From 1c8e4bb49475e4f724536546da3df4a8be8c4e17 Mon Sep 17 00:00:00 2001 From: Yingwei Zheng Date: Sun, 28 Apr 2024 16:07:45 +0800 Subject: [PATCH 1/3] [CGP] Add pre-commit tests for PR90380. NFC. --- .../CodeGenPrepare/RISCV/convert-to-eqz.ll | 80 +++++++++++++++++++ 1 file changed, 80 insertions(+) create mode 100644 llvm/test/Transforms/CodeGenPrepare/RISCV/convert-to-eqz.ll diff --git a/llvm/test/Transforms/CodeGenPrepare/RISCV/convert-to-eqz.ll b/llvm/test/Transforms/CodeGenPrepare/RISCV/convert-to-eqz.ll new file mode 100644 index 0000000000000..cd1cdd43261f6 --- /dev/null +++ b/llvm/test/Transforms/CodeGenPrepare/RISCV/convert-to-eqz.ll @@ -0,0 +1,80 @@ +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 4 +; RUN: opt -codegenprepare -S -mtriple=riscv64 < %s | FileCheck %s + +define i8 @hoist_add(i8 %x) { +; CHECK-LABEL: define i8 @hoist_add( +; CHECK-SAME: i8 [[X:%.*]]) { +; CHECK-NEXT: entry: +; CHECK-NEXT: [[INC:%.*]] = add nuw nsw i8 [[X]], 1 +; CHECK-NEXT: [[TMP0:%.*]] = icmp eq i8 [[INC]], 0 +; CHECK-NEXT: br i1 [[TMP0]], label [[EXIT:%.*]], label [[IF_THEN:%.*]] +; CHECK: if.then: +; CHECK-NEXT: br label [[EXIT]] +; CHECK: exit: +; CHECK-NEXT: [[RETVAL:%.*]] = phi i8 [ [[INC]], [[IF_THEN]] ], [ -1, [[ENTRY:%.*]] ] +; CHECK-NEXT: ret i8 [[RETVAL]] +; +entry: + %cmp = icmp eq i8 %x, -1 + br i1 %cmp, label %exit, label %if.then + +if.then: + %inc = add nuw nsw i8 %x, 1 + br label %exit + +exit: + %retval = phi i8 [ %inc, %if.then ], [ -1, %entry ] + ret i8 %retval +} + +define i8 @hoist_lshr(i8 %x) { +; CHECK-LABEL: define i8 @hoist_lshr( +; CHECK-SAME: i8 [[X:%.*]]) { +; CHECK-NEXT: entry: +; CHECK-NEXT: [[INC:%.*]] = lshr exact i8 [[X]], 3 +; CHECK-NEXT: [[TMP0:%.*]] = icmp eq i8 [[INC]], 0 +; CHECK-NEXT: br i1 [[TMP0]], label [[EXIT:%.*]], label [[IF_THEN:%.*]] +; CHECK: if.then: +; CHECK-NEXT: br label [[EXIT]] +; CHECK: exit: +; CHECK-NEXT: [[RETVAL:%.*]] = phi i8 [ [[INC]], [[IF_THEN]] ], [ -1, [[ENTRY:%.*]] ] +; CHECK-NEXT: ret i8 [[RETVAL]] +; +entry: + %cmp = icmp ult i8 %x, 8 + br i1 %cmp, label %exit, label %if.then + +if.then: + %inc = lshr exact i8 %x, 3 + br label %exit + +exit: + %retval = phi i8 [ %inc, %if.then ], [ -1, %entry ] + ret i8 %retval +} + +define i8 @nomove_add(i8 %x) { +; CHECK-LABEL: define i8 @nomove_add( +; CHECK-SAME: i8 [[X:%.*]]) { +; CHECK-NEXT: entry: +; CHECK-NEXT: [[INC:%.*]] = add nuw nsw i8 [[X]], 1 +; CHECK-NEXT: [[TMP0:%.*]] = icmp eq i8 [[INC]], 0 +; CHECK-NEXT: br i1 [[TMP0]], label [[EXIT:%.*]], label [[IF_THEN:%.*]] +; CHECK: if.then: +; CHECK-NEXT: br label [[EXIT]] +; CHECK: exit: +; CHECK-NEXT: [[RETVAL:%.*]] = phi i8 [ [[INC]], [[IF_THEN]] ], [ -1, [[ENTRY:%.*]] ] +; CHECK-NEXT: ret i8 [[RETVAL]] +; +entry: + %inc = add nuw nsw i8 %x, 1 + %cmp = icmp eq i8 %x, -1 + br i1 %cmp, label %exit, label %if.then + +if.then: + br label %exit + +exit: + %retval = phi i8 [ %inc, %if.then ], [ -1, %entry ] + ret i8 %retval +} From 7e7bf0bfc178ee67f22bd33a0e6d3ca5145026f8 Mon Sep 17 00:00:00 2001 From: Yingwei Zheng Date: Sun, 28 Apr 2024 20:41:35 +0800 Subject: [PATCH 2/3] [CGP] Drop poison-generating flags in optimizeBranch --- llvm/lib/CodeGen/CodeGenPrepare.cpp | 2 ++ llvm/test/Transforms/CodeGenPrepare/RISCV/convert-to-eqz.ll | 6 +++--- 2 files changed, 5 insertions(+), 3 deletions(-) diff --git a/llvm/lib/CodeGen/CodeGenPrepare.cpp b/llvm/lib/CodeGen/CodeGenPrepare.cpp index 8eaf78157550e..339a1f1f2f002 100644 --- a/llvm/lib/CodeGen/CodeGenPrepare.cpp +++ b/llvm/lib/CodeGen/CodeGenPrepare.cpp @@ -8270,6 +8270,7 @@ static bool optimizeBranch(BranchInst *Branch, const TargetLowering &TLI, IRBuilder<> Builder(Branch); if (UI->getParent() != Branch->getParent()) UI->moveBefore(Branch); + UI->dropPoisonGeneratingFlags(); Value *NewCmp = Builder.CreateCmp(ICmpInst::ICMP_EQ, UI, ConstantInt::get(UI->getType(), 0)); LLVM_DEBUG(dbgs() << "Converting " << *Cmp << "\n"); @@ -8283,6 +8284,7 @@ static bool optimizeBranch(BranchInst *Branch, const TargetLowering &TLI, IRBuilder<> Builder(Branch); if (UI->getParent() != Branch->getParent()) UI->moveBefore(Branch); + UI->dropPoisonGeneratingFlags(); Value *NewCmp = Builder.CreateCmp(Cmp->getPredicate(), UI, ConstantInt::get(UI->getType(), 0)); LLVM_DEBUG(dbgs() << "Converting " << *Cmp << "\n"); diff --git a/llvm/test/Transforms/CodeGenPrepare/RISCV/convert-to-eqz.ll b/llvm/test/Transforms/CodeGenPrepare/RISCV/convert-to-eqz.ll index cd1cdd43261f6..a6909d1491349 100644 --- a/llvm/test/Transforms/CodeGenPrepare/RISCV/convert-to-eqz.ll +++ b/llvm/test/Transforms/CodeGenPrepare/RISCV/convert-to-eqz.ll @@ -5,7 +5,7 @@ define i8 @hoist_add(i8 %x) { ; CHECK-LABEL: define i8 @hoist_add( ; CHECK-SAME: i8 [[X:%.*]]) { ; CHECK-NEXT: entry: -; CHECK-NEXT: [[INC:%.*]] = add nuw nsw i8 [[X]], 1 +; CHECK-NEXT: [[INC:%.*]] = add i8 [[X]], 1 ; CHECK-NEXT: [[TMP0:%.*]] = icmp eq i8 [[INC]], 0 ; CHECK-NEXT: br i1 [[TMP0]], label [[EXIT:%.*]], label [[IF_THEN:%.*]] ; CHECK: if.then: @@ -31,7 +31,7 @@ define i8 @hoist_lshr(i8 %x) { ; CHECK-LABEL: define i8 @hoist_lshr( ; CHECK-SAME: i8 [[X:%.*]]) { ; CHECK-NEXT: entry: -; CHECK-NEXT: [[INC:%.*]] = lshr exact i8 [[X]], 3 +; CHECK-NEXT: [[INC:%.*]] = lshr i8 [[X]], 3 ; CHECK-NEXT: [[TMP0:%.*]] = icmp eq i8 [[INC]], 0 ; CHECK-NEXT: br i1 [[TMP0]], label [[EXIT:%.*]], label [[IF_THEN:%.*]] ; CHECK: if.then: @@ -57,7 +57,7 @@ define i8 @nomove_add(i8 %x) { ; CHECK-LABEL: define i8 @nomove_add( ; CHECK-SAME: i8 [[X:%.*]]) { ; CHECK-NEXT: entry: -; CHECK-NEXT: [[INC:%.*]] = add nuw nsw i8 [[X]], 1 +; CHECK-NEXT: [[INC:%.*]] = add i8 [[X]], 1 ; CHECK-NEXT: [[TMP0:%.*]] = icmp eq i8 [[INC]], 0 ; CHECK-NEXT: br i1 [[TMP0]], label [[EXIT:%.*]], label [[IF_THEN:%.*]] ; CHECK: if.then: From e2130c4c1270d1df9ecec27e3688f0b7ab7724e5 Mon Sep 17 00:00:00 2001 From: Yingwei Zheng Date: Mon, 29 Apr 2024 12:41:28 +0800 Subject: [PATCH 3/3] [CGP] Add additional tests for ARM --- .../CodeGenPrepare/ARM/branch-on-zero.ll | 23 +++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/llvm/test/Transforms/CodeGenPrepare/ARM/branch-on-zero.ll b/llvm/test/Transforms/CodeGenPrepare/ARM/branch-on-zero.ll index ff5cef7e781fe..25dfb3c53a077 100644 --- a/llvm/test/Transforms/CodeGenPrepare/ARM/branch-on-zero.ll +++ b/llvm/test/Transforms/CodeGenPrepare/ARM/branch-on-zero.ll @@ -211,6 +211,29 @@ else: ret i32 %l } +define i32 @sub10_else_drop_nuw(i32 %a) { +; CHECK-LABEL: @sub10_else_drop_nuw( +; CHECK-NEXT: entry: +; CHECK-NEXT: [[L:%.*]] = sub i32 [[A:%.*]], 10 +; CHECK-NEXT: [[TMP0:%.*]] = icmp eq i32 [[L]], 0 +; CHECK-NEXT: br i1 [[TMP0]], label [[THEN:%.*]], label [[ELSE:%.*]] +; CHECK: then: +; CHECK-NEXT: ret i32 0 +; CHECK: else: +; CHECK-NEXT: ret i32 [[L]] +; +entry: + %c = icmp eq i32 %a, 10 + br i1 %c, label %then, label %else + +then: + ret i32 0 + +else: + %l = sub nuw i32 %a, 10 + ret i32 %l +} + define i32 @subm10_then(i32 %a) { ; CHECK-LABEL: @subm10_then( ; CHECK-NEXT: entry: