From aa983fdc13f81b21e69298853a140cc3211c6d31 Mon Sep 17 00:00:00 2001 From: Paschalis Mpeis Date: Tue, 16 Jan 2024 10:53:09 +0000 Subject: [PATCH 1/8] LAA cannot vectorize lib calls like modf/modff Functions like modf/modff are math lib calls that set memory write-only attribute. Given that a target has vectorized mappings, LAA should allow vectorization. --- ...arch64-veclib-function-calls-linear-ptrs.c | 57 +++ .../AArch64/veclib-function-calls.ll | 483 +++++++++++------- 2 files changed, 349 insertions(+), 191 deletions(-) create mode 100644 clang/test/CodeGen/aarch64-veclib-function-calls-linear-ptrs.c diff --git a/clang/test/CodeGen/aarch64-veclib-function-calls-linear-ptrs.c b/clang/test/CodeGen/aarch64-veclib-function-calls-linear-ptrs.c new file mode 100644 index 0000000000000..a449fac147058 --- /dev/null +++ b/clang/test/CodeGen/aarch64-veclib-function-calls-linear-ptrs.c @@ -0,0 +1,57 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --filter "call.*(frexp|modf)" --version 4 +// RUN: %clang --target=aarch64-linux-gnu -march=armv8-a+sve -O3 -mllvm -vector-library=ArmPL -mllvm -force-vector-interleave=1 -mllvm -prefer-predicate-over-epilogue=predicate-dont-vectorize -emit-llvm -S -o - %s | FileCheck %s + +// REQUIRES: aarch64-registered-target + +/* +Testing vectorization of math functions that have the attribute write-only to +memory set. Given they have vectorized counterparts, they should be able to +vectorize. +*/ + +// The following define is required to access some math functions. +#define _GNU_SOURCE +#include + +// frexp/frexpf have no TLI mappings yet. + +// CHECK-LABEL: define dso_local void @frexp_f64( +// CHECK-SAME: ptr nocapture noundef readonly [[IN:%.*]], ptr nocapture noundef writeonly [[OUT1:%.*]], ptr nocapture noundef writeonly [[OUT2:%.*]], i32 noundef [[N:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] { +// CHECK: [[CALL:%.*]] = tail call double @frexp(double noundef [[TMP0:%.*]], ptr noundef [[ADD_PTR:%.*]]) #[[ATTR2:[0-9]+]] +// +void frexp_f64(double *in, double *out1, int *out2, int N) { + for (int i = 0; i < N; ++i) + *out1 = frexp(in[i], out2+i); +} + +// CHECK-LABEL: define dso_local void @frexp_f32( +// CHECK-SAME: ptr nocapture noundef readonly [[IN:%.*]], ptr nocapture noundef writeonly [[OUT1:%.*]], ptr nocapture noundef writeonly [[OUT2:%.*]], i32 noundef [[N:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK: [[CALL:%.*]] = tail call float @frexpf(float noundef [[TMP0:%.*]], ptr noundef [[ADD_PTR:%.*]]) #[[ATTR2]] +// +void frexp_f32(float *in, float *out1, int *out2, int N) { + for (int i = 0; i < N; ++i) + *out1 = frexpf(in[i], out2+i); +} + + +// TODO: LAA must allow vectorization. + +// CHECK-LABEL: define dso_local void @modf_f64( +// CHECK-SAME: ptr nocapture noundef readonly [[IN:%.*]], ptr nocapture noundef writeonly [[OUT1:%.*]], ptr nocapture noundef writeonly [[OUT2:%.*]], i32 noundef [[N:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK: [[CALL:%.*]] = tail call double @modf(double noundef [[TMP0:%.*]], ptr noundef [[ADD_PTR:%.*]]) #[[ATTR3:[0-9]+]] +// +void modf_f64(double *in, double *out1, double *out2, int N) { + for (int i = 0; i < N; ++i) + out1[i] = modf(in[i], out2+i); +} + +// TODO: LAA must allow vectorization. + +// CHECK-LABEL: define dso_local void @modf_f32( +// CHECK-SAME: ptr nocapture noundef readonly [[IN:%.*]], ptr nocapture noundef writeonly [[OUT1:%.*]], ptr nocapture noundef writeonly [[OUT2:%.*]], i32 noundef [[N:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK: [[CALL:%.*]] = tail call float @modff(float noundef [[TMP0:%.*]], ptr noundef [[ADD_PTR:%.*]]) #[[ATTR4:[0-9]+]] +// +void modf_f32(float *in, float *out1, float *out2, int N) { + for (int i = 0; i < N; ++i) + out1[i] = modff(in[i], out2+i); +} diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/veclib-function-calls.ll b/llvm/test/Transforms/LoopVectorize/AArch64/veclib-function-calls.ll index d9cc630482fc8..0eb2b5d087401 100644 --- a/llvm/test/Transforms/LoopVectorize/AArch64/veclib-function-calls.ll +++ b/llvm/test/Transforms/LoopVectorize/AArch64/veclib-function-calls.ll @@ -1,4 +1,4 @@ -; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --filter "call.*(cos|sin|tan|cbrt|erf|exp[^e]|gamma|log|sqrt|copysign|dim|min|mod|hypot|nextafter|pow|fma)" --version 2 +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --filter "call.*(cos|sin|tan|cbrt|erf|exp[^e]|frexp|modf|gamma|log|sqrt|copysign|dim|min|mod|hypot|nextafter|pow|fma)" --version 2 ; RUN: opt -mattr=+neon -vector-library=sleefgnuabi -passes=inject-tli-mappings,loop-vectorize,simplifycfg -force-vector-interleave=1 -S < %s | FileCheck %s -check-prefix=SLEEF-NEON ; RUN: opt -mattr=+sve -vector-library=sleefgnuabi -passes=inject-tli-mappings,loop-vectorize,simplifycfg -force-vector-interleave=1 -prefer-predicate-over-epilogue=predicate-dont-vectorize -S < %s | FileCheck %s -check-prefix=SLEEF-SVE ; RUN: opt -mattr=+sve -vector-library=sleefgnuabi -passes=inject-tli-mappings,loop-vectorize,simplifycfg -force-vector-interleave=1 -S < %s | FileCheck %s -check-prefixes=SLEEF-SVE-NOPRED @@ -30,7 +30,7 @@ define void @acos_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; SLEEF-SVE-NOPRED-LABEL: define void @acos_f64 ; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0:[0-9]+]] { ; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call @_ZGVsMxv_acos( [[WIDE_LOAD:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call double @acos(double [[IN:%.*]]) #[[ATTR2:[0-9]+]] +; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call double @acos(double [[IN:%.*]]) #[[ATTR3:[0-9]+]] ; ; ARMPL-NEON-LABEL: define void @acos_f64 ; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0:[0-9]+]] { @@ -43,7 +43,7 @@ define void @acos_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; ARMPL-SVE-NOPRED-LABEL: define void @acos_f64 ; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0:[0-9]+]] { ; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call @armpl_svacos_f64_x( [[WIDE_LOAD:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call double @acos(double [[IN:%.*]]) #[[ATTR2:[0-9]+]] +; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call double @acos(double [[IN:%.*]]) #[[ATTR3:[0-9]+]] ; entry: br label %for.body @@ -75,7 +75,7 @@ define void @acos_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; SLEEF-SVE-NOPRED-LABEL: define void @acos_f32 ; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call @_ZGVsMxv_acosf( [[WIDE_LOAD:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call float @acosf(float [[IN:%.*]]) #[[ATTR3:[0-9]+]] +; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call float @acosf(float [[IN:%.*]]) #[[ATTR4:[0-9]+]] ; ; ARMPL-NEON-LABEL: define void @acos_f32 ; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { @@ -88,7 +88,7 @@ define void @acos_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; ARMPL-SVE-NOPRED-LABEL: define void @acos_f32 ; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call @armpl_svacos_f32_x( [[WIDE_LOAD:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call float @acosf(float [[IN:%.*]]) #[[ATTR3:[0-9]+]] +; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call float @acosf(float [[IN:%.*]]) #[[ATTR4:[0-9]+]] ; entry: br label %for.body @@ -123,7 +123,7 @@ define void @acosh_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; SLEEF-SVE-NOPRED-LABEL: define void @acosh_f64 ; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call @_ZGVsMxv_acosh( [[WIDE_LOAD:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call double @acosh(double [[IN:%.*]]) #[[ATTR4:[0-9]+]] +; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call double @acosh(double [[IN:%.*]]) #[[ATTR5:[0-9]+]] ; ; ARMPL-NEON-LABEL: define void @acosh_f64 ; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { @@ -136,7 +136,7 @@ define void @acosh_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; ARMPL-SVE-NOPRED-LABEL: define void @acosh_f64 ; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call @armpl_svacosh_f64_x( [[WIDE_LOAD:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call double @acosh(double [[IN:%.*]]) #[[ATTR4:[0-9]+]] +; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call double @acosh(double [[IN:%.*]]) #[[ATTR5:[0-9]+]] ; entry: br label %for.body @@ -168,7 +168,7 @@ define void @acosh_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; SLEEF-SVE-NOPRED-LABEL: define void @acosh_f32 ; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call @_ZGVsMxv_acoshf( [[WIDE_LOAD:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call float @acoshf(float [[IN:%.*]]) #[[ATTR5:[0-9]+]] +; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call float @acoshf(float [[IN:%.*]]) #[[ATTR6:[0-9]+]] ; ; ARMPL-NEON-LABEL: define void @acosh_f32 ; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { @@ -181,7 +181,7 @@ define void @acosh_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; ARMPL-SVE-NOPRED-LABEL: define void @acosh_f32 ; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call @armpl_svacosh_f32_x( [[WIDE_LOAD:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call float @acoshf(float [[IN:%.*]]) #[[ATTR5:[0-9]+]] +; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call float @acoshf(float [[IN:%.*]]) #[[ATTR6:[0-9]+]] ; entry: br label %for.body @@ -216,7 +216,7 @@ define void @asin_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; SLEEF-SVE-NOPRED-LABEL: define void @asin_f64 ; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call @_ZGVsMxv_asin( [[WIDE_LOAD:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call double @asin(double [[IN:%.*]]) #[[ATTR6:[0-9]+]] +; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call double @asin(double [[IN:%.*]]) #[[ATTR7:[0-9]+]] ; ; ARMPL-NEON-LABEL: define void @asin_f64 ; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { @@ -229,7 +229,7 @@ define void @asin_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; ARMPL-SVE-NOPRED-LABEL: define void @asin_f64 ; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call @armpl_svasin_f64_x( [[WIDE_LOAD:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call double @asin(double [[IN:%.*]]) #[[ATTR6:[0-9]+]] +; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call double @asin(double [[IN:%.*]]) #[[ATTR7:[0-9]+]] ; entry: br label %for.body @@ -261,7 +261,7 @@ define void @asin_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; SLEEF-SVE-NOPRED-LABEL: define void @asin_f32 ; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call @_ZGVsMxv_asinf( [[WIDE_LOAD:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call float @asinf(float [[IN:%.*]]) #[[ATTR7:[0-9]+]] +; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call float @asinf(float [[IN:%.*]]) #[[ATTR8:[0-9]+]] ; ; ARMPL-NEON-LABEL: define void @asin_f32 ; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { @@ -274,7 +274,7 @@ define void @asin_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; ARMPL-SVE-NOPRED-LABEL: define void @asin_f32 ; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call @armpl_svasin_f32_x( [[WIDE_LOAD:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call float @asinf(float [[IN:%.*]]) #[[ATTR7:[0-9]+]] +; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call float @asinf(float [[IN:%.*]]) #[[ATTR8:[0-9]+]] ; entry: br label %for.body @@ -309,7 +309,7 @@ define void @asinh_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; SLEEF-SVE-NOPRED-LABEL: define void @asinh_f64 ; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call @_ZGVsMxv_asinh( [[WIDE_LOAD:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call double @asinh(double [[IN:%.*]]) #[[ATTR8:[0-9]+]] +; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call double @asinh(double [[IN:%.*]]) #[[ATTR9:[0-9]+]] ; ; ARMPL-NEON-LABEL: define void @asinh_f64 ; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { @@ -322,7 +322,7 @@ define void @asinh_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; ARMPL-SVE-NOPRED-LABEL: define void @asinh_f64 ; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call @armpl_svasinh_f64_x( [[WIDE_LOAD:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call double @asinh(double [[IN:%.*]]) #[[ATTR8:[0-9]+]] +; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call double @asinh(double [[IN:%.*]]) #[[ATTR9:[0-9]+]] ; entry: br label %for.body @@ -354,7 +354,7 @@ define void @asinh_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; SLEEF-SVE-NOPRED-LABEL: define void @asinh_f32 ; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call @_ZGVsMxv_asinhf( [[WIDE_LOAD:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call float @asinhf(float [[IN:%.*]]) #[[ATTR9:[0-9]+]] +; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call float @asinhf(float [[IN:%.*]]) #[[ATTR10:[0-9]+]] ; ; ARMPL-NEON-LABEL: define void @asinh_f32 ; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { @@ -367,7 +367,7 @@ define void @asinh_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; ARMPL-SVE-NOPRED-LABEL: define void @asinh_f32 ; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call @armpl_svasinh_f32_x( [[WIDE_LOAD:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call float @asinhf(float [[IN:%.*]]) #[[ATTR9:[0-9]+]] +; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call float @asinhf(float [[IN:%.*]]) #[[ATTR10:[0-9]+]] ; entry: br label %for.body @@ -402,7 +402,7 @@ define void @atan_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; SLEEF-SVE-NOPRED-LABEL: define void @atan_f64 ; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call @_ZGVsMxv_atan( [[WIDE_LOAD:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call double @atan(double [[IN:%.*]]) #[[ATTR10:[0-9]+]] +; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call double @atan(double [[IN:%.*]]) #[[ATTR11:[0-9]+]] ; ; ARMPL-NEON-LABEL: define void @atan_f64 ; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { @@ -415,7 +415,7 @@ define void @atan_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; ARMPL-SVE-NOPRED-LABEL: define void @atan_f64 ; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call @armpl_svatan_f64_x( [[WIDE_LOAD:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call double @atan(double [[IN:%.*]]) #[[ATTR10:[0-9]+]] +; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call double @atan(double [[IN:%.*]]) #[[ATTR11:[0-9]+]] ; entry: br label %for.body @@ -447,7 +447,7 @@ define void @atan_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; SLEEF-SVE-NOPRED-LABEL: define void @atan_f32 ; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call @_ZGVsMxv_atanf( [[WIDE_LOAD:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call float @atanf(float [[IN:%.*]]) #[[ATTR11:[0-9]+]] +; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call float @atanf(float [[IN:%.*]]) #[[ATTR12:[0-9]+]] ; ; ARMPL-NEON-LABEL: define void @atan_f32 ; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { @@ -460,7 +460,7 @@ define void @atan_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; ARMPL-SVE-NOPRED-LABEL: define void @atan_f32 ; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call @armpl_svatan_f32_x( [[WIDE_LOAD:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call float @atanf(float [[IN:%.*]]) #[[ATTR11:[0-9]+]] +; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call float @atanf(float [[IN:%.*]]) #[[ATTR12:[0-9]+]] ; entry: br label %for.body @@ -495,7 +495,7 @@ define void @atan2_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; SLEEF-SVE-NOPRED-LABEL: define void @atan2_f64 ; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call @_ZGVsMxvv_atan2( [[WIDE_LOAD:%.*]], [[WIDE_LOAD]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call double @atan2(double [[IN:%.*]], double [[IN]]) #[[ATTR12:[0-9]+]] +; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call double @atan2(double [[IN:%.*]], double [[IN]]) #[[ATTR13:[0-9]+]] ; ; ARMPL-NEON-LABEL: define void @atan2_f64 ; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { @@ -508,7 +508,7 @@ define void @atan2_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; ARMPL-SVE-NOPRED-LABEL: define void @atan2_f64 ; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call @armpl_svatan2_f64_x( [[WIDE_LOAD:%.*]], [[WIDE_LOAD]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call double @atan2(double [[IN:%.*]], double [[IN]]) #[[ATTR12:[0-9]+]] +; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call double @atan2(double [[IN:%.*]], double [[IN]]) #[[ATTR13:[0-9]+]] ; entry: br label %for.body @@ -540,7 +540,7 @@ define void @atan2_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; SLEEF-SVE-NOPRED-LABEL: define void @atan2_f32 ; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call @_ZGVsMxvv_atan2f( [[WIDE_LOAD:%.*]], [[WIDE_LOAD]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call float @atan2f(float [[IN:%.*]], float [[IN]]) #[[ATTR13:[0-9]+]] +; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call float @atan2f(float [[IN:%.*]], float [[IN]]) #[[ATTR14:[0-9]+]] ; ; ARMPL-NEON-LABEL: define void @atan2_f32 ; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { @@ -553,7 +553,7 @@ define void @atan2_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; ARMPL-SVE-NOPRED-LABEL: define void @atan2_f32 ; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call @armpl_svatan2_f32_x( [[WIDE_LOAD:%.*]], [[WIDE_LOAD]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call float @atan2f(float [[IN:%.*]], float [[IN]]) #[[ATTR13:[0-9]+]] +; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call float @atan2f(float [[IN:%.*]], float [[IN]]) #[[ATTR14:[0-9]+]] ; entry: br label %for.body @@ -588,7 +588,7 @@ define void @atanh_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; SLEEF-SVE-NOPRED-LABEL: define void @atanh_f64 ; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call @_ZGVsMxv_atanh( [[WIDE_LOAD:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call double @atanh(double [[IN:%.*]]) #[[ATTR14:[0-9]+]] +; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call double @atanh(double [[IN:%.*]]) #[[ATTR15:[0-9]+]] ; ; ARMPL-NEON-LABEL: define void @atanh_f64 ; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { @@ -601,7 +601,7 @@ define void @atanh_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; ARMPL-SVE-NOPRED-LABEL: define void @atanh_f64 ; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call @armpl_svatanh_f64_x( [[WIDE_LOAD:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call double @atanh(double [[IN:%.*]]) #[[ATTR14:[0-9]+]] +; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call double @atanh(double [[IN:%.*]]) #[[ATTR15:[0-9]+]] ; entry: br label %for.body @@ -633,7 +633,7 @@ define void @atanh_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; SLEEF-SVE-NOPRED-LABEL: define void @atanh_f32 ; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call @_ZGVsMxv_atanhf( [[WIDE_LOAD:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call float @atanhf(float [[IN:%.*]]) #[[ATTR15:[0-9]+]] +; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call float @atanhf(float [[IN:%.*]]) #[[ATTR16:[0-9]+]] ; ; ARMPL-NEON-LABEL: define void @atanh_f32 ; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { @@ -646,7 +646,7 @@ define void @atanh_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; ARMPL-SVE-NOPRED-LABEL: define void @atanh_f32 ; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call @armpl_svatanh_f32_x( [[WIDE_LOAD:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call float @atanhf(float [[IN:%.*]]) #[[ATTR15:[0-9]+]] +; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call float @atanhf(float [[IN:%.*]]) #[[ATTR16:[0-9]+]] ; entry: br label %for.body @@ -681,7 +681,7 @@ define void @cbrt_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; SLEEF-SVE-NOPRED-LABEL: define void @cbrt_f64 ; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call @_ZGVsMxv_cbrt( [[WIDE_LOAD:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call double @cbrt(double [[IN:%.*]]) #[[ATTR16:[0-9]+]] +; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call double @cbrt(double [[IN:%.*]]) #[[ATTR17:[0-9]+]] ; ; ARMPL-NEON-LABEL: define void @cbrt_f64 ; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { @@ -694,7 +694,7 @@ define void @cbrt_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; ARMPL-SVE-NOPRED-LABEL: define void @cbrt_f64 ; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call @armpl_svcbrt_f64_x( [[WIDE_LOAD:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call double @cbrt(double [[IN:%.*]]) #[[ATTR16:[0-9]+]] +; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call double @cbrt(double [[IN:%.*]]) #[[ATTR17:[0-9]+]] ; entry: br label %for.body @@ -726,7 +726,7 @@ define void @cbrt_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; SLEEF-SVE-NOPRED-LABEL: define void @cbrt_f32 ; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call @_ZGVsMxv_cbrtf( [[WIDE_LOAD:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call float @cbrtf(float [[IN:%.*]]) #[[ATTR17:[0-9]+]] +; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call float @cbrtf(float [[IN:%.*]]) #[[ATTR18:[0-9]+]] ; ; ARMPL-NEON-LABEL: define void @cbrt_f32 ; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { @@ -739,7 +739,7 @@ define void @cbrt_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; ARMPL-SVE-NOPRED-LABEL: define void @cbrt_f32 ; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call @armpl_svcbrt_f32_x( [[WIDE_LOAD:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call float @cbrtf(float [[IN:%.*]]) #[[ATTR17:[0-9]+]] +; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call float @cbrtf(float [[IN:%.*]]) #[[ATTR18:[0-9]+]] ; entry: br label %for.body @@ -774,7 +774,7 @@ define void @copysign_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; SLEEF-SVE-NOPRED-LABEL: define void @copysign_f64 ; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call @_ZGVsMxvv_copysign( [[WIDE_LOAD:%.*]], [[WIDE_LOAD]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call double @copysign(double [[IN:%.*]], double [[IN]]) #[[ATTR18:[0-9]+]] +; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call double @copysign(double [[IN:%.*]], double [[IN]]) #[[ATTR19:[0-9]+]] ; ; ARMPL-NEON-LABEL: define void @copysign_f64 ; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { @@ -787,7 +787,7 @@ define void @copysign_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; ARMPL-SVE-NOPRED-LABEL: define void @copysign_f64 ; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call @armpl_svcopysign_f64_x( [[WIDE_LOAD:%.*]], [[WIDE_LOAD]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call double @copysign(double [[IN:%.*]], double [[IN]]) #[[ATTR18:[0-9]+]] +; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call double @copysign(double [[IN:%.*]], double [[IN]]) #[[ATTR19:[0-9]+]] ; entry: br label %for.body @@ -819,7 +819,7 @@ define void @copysign_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; SLEEF-SVE-NOPRED-LABEL: define void @copysign_f32 ; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call @_ZGVsMxvv_copysignf( [[WIDE_LOAD:%.*]], [[WIDE_LOAD]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call float @copysignf(float [[IN:%.*]], float [[IN]]) #[[ATTR19:[0-9]+]] +; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call float @copysignf(float [[IN:%.*]], float [[IN]]) #[[ATTR20:[0-9]+]] ; ; ARMPL-NEON-LABEL: define void @copysign_f32 ; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { @@ -832,7 +832,7 @@ define void @copysign_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; ARMPL-SVE-NOPRED-LABEL: define void @copysign_f32 ; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call @armpl_svcopysign_f32_x( [[WIDE_LOAD:%.*]], [[WIDE_LOAD]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call float @copysignf(float [[IN:%.*]], float [[IN]]) #[[ATTR19:[0-9]+]] +; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call float @copysignf(float [[IN:%.*]], float [[IN]]) #[[ATTR20:[0-9]+]] ; entry: br label %for.body @@ -867,7 +867,7 @@ define void @cos_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; SLEEF-SVE-NOPRED-LABEL: define void @cos_f64 ; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call @_ZGVsMxv_cos( [[WIDE_LOAD:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call double @cos(double [[IN:%.*]]) #[[ATTR20:[0-9]+]] +; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call double @cos(double [[IN:%.*]]) #[[ATTR21:[0-9]+]] ; ; ARMPL-NEON-LABEL: define void @cos_f64 ; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { @@ -880,7 +880,7 @@ define void @cos_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; ARMPL-SVE-NOPRED-LABEL: define void @cos_f64 ; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call @armpl_svcos_f64_x( [[WIDE_LOAD:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call double @cos(double [[IN:%.*]]) #[[ATTR20:[0-9]+]] +; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call double @cos(double [[IN:%.*]]) #[[ATTR21:[0-9]+]] ; entry: br label %for.body @@ -912,7 +912,7 @@ define void @cos_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; SLEEF-SVE-NOPRED-LABEL: define void @cos_f32 ; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call @_ZGVsMxv_cosf( [[WIDE_LOAD:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call float @cosf(float [[IN:%.*]]) #[[ATTR21:[0-9]+]] +; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call float @cosf(float [[IN:%.*]]) #[[ATTR22:[0-9]+]] ; ; ARMPL-NEON-LABEL: define void @cos_f32 ; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { @@ -925,7 +925,7 @@ define void @cos_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; ARMPL-SVE-NOPRED-LABEL: define void @cos_f32 ; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call @armpl_svcos_f32_x( [[WIDE_LOAD:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call float @cosf(float [[IN:%.*]]) #[[ATTR21:[0-9]+]] +; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call float @cosf(float [[IN:%.*]]) #[[ATTR22:[0-9]+]] ; entry: br label %for.body @@ -960,7 +960,7 @@ define void @cosh_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; SLEEF-SVE-NOPRED-LABEL: define void @cosh_f64 ; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call @_ZGVsMxv_cosh( [[WIDE_LOAD:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call double @cosh(double [[IN:%.*]]) #[[ATTR22:[0-9]+]] +; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call double @cosh(double [[IN:%.*]]) #[[ATTR23:[0-9]+]] ; ; ARMPL-NEON-LABEL: define void @cosh_f64 ; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { @@ -973,7 +973,7 @@ define void @cosh_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; ARMPL-SVE-NOPRED-LABEL: define void @cosh_f64 ; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call @armpl_svcosh_f64_x( [[WIDE_LOAD:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call double @cosh(double [[IN:%.*]]) #[[ATTR22:[0-9]+]] +; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call double @cosh(double [[IN:%.*]]) #[[ATTR23:[0-9]+]] ; entry: br label %for.body @@ -1005,7 +1005,7 @@ define void @cosh_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; SLEEF-SVE-NOPRED-LABEL: define void @cosh_f32 ; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call @_ZGVsMxv_coshf( [[WIDE_LOAD:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call float @coshf(float [[IN:%.*]]) #[[ATTR23:[0-9]+]] +; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call float @coshf(float [[IN:%.*]]) #[[ATTR24:[0-9]+]] ; ; ARMPL-NEON-LABEL: define void @cosh_f32 ; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { @@ -1018,7 +1018,7 @@ define void @cosh_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; ARMPL-SVE-NOPRED-LABEL: define void @cosh_f32 ; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call @armpl_svcosh_f32_x( [[WIDE_LOAD:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call float @coshf(float [[IN:%.*]]) #[[ATTR23:[0-9]+]] +; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call float @coshf(float [[IN:%.*]]) #[[ATTR24:[0-9]+]] ; entry: br label %for.body @@ -1053,7 +1053,7 @@ define void @cospi_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; SLEEF-SVE-NOPRED-LABEL: define void @cospi_f64 ; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call @_ZGVsMxv_cospi( [[WIDE_LOAD:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call double @cospi(double [[IN:%.*]]) #[[ATTR24:[0-9]+]] +; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call double @cospi(double [[IN:%.*]]) #[[ATTR25:[0-9]+]] ; ; ARMPL-NEON-LABEL: define void @cospi_f64 ; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { @@ -1066,7 +1066,7 @@ define void @cospi_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; ARMPL-SVE-NOPRED-LABEL: define void @cospi_f64 ; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call @armpl_svcospi_f64_x( [[WIDE_LOAD:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call double @cospi(double [[IN:%.*]]) #[[ATTR24:[0-9]+]] +; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call double @cospi(double [[IN:%.*]]) #[[ATTR25:[0-9]+]] ; entry: br label %for.body @@ -1098,7 +1098,7 @@ define void @cospi_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; SLEEF-SVE-NOPRED-LABEL: define void @cospi_f32 ; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call @_ZGVsMxv_cospif( [[WIDE_LOAD:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call float @cospif(float [[IN:%.*]]) #[[ATTR25:[0-9]+]] +; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call float @cospif(float [[IN:%.*]]) #[[ATTR26:[0-9]+]] ; ; ARMPL-NEON-LABEL: define void @cospi_f32 ; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { @@ -1111,7 +1111,7 @@ define void @cospi_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; ARMPL-SVE-NOPRED-LABEL: define void @cospi_f32 ; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call @armpl_svcospi_f32_x( [[WIDE_LOAD:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call float @cospif(float [[IN:%.*]]) #[[ATTR25:[0-9]+]] +; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call float @cospif(float [[IN:%.*]]) #[[ATTR26:[0-9]+]] ; entry: br label %for.body @@ -1146,7 +1146,7 @@ define void @erf_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; SLEEF-SVE-NOPRED-LABEL: define void @erf_f64 ; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call @_ZGVsMxv_erf( [[WIDE_LOAD:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call double @erf(double [[IN:%.*]]) #[[ATTR26:[0-9]+]] +; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call double @erf(double [[IN:%.*]]) #[[ATTR27:[0-9]+]] ; ; ARMPL-NEON-LABEL: define void @erf_f64 ; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { @@ -1159,7 +1159,7 @@ define void @erf_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; ARMPL-SVE-NOPRED-LABEL: define void @erf_f64 ; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call @armpl_sverf_f64_x( [[WIDE_LOAD:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call double @erf(double [[IN:%.*]]) #[[ATTR26:[0-9]+]] +; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call double @erf(double [[IN:%.*]]) #[[ATTR27:[0-9]+]] ; entry: br label %for.body @@ -1191,7 +1191,7 @@ define void @erf_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; SLEEF-SVE-NOPRED-LABEL: define void @erf_f32 ; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call @_ZGVsMxv_erff( [[WIDE_LOAD:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call float @erff(float [[IN:%.*]]) #[[ATTR27:[0-9]+]] +; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call float @erff(float [[IN:%.*]]) #[[ATTR28:[0-9]+]] ; ; ARMPL-NEON-LABEL: define void @erf_f32 ; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { @@ -1204,7 +1204,7 @@ define void @erf_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; ARMPL-SVE-NOPRED-LABEL: define void @erf_f32 ; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call @armpl_sverf_f32_x( [[WIDE_LOAD:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call float @erff(float [[IN:%.*]]) #[[ATTR27:[0-9]+]] +; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call float @erff(float [[IN:%.*]]) #[[ATTR28:[0-9]+]] ; entry: br label %for.body @@ -1239,7 +1239,7 @@ define void @erfc_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; SLEEF-SVE-NOPRED-LABEL: define void @erfc_f64 ; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call @_ZGVsMxv_erfc( [[WIDE_LOAD:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call double @erfc(double [[IN:%.*]]) #[[ATTR28:[0-9]+]] +; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call double @erfc(double [[IN:%.*]]) #[[ATTR29:[0-9]+]] ; ; ARMPL-NEON-LABEL: define void @erfc_f64 ; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { @@ -1252,7 +1252,7 @@ define void @erfc_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; ARMPL-SVE-NOPRED-LABEL: define void @erfc_f64 ; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call @armpl_sverfc_f64_x( [[WIDE_LOAD:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call double @erfc(double [[IN:%.*]]) #[[ATTR28:[0-9]+]] +; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call double @erfc(double [[IN:%.*]]) #[[ATTR29:[0-9]+]] ; entry: br label %for.body @@ -1284,7 +1284,7 @@ define void @erfc_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; SLEEF-SVE-NOPRED-LABEL: define void @erfc_f32 ; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call @_ZGVsMxv_erfcf( [[WIDE_LOAD:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call float @erfcf(float [[IN:%.*]]) #[[ATTR29:[0-9]+]] +; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call float @erfcf(float [[IN:%.*]]) #[[ATTR30:[0-9]+]] ; ; ARMPL-NEON-LABEL: define void @erfc_f32 ; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { @@ -1297,7 +1297,7 @@ define void @erfc_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; ARMPL-SVE-NOPRED-LABEL: define void @erfc_f32 ; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call @armpl_sverfc_f32_x( [[WIDE_LOAD:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call float @erfcf(float [[IN:%.*]]) #[[ATTR29:[0-9]+]] +; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call float @erfcf(float [[IN:%.*]]) #[[ATTR30:[0-9]+]] ; entry: br label %for.body @@ -1332,7 +1332,7 @@ define void @exp_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; SLEEF-SVE-NOPRED-LABEL: define void @exp_f64 ; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call @_ZGVsMxv_exp( [[WIDE_LOAD:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call double @exp(double [[IN:%.*]]) #[[ATTR30:[0-9]+]] +; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call double @exp(double [[IN:%.*]]) #[[ATTR31:[0-9]+]] ; ; ARMPL-NEON-LABEL: define void @exp_f64 ; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { @@ -1345,7 +1345,7 @@ define void @exp_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; ARMPL-SVE-NOPRED-LABEL: define void @exp_f64 ; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call @armpl_svexp_f64_x( [[WIDE_LOAD:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call double @exp(double [[IN:%.*]]) #[[ATTR30:[0-9]+]] +; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call double @exp(double [[IN:%.*]]) #[[ATTR31:[0-9]+]] ; entry: br label %for.body @@ -1377,7 +1377,7 @@ define void @exp_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; SLEEF-SVE-NOPRED-LABEL: define void @exp_f32 ; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call @_ZGVsMxv_expf( [[WIDE_LOAD:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call float @expf(float [[IN:%.*]]) #[[ATTR31:[0-9]+]] +; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call float @expf(float [[IN:%.*]]) #[[ATTR32:[0-9]+]] ; ; ARMPL-NEON-LABEL: define void @exp_f32 ; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { @@ -1390,7 +1390,7 @@ define void @exp_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; ARMPL-SVE-NOPRED-LABEL: define void @exp_f32 ; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call @armpl_svexp_f32_x( [[WIDE_LOAD:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call float @expf(float [[IN:%.*]]) #[[ATTR31:[0-9]+]] +; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call float @expf(float [[IN:%.*]]) #[[ATTR32:[0-9]+]] ; entry: br label %for.body @@ -1425,7 +1425,7 @@ define void @exp10_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; SLEEF-SVE-NOPRED-LABEL: define void @exp10_f64 ; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call @_ZGVsMxv_exp10( [[WIDE_LOAD:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call double @exp10(double [[IN:%.*]]) #[[ATTR32:[0-9]+]] +; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call double @exp10(double [[IN:%.*]]) #[[ATTR33:[0-9]+]] ; ; ARMPL-NEON-LABEL: define void @exp10_f64 ; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { @@ -1438,7 +1438,7 @@ define void @exp10_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; ARMPL-SVE-NOPRED-LABEL: define void @exp10_f64 ; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call @armpl_svexp10_f64_x( [[WIDE_LOAD:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call double @exp10(double [[IN:%.*]]) #[[ATTR32:[0-9]+]] +; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call double @exp10(double [[IN:%.*]]) #[[ATTR33:[0-9]+]] ; entry: br label %for.body @@ -1470,7 +1470,7 @@ define void @exp10_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; SLEEF-SVE-NOPRED-LABEL: define void @exp10_f32 ; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call @_ZGVsMxv_exp10f( [[WIDE_LOAD:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call float @exp10f(float [[IN:%.*]]) #[[ATTR33:[0-9]+]] +; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call float @exp10f(float [[IN:%.*]]) #[[ATTR34:[0-9]+]] ; ; ARMPL-NEON-LABEL: define void @exp10_f32 ; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { @@ -1483,7 +1483,7 @@ define void @exp10_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; ARMPL-SVE-NOPRED-LABEL: define void @exp10_f32 ; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call @armpl_svexp10_f32_x( [[WIDE_LOAD:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call float @exp10f(float [[IN:%.*]]) #[[ATTR33:[0-9]+]] +; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call float @exp10f(float [[IN:%.*]]) #[[ATTR34:[0-9]+]] ; entry: br label %for.body @@ -1518,7 +1518,7 @@ define void @exp2_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; SLEEF-SVE-NOPRED-LABEL: define void @exp2_f64 ; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call @_ZGVsMxv_exp2( [[WIDE_LOAD:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call double @exp2(double [[IN:%.*]]) #[[ATTR34:[0-9]+]] +; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call double @exp2(double [[IN:%.*]]) #[[ATTR35:[0-9]+]] ; ; ARMPL-NEON-LABEL: define void @exp2_f64 ; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { @@ -1531,7 +1531,7 @@ define void @exp2_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; ARMPL-SVE-NOPRED-LABEL: define void @exp2_f64 ; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call @armpl_svexp2_f64_x( [[WIDE_LOAD:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call double @exp2(double [[IN:%.*]]) #[[ATTR34:[0-9]+]] +; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call double @exp2(double [[IN:%.*]]) #[[ATTR35:[0-9]+]] ; entry: br label %for.body @@ -1563,7 +1563,7 @@ define void @exp2_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; SLEEF-SVE-NOPRED-LABEL: define void @exp2_f32 ; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call @_ZGVsMxv_exp2f( [[WIDE_LOAD:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call float @exp2f(float [[IN:%.*]]) #[[ATTR35:[0-9]+]] +; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call float @exp2f(float [[IN:%.*]]) #[[ATTR36:[0-9]+]] ; ; ARMPL-NEON-LABEL: define void @exp2_f32 ; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { @@ -1576,7 +1576,7 @@ define void @exp2_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; ARMPL-SVE-NOPRED-LABEL: define void @exp2_f32 ; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call @armpl_svexp2_f32_x( [[WIDE_LOAD:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call float @exp2f(float [[IN:%.*]]) #[[ATTR35:[0-9]+]] +; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call float @exp2f(float [[IN:%.*]]) #[[ATTR36:[0-9]+]] ; entry: br label %for.body @@ -1611,7 +1611,7 @@ define void @expm1_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; SLEEF-SVE-NOPRED-LABEL: define void @expm1_f64 ; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call @_ZGVsMxv_expm1( [[WIDE_LOAD:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call double @expm1(double [[IN:%.*]]) #[[ATTR36:[0-9]+]] +; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call double @expm1(double [[IN:%.*]]) #[[ATTR37:[0-9]+]] ; ; ARMPL-NEON-LABEL: define void @expm1_f64 ; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { @@ -1624,7 +1624,7 @@ define void @expm1_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; ARMPL-SVE-NOPRED-LABEL: define void @expm1_f64 ; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call @armpl_svexpm1_f64_x( [[WIDE_LOAD:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call double @expm1(double [[IN:%.*]]) #[[ATTR36:[0-9]+]] +; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call double @expm1(double [[IN:%.*]]) #[[ATTR37:[0-9]+]] ; entry: br label %for.body @@ -1656,7 +1656,7 @@ define void @expm1_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; SLEEF-SVE-NOPRED-LABEL: define void @expm1_f32 ; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call @_ZGVsMxv_expm1f( [[WIDE_LOAD:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call float @expm1f(float [[IN:%.*]]) #[[ATTR37:[0-9]+]] +; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call float @expm1f(float [[IN:%.*]]) #[[ATTR38:[0-9]+]] ; ; ARMPL-NEON-LABEL: define void @expm1_f32 ; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { @@ -1669,7 +1669,7 @@ define void @expm1_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; ARMPL-SVE-NOPRED-LABEL: define void @expm1_f32 ; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call @armpl_svexpm1_f32_x( [[WIDE_LOAD:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call float @expm1f(float [[IN:%.*]]) #[[ATTR37:[0-9]+]] +; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call float @expm1f(float [[IN:%.*]]) #[[ATTR38:[0-9]+]] ; entry: br label %for.body @@ -1704,7 +1704,7 @@ define void @fdim_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; SLEEF-SVE-NOPRED-LABEL: define void @fdim_f64 ; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call @_ZGVsMxvv_fdim( [[WIDE_LOAD:%.*]], [[WIDE_LOAD]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call double @fdim(double [[IN:%.*]], double [[IN]]) #[[ATTR38:[0-9]+]] +; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call double @fdim(double [[IN:%.*]], double [[IN]]) #[[ATTR39:[0-9]+]] ; ; ARMPL-NEON-LABEL: define void @fdim_f64 ; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { @@ -1717,7 +1717,7 @@ define void @fdim_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; ARMPL-SVE-NOPRED-LABEL: define void @fdim_f64 ; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call @armpl_svfdim_f64_x( [[WIDE_LOAD:%.*]], [[WIDE_LOAD]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call double @fdim(double [[IN:%.*]], double [[IN]]) #[[ATTR38:[0-9]+]] +; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call double @fdim(double [[IN:%.*]], double [[IN]]) #[[ATTR39:[0-9]+]] ; entry: br label %for.body @@ -1749,7 +1749,7 @@ define void @fdim_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; SLEEF-SVE-NOPRED-LABEL: define void @fdim_f32 ; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call @_ZGVsMxvv_fdimf( [[WIDE_LOAD:%.*]], [[WIDE_LOAD]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call float @fdimf(float [[IN:%.*]], float [[IN]]) #[[ATTR39:[0-9]+]] +; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call float @fdimf(float [[IN:%.*]], float [[IN]]) #[[ATTR40:[0-9]+]] ; ; ARMPL-NEON-LABEL: define void @fdim_f32 ; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { @@ -1762,7 +1762,7 @@ define void @fdim_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; ARMPL-SVE-NOPRED-LABEL: define void @fdim_f32 ; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call @armpl_svfdim_f32_x( [[WIDE_LOAD:%.*]], [[WIDE_LOAD]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call float @fdimf(float [[IN:%.*]], float [[IN]]) #[[ATTR39:[0-9]+]] +; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call float @fdimf(float [[IN:%.*]], float [[IN]]) #[[ATTR40:[0-9]+]] ; entry: br label %for.body @@ -1797,7 +1797,7 @@ define void @fma_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; SLEEF-SVE-NOPRED-LABEL: define void @fma_f64 ; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call @_ZGVsMxvvv_fma( [[WIDE_LOAD:%.*]], [[WIDE_LOAD]], [[WIDE_LOAD]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call double @fma(double [[IN:%.*]], double [[IN]], double [[IN]]) #[[ATTR40:[0-9]+]] +; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call double @fma(double [[IN:%.*]], double [[IN]], double [[IN]]) #[[ATTR41:[0-9]+]] ; ; ARMPL-NEON-LABEL: define void @fma_f64 ; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { @@ -1810,7 +1810,7 @@ define void @fma_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; ARMPL-SVE-NOPRED-LABEL: define void @fma_f64 ; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call @armpl_svfma_f64_x( [[WIDE_LOAD:%.*]], [[WIDE_LOAD]], [[WIDE_LOAD]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call double @fma(double [[IN:%.*]], double [[IN]], double [[IN]]) #[[ATTR40:[0-9]+]] +; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call double @fma(double [[IN:%.*]], double [[IN]], double [[IN]]) #[[ATTR41:[0-9]+]] ; entry: br label %for.body @@ -1842,7 +1842,7 @@ define void @fma_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; SLEEF-SVE-NOPRED-LABEL: define void @fma_f32 ; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call @_ZGVsMxvvv_fmaf( [[WIDE_LOAD:%.*]], [[WIDE_LOAD]], [[WIDE_LOAD]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call float @fmaf(float [[IN:%.*]], float [[IN]], float [[IN]]) #[[ATTR41:[0-9]+]] +; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call float @fmaf(float [[IN:%.*]], float [[IN]], float [[IN]]) #[[ATTR42:[0-9]+]] ; ; ARMPL-NEON-LABEL: define void @fma_f32 ; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { @@ -1855,7 +1855,7 @@ define void @fma_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; ARMPL-SVE-NOPRED-LABEL: define void @fma_f32 ; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call @armpl_svfma_f32_x( [[WIDE_LOAD:%.*]], [[WIDE_LOAD]], [[WIDE_LOAD]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call float @fmaf(float [[IN:%.*]], float [[IN]], float [[IN]]) #[[ATTR41:[0-9]+]] +; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call float @fmaf(float [[IN:%.*]], float [[IN]], float [[IN]]) #[[ATTR42:[0-9]+]] ; entry: br label %for.body @@ -1890,7 +1890,7 @@ define void @fmax_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; SLEEF-SVE-NOPRED-LABEL: define void @fmax_f64 ; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call @_ZGVsMxvv_fmax( [[WIDE_LOAD:%.*]], [[WIDE_LOAD]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call double @fmax(double [[IN:%.*]], double [[IN]]) #[[ATTR42:[0-9]+]] +; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call double @fmax(double [[IN:%.*]], double [[IN]]) #[[ATTR43:[0-9]+]] ; ; ARMPL-NEON-LABEL: define void @fmax_f64 ; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { @@ -1903,7 +1903,7 @@ define void @fmax_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; ARMPL-SVE-NOPRED-LABEL: define void @fmax_f64 ; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call @armpl_svfmax_f64_x( [[WIDE_LOAD:%.*]], [[WIDE_LOAD]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call double @fmax(double [[IN:%.*]], double [[IN]]) #[[ATTR42:[0-9]+]] +; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call double @fmax(double [[IN:%.*]], double [[IN]]) #[[ATTR43:[0-9]+]] ; entry: br label %for.body @@ -1935,7 +1935,7 @@ define void @fmax_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; SLEEF-SVE-NOPRED-LABEL: define void @fmax_f32 ; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call @_ZGVsMxvv_fmaxf( [[WIDE_LOAD:%.*]], [[WIDE_LOAD]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call float @fmaxf(float [[IN:%.*]], float [[IN]]) #[[ATTR43:[0-9]+]] +; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call float @fmaxf(float [[IN:%.*]], float [[IN]]) #[[ATTR44:[0-9]+]] ; ; ARMPL-NEON-LABEL: define void @fmax_f32 ; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { @@ -1948,7 +1948,7 @@ define void @fmax_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; ARMPL-SVE-NOPRED-LABEL: define void @fmax_f32 ; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call @armpl_svfmax_f32_x( [[WIDE_LOAD:%.*]], [[WIDE_LOAD]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call float @fmaxf(float [[IN:%.*]], float [[IN]]) #[[ATTR43:[0-9]+]] +; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call float @fmaxf(float [[IN:%.*]], float [[IN]]) #[[ATTR44:[0-9]+]] ; entry: br label %for.body @@ -1983,7 +1983,7 @@ define void @fmin_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; SLEEF-SVE-NOPRED-LABEL: define void @fmin_f64 ; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call @_ZGVsMxvv_fmin( [[WIDE_LOAD:%.*]], [[WIDE_LOAD]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call double @fmin(double [[IN:%.*]], double [[IN]]) #[[ATTR44:[0-9]+]] +; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call double @fmin(double [[IN:%.*]], double [[IN]]) #[[ATTR45:[0-9]+]] ; ; ARMPL-NEON-LABEL: define void @fmin_f64 ; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { @@ -1996,7 +1996,7 @@ define void @fmin_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; ARMPL-SVE-NOPRED-LABEL: define void @fmin_f64 ; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call @armpl_svfmin_f64_x( [[WIDE_LOAD:%.*]], [[WIDE_LOAD]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call double @fmin(double [[IN:%.*]], double [[IN]]) #[[ATTR44:[0-9]+]] +; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call double @fmin(double [[IN:%.*]], double [[IN]]) #[[ATTR45:[0-9]+]] ; entry: br label %for.body @@ -2028,7 +2028,7 @@ define void @fmin_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; SLEEF-SVE-NOPRED-LABEL: define void @fmin_f32 ; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call @_ZGVsMxvv_fminf( [[WIDE_LOAD:%.*]], [[WIDE_LOAD]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call float @fminf(float [[IN:%.*]], float [[IN]]) #[[ATTR45:[0-9]+]] +; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call float @fminf(float [[IN:%.*]], float [[IN]]) #[[ATTR46:[0-9]+]] ; ; ARMPL-NEON-LABEL: define void @fmin_f32 ; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { @@ -2041,7 +2041,7 @@ define void @fmin_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; ARMPL-SVE-NOPRED-LABEL: define void @fmin_f32 ; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call @armpl_svfmin_f32_x( [[WIDE_LOAD:%.*]], [[WIDE_LOAD]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call float @fminf(float [[IN:%.*]], float [[IN]]) #[[ATTR45:[0-9]+]] +; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call float @fminf(float [[IN:%.*]], float [[IN]]) #[[ATTR46:[0-9]+]] ; entry: br label %for.body @@ -2076,7 +2076,7 @@ define void @fmod_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; SLEEF-SVE-NOPRED-LABEL: define void @fmod_f64 ; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call @_ZGVsMxvv_fmod( [[WIDE_LOAD:%.*]], [[WIDE_LOAD]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call double @fmod(double [[IN:%.*]], double [[IN]]) #[[ATTR46:[0-9]+]] +; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call double @fmod(double [[IN:%.*]], double [[IN]]) #[[ATTR47:[0-9]+]] ; ; ARMPL-NEON-LABEL: define void @fmod_f64 ; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { @@ -2089,7 +2089,7 @@ define void @fmod_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; ARMPL-SVE-NOPRED-LABEL: define void @fmod_f64 ; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call @armpl_svfmod_f64_x( [[WIDE_LOAD:%.*]], [[WIDE_LOAD]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call double @fmod(double [[IN:%.*]], double [[IN]]) #[[ATTR46:[0-9]+]] +; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call double @fmod(double [[IN:%.*]], double [[IN]]) #[[ATTR47:[0-9]+]] ; entry: br label %for.body @@ -2121,7 +2121,7 @@ define void @fmod_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; SLEEF-SVE-NOPRED-LABEL: define void @fmod_f32 ; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call @_ZGVsMxvv_fmodf( [[WIDE_LOAD:%.*]], [[WIDE_LOAD]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call float @fmodf(float [[IN:%.*]], float [[IN]]) #[[ATTR47:[0-9]+]] +; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call float @fmodf(float [[IN:%.*]], float [[IN]]) #[[ATTR48:[0-9]+]] ; ; ARMPL-NEON-LABEL: define void @fmod_f32 ; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { @@ -2134,7 +2134,7 @@ define void @fmod_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; ARMPL-SVE-NOPRED-LABEL: define void @fmod_f32 ; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call @armpl_svfmod_f32_x( [[WIDE_LOAD:%.*]], [[WIDE_LOAD]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call float @fmodf(float [[IN:%.*]], float [[IN]]) #[[ATTR47:[0-9]+]] +; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call float @fmodf(float [[IN:%.*]], float [[IN]]) #[[ATTR48:[0-9]+]] ; entry: br label %for.body @@ -2154,6 +2154,109 @@ define void @fmod_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) { ret void } +declare double @frexp(double, ptr) #1 +declare float @frexpf(float , ptr) #1 + +; Vectorization can not happen because there is no scalar to vector mapping in +; TLI for frexp/frexpf. Tests will need to be changed when such mappings are +; added. + +define void @frexp_f64(ptr %in, ptr %out1, ptr %out2, i32 %N) { +; SLEEF-NEON-LABEL: define void @frexp_f64 +; SLEEF-NEON-SAME: (ptr [[IN:%.*]], ptr [[OUT1:%.*]], ptr [[OUT2:%.*]], i32 [[N:%.*]]) #[[ATTR0]] { +; SLEEF-NEON: [[CALL:%.*]] = tail call double @frexp(double noundef [[TMP0:%.*]], ptr noundef [[ADD_PTR:%.*]]) +; +; SLEEF-SVE-LABEL: define void @frexp_f64 +; SLEEF-SVE-SAME: (ptr [[IN:%.*]], ptr [[OUT1:%.*]], ptr [[OUT2:%.*]], i32 [[N:%.*]]) #[[ATTR0]] { +; SLEEF-SVE: [[CALL:%.*]] = tail call double @frexp(double noundef [[TMP0:%.*]], ptr noundef [[ADD_PTR:%.*]]) +; +; SLEEF-SVE-NOPRED-LABEL: define void @frexp_f64 +; SLEEF-SVE-NOPRED-SAME: (ptr [[IN:%.*]], ptr [[OUT1:%.*]], ptr [[OUT2:%.*]], i32 [[N:%.*]]) #[[ATTR0]] { +; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call double @frexp(double noundef [[TMP0:%.*]], ptr noundef [[ADD_PTR:%.*]]) +; +; ARMPL-NEON-LABEL: define void @frexp_f64 +; ARMPL-NEON-SAME: (ptr [[IN:%.*]], ptr [[OUT1:%.*]], ptr [[OUT2:%.*]], i32 [[N:%.*]]) #[[ATTR0]] { +; ARMPL-NEON: [[CALL:%.*]] = tail call double @frexp(double noundef [[TMP0:%.*]], ptr noundef [[ADD_PTR:%.*]]) +; +; ARMPL-SVE-LABEL: define void @frexp_f64 +; ARMPL-SVE-SAME: (ptr [[IN:%.*]], ptr [[OUT1:%.*]], ptr [[OUT2:%.*]], i32 [[N:%.*]]) #[[ATTR0]] { +; ARMPL-SVE: [[CALL:%.*]] = tail call double @frexp(double noundef [[TMP0:%.*]], ptr noundef [[ADD_PTR:%.*]]) +; +; ARMPL-SVE-NOPRED-LABEL: define void @frexp_f64 +; ARMPL-SVE-NOPRED-SAME: (ptr [[IN:%.*]], ptr [[OUT1:%.*]], ptr [[OUT2:%.*]], i32 [[N:%.*]]) #[[ATTR0]] { +; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call double @frexp(double noundef [[TMP0:%.*]], ptr noundef [[ADD_PTR:%.*]]) +; +entry: + %cmp4 = icmp sgt i32 %N, 0 + br i1 %cmp4, label %for.body.preheader, label %for.cond.cleanup + +for.body.preheader: + %wide.trip.count = zext nneg i32 %N to i64 + br label %for.body + +for.cond.cleanup: + ret void + +for.body: + %indvars.iv = phi i64 [ 0, %for.body.preheader ], [ %indvars.iv.next, %for.body ] + %arrayidx = getelementptr inbounds double, ptr %in, i64 %indvars.iv + %0 = load double, ptr %arrayidx, align 8 + %add.ptr = getelementptr inbounds i32, ptr %out2, i64 %indvars.iv + %call = tail call double @frexp(double noundef %0, ptr noundef %add.ptr) + store double %call, ptr %out1, align 8 + %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1 + %exitcond.not = icmp eq i64 %indvars.iv.next, %wide.trip.count + br i1 %exitcond.not, label %for.cond.cleanup, label %for.body +} + +define void @frexp_f32(ptr %in, ptr %out1, ptr %out2, i32 %N) { +; SLEEF-NEON-LABEL: define void @frexp_f32 +; SLEEF-NEON-SAME: (ptr [[IN:%.*]], ptr [[OUT1:%.*]], ptr [[OUT2:%.*]], i32 [[N:%.*]]) #[[ATTR0]] { +; SLEEF-NEON: [[CALL:%.*]] = tail call float @frexpf(float noundef [[TMP0:%.*]], ptr noundef [[ADD_PTR:%.*]]) +; +; SLEEF-SVE-LABEL: define void @frexp_f32 +; SLEEF-SVE-SAME: (ptr [[IN:%.*]], ptr [[OUT1:%.*]], ptr [[OUT2:%.*]], i32 [[N:%.*]]) #[[ATTR0]] { +; SLEEF-SVE: [[CALL:%.*]] = tail call float @frexpf(float noundef [[TMP0:%.*]], ptr noundef [[ADD_PTR:%.*]]) +; +; SLEEF-SVE-NOPRED-LABEL: define void @frexp_f32 +; SLEEF-SVE-NOPRED-SAME: (ptr [[IN:%.*]], ptr [[OUT1:%.*]], ptr [[OUT2:%.*]], i32 [[N:%.*]]) #[[ATTR0]] { +; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call float @frexpf(float noundef [[TMP0:%.*]], ptr noundef [[ADD_PTR:%.*]]) +; +; ARMPL-NEON-LABEL: define void @frexp_f32 +; ARMPL-NEON-SAME: (ptr [[IN:%.*]], ptr [[OUT1:%.*]], ptr [[OUT2:%.*]], i32 [[N:%.*]]) #[[ATTR0]] { +; ARMPL-NEON: [[CALL:%.*]] = tail call float @frexpf(float noundef [[TMP0:%.*]], ptr noundef [[ADD_PTR:%.*]]) +; +; ARMPL-SVE-LABEL: define void @frexp_f32 +; ARMPL-SVE-SAME: (ptr [[IN:%.*]], ptr [[OUT1:%.*]], ptr [[OUT2:%.*]], i32 [[N:%.*]]) #[[ATTR0]] { +; ARMPL-SVE: [[CALL:%.*]] = tail call float @frexpf(float noundef [[TMP0:%.*]], ptr noundef [[ADD_PTR:%.*]]) +; +; ARMPL-SVE-NOPRED-LABEL: define void @frexp_f32 +; ARMPL-SVE-NOPRED-SAME: (ptr [[IN:%.*]], ptr [[OUT1:%.*]], ptr [[OUT2:%.*]], i32 [[N:%.*]]) #[[ATTR0]] { +; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call float @frexpf(float noundef [[TMP0:%.*]], ptr noundef [[ADD_PTR:%.*]]) +; +entry: + %cmp4 = icmp sgt i32 %N, 0 + br i1 %cmp4, label %for.body.preheader, label %for.cond.cleanup + +for.body.preheader: + %wide.trip.count = zext nneg i32 %N to i64 + br label %for.body + +for.cond.cleanup: + ret void + +for.body: + %indvars.iv = phi i64 [ 0, %for.body.preheader ], [ %indvars.iv.next, %for.body ] + %arrayidx = getelementptr inbounds float, ptr %in, i64 %indvars.iv + %0 = load float, ptr %arrayidx, align 4 + %add.ptr = getelementptr inbounds i32, ptr %out2, i64 %indvars.iv + %call = tail call float @frexpf(float noundef %0, ptr noundef %add.ptr) + store float %call, ptr %out1, align 4 + %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1 + %exitcond.not = icmp eq i64 %indvars.iv.next, %wide.trip.count + br i1 %exitcond.not, label %for.cond.cleanup, label %for.body +} + declare double @hypot(double, double) declare float @hypotf(float, float) @@ -2169,7 +2272,7 @@ define void @hypot_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; SLEEF-SVE-NOPRED-LABEL: define void @hypot_f64 ; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call @_ZGVsMxvv_hypot( [[WIDE_LOAD:%.*]], [[WIDE_LOAD]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call double @hypot(double [[IN:%.*]], double [[IN]]) #[[ATTR48:[0-9]+]] +; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call double @hypot(double [[IN:%.*]], double [[IN]]) #[[ATTR49:[0-9]+]] ; ; ARMPL-NEON-LABEL: define void @hypot_f64 ; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { @@ -2182,7 +2285,7 @@ define void @hypot_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; ARMPL-SVE-NOPRED-LABEL: define void @hypot_f64 ; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call @armpl_svhypot_f64_x( [[WIDE_LOAD:%.*]], [[WIDE_LOAD]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call double @hypot(double [[IN:%.*]], double [[IN]]) #[[ATTR48:[0-9]+]] +; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call double @hypot(double [[IN:%.*]], double [[IN]]) #[[ATTR49:[0-9]+]] ; entry: br label %for.body @@ -2214,7 +2317,7 @@ define void @hypot_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; SLEEF-SVE-NOPRED-LABEL: define void @hypot_f32 ; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call @_ZGVsMxvv_hypotf( [[WIDE_LOAD:%.*]], [[WIDE_LOAD]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call float @hypotf(float [[IN:%.*]], float [[IN]]) #[[ATTR49:[0-9]+]] +; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call float @hypotf(float [[IN:%.*]], float [[IN]]) #[[ATTR50:[0-9]+]] ; ; ARMPL-NEON-LABEL: define void @hypot_f32 ; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { @@ -2227,7 +2330,7 @@ define void @hypot_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; ARMPL-SVE-NOPRED-LABEL: define void @hypot_f32 ; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call @armpl_svhypot_f32_x( [[WIDE_LOAD:%.*]], [[WIDE_LOAD]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call float @hypotf(float [[IN:%.*]], float [[IN]]) #[[ATTR49:[0-9]+]] +; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call float @hypotf(float [[IN:%.*]], float [[IN]]) #[[ATTR50:[0-9]+]] ; entry: br label %for.body @@ -2262,7 +2365,7 @@ define void @ilogb_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; SLEEF-SVE-NOPRED-LABEL: define void @ilogb_f64 ; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call @_ZGVsMxv_ilogb( [[WIDE_LOAD:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call i32 @ilogb(double [[IN:%.*]]) #[[ATTR50:[0-9]+]] +; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call i32 @ilogb(double [[IN:%.*]]) #[[ATTR51:[0-9]+]] ; ; ARMPL-NEON-LABEL: define void @ilogb_f64 ; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { @@ -2275,7 +2378,7 @@ define void @ilogb_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; ARMPL-SVE-NOPRED-LABEL: define void @ilogb_f64 ; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call @armpl_svilogb_f64_x( [[WIDE_LOAD:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call i32 @ilogb(double [[IN:%.*]]) #[[ATTR50:[0-9]+]] +; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call i32 @ilogb(double [[IN:%.*]]) #[[ATTR51:[0-9]+]] ; entry: br label %for.body @@ -2307,7 +2410,7 @@ define void @ilogb_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; SLEEF-SVE-NOPRED-LABEL: define void @ilogb_f32 ; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call @_ZGVsMxv_ilogbf( [[WIDE_LOAD:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call i32 @ilogbf(float [[IN:%.*]]) #[[ATTR51:[0-9]+]] +; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call i32 @ilogbf(float [[IN:%.*]]) #[[ATTR52:[0-9]+]] ; ; ARMPL-NEON-LABEL: define void @ilogb_f32 ; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { @@ -2320,7 +2423,7 @@ define void @ilogb_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; ARMPL-SVE-NOPRED-LABEL: define void @ilogb_f32 ; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call @armpl_svilogb_f32_x( [[WIDE_LOAD:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call i32 @ilogbf(float [[IN:%.*]]) #[[ATTR51:[0-9]+]] +; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call i32 @ilogbf(float [[IN:%.*]]) #[[ATTR52:[0-9]+]] ; entry: br label %for.body @@ -2355,7 +2458,7 @@ define void @ldexp_f64(ptr noalias %in1.ptr, ptr noalias %in2.ptr, ptr noalias % ; SLEEF-SVE-NOPRED-LABEL: define void @ldexp_f64 ; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN1_PTR:%.*]], ptr noalias [[IN2_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; SLEEF-SVE-NOPRED: [[TMP11:%.*]] = call @_ZGVsMxvv_ldexp( [[WIDE_LOAD:%.*]], [[WIDE_LOAD1:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call double @ldexp(double [[IN1:%.*]], i32 [[IN2:%.*]]) #[[ATTR52:[0-9]+]] +; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call double @ldexp(double [[IN1:%.*]], i32 [[IN2:%.*]]) #[[ATTR53:[0-9]+]] ; ; ARMPL-NEON-LABEL: define void @ldexp_f64 ; ARMPL-NEON-SAME: (ptr noalias [[IN1_PTR:%.*]], ptr noalias [[IN2_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { @@ -2368,7 +2471,7 @@ define void @ldexp_f64(ptr noalias %in1.ptr, ptr noalias %in2.ptr, ptr noalias % ; ARMPL-SVE-NOPRED-LABEL: define void @ldexp_f64 ; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN1_PTR:%.*]], ptr noalias [[IN2_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; ARMPL-SVE-NOPRED: [[TMP11:%.*]] = call @armpl_svldexp_f64_x( [[WIDE_LOAD:%.*]], [[WIDE_LOAD1:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call double @ldexp(double [[IN1:%.*]], i32 [[IN2:%.*]]) #[[ATTR52:[0-9]+]] +; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call double @ldexp(double [[IN1:%.*]], i32 [[IN2:%.*]]) #[[ATTR53:[0-9]+]] ; entry: br label %for.body @@ -2402,7 +2505,7 @@ define void @ldexp_f32(ptr noalias %in1.ptr, ptr noalias %in2.ptr, ptr noalias % ; SLEEF-SVE-NOPRED-LABEL: define void @ldexp_f32 ; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN1_PTR:%.*]], ptr noalias [[IN2_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; SLEEF-SVE-NOPRED: [[TMP11:%.*]] = call @_ZGVsMxvv_ldexpf( [[WIDE_LOAD:%.*]], [[WIDE_LOAD1:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call float @ldexpf(float [[IN1:%.*]], i32 [[IN2:%.*]]) #[[ATTR53:[0-9]+]] +; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call float @ldexpf(float [[IN1:%.*]], i32 [[IN2:%.*]]) #[[ATTR54:[0-9]+]] ; ; ARMPL-NEON-LABEL: define void @ldexp_f32 ; ARMPL-NEON-SAME: (ptr noalias [[IN1_PTR:%.*]], ptr noalias [[IN2_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { @@ -2415,7 +2518,7 @@ define void @ldexp_f32(ptr noalias %in1.ptr, ptr noalias %in2.ptr, ptr noalias % ; ARMPL-SVE-NOPRED-LABEL: define void @ldexp_f32 ; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN1_PTR:%.*]], ptr noalias [[IN2_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; ARMPL-SVE-NOPRED: [[TMP11:%.*]] = call @armpl_svldexp_f32_x( [[WIDE_LOAD:%.*]], [[WIDE_LOAD1:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call float @ldexpf(float [[IN1:%.*]], i32 [[IN2:%.*]]) #[[ATTR53:[0-9]+]] +; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call float @ldexpf(float [[IN1:%.*]], i32 [[IN2:%.*]]) #[[ATTR54:[0-9]+]] ; entry: br label %for.body @@ -2452,7 +2555,7 @@ define void @lgamma_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; SLEEF-SVE-NOPRED-LABEL: define void @lgamma_f64 ; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call @_ZGVsMxv_lgamma( [[WIDE_LOAD:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call double @lgamma(double [[IN:%.*]]) #[[ATTR54:[0-9]+]] +; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call double @lgamma(double [[IN:%.*]]) #[[ATTR55:[0-9]+]] ; ; ARMPL-NEON-LABEL: define void @lgamma_f64 ; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { @@ -2465,7 +2568,7 @@ define void @lgamma_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; ARMPL-SVE-NOPRED-LABEL: define void @lgamma_f64 ; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call @armpl_svlgamma_f64_x( [[WIDE_LOAD:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call double @lgamma(double [[IN:%.*]]) #[[ATTR54:[0-9]+]] +; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call double @lgamma(double [[IN:%.*]]) #[[ATTR55:[0-9]+]] ; entry: br label %for.body @@ -2497,7 +2600,7 @@ define void @lgamma_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; SLEEF-SVE-NOPRED-LABEL: define void @lgamma_f32 ; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call @_ZGVsMxv_lgammaf( [[WIDE_LOAD:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call float @lgammaf(float [[IN:%.*]]) #[[ATTR55:[0-9]+]] +; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call float @lgammaf(float [[IN:%.*]]) #[[ATTR56:[0-9]+]] ; ; ARMPL-NEON-LABEL: define void @lgamma_f32 ; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { @@ -2510,7 +2613,7 @@ define void @lgamma_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; ARMPL-SVE-NOPRED-LABEL: define void @lgamma_f32 ; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call @armpl_svlgamma_f32_x( [[WIDE_LOAD:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call float @lgammaf(float [[IN:%.*]]) #[[ATTR55:[0-9]+]] +; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call float @lgammaf(float [[IN:%.*]]) #[[ATTR56:[0-9]+]] ; entry: br label %for.body @@ -2545,7 +2648,7 @@ define void @log_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; SLEEF-SVE-NOPRED-LABEL: define void @log_f64 ; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call @_ZGVsMxv_log( [[WIDE_LOAD:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call double @log(double [[IN:%.*]]) #[[ATTR56:[0-9]+]] +; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call double @log(double [[IN:%.*]]) #[[ATTR57:[0-9]+]] ; ; ARMPL-NEON-LABEL: define void @log_f64 ; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { @@ -2558,7 +2661,7 @@ define void @log_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; ARMPL-SVE-NOPRED-LABEL: define void @log_f64 ; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call @armpl_svlog_f64_x( [[WIDE_LOAD:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call double @log(double [[IN:%.*]]) #[[ATTR56:[0-9]+]] +; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call double @log(double [[IN:%.*]]) #[[ATTR57:[0-9]+]] ; entry: br label %for.body @@ -2590,7 +2693,7 @@ define void @log_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; SLEEF-SVE-NOPRED-LABEL: define void @log_f32 ; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call @_ZGVsMxv_logf( [[WIDE_LOAD:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call float @logf(float [[IN:%.*]]) #[[ATTR57:[0-9]+]] +; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call float @logf(float [[IN:%.*]]) #[[ATTR58:[0-9]+]] ; ; ARMPL-NEON-LABEL: define void @log_f32 ; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { @@ -2603,7 +2706,7 @@ define void @log_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; ARMPL-SVE-NOPRED-LABEL: define void @log_f32 ; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call @armpl_svlog_f32_x( [[WIDE_LOAD:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call float @logf(float [[IN:%.*]]) #[[ATTR57:[0-9]+]] +; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call float @logf(float [[IN:%.*]]) #[[ATTR58:[0-9]+]] ; entry: br label %for.body @@ -2638,7 +2741,7 @@ define void @log10_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; SLEEF-SVE-NOPRED-LABEL: define void @log10_f64 ; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call @_ZGVsMxv_log10( [[WIDE_LOAD:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call double @log10(double [[IN:%.*]]) #[[ATTR58:[0-9]+]] +; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call double @log10(double [[IN:%.*]]) #[[ATTR59:[0-9]+]] ; ; ARMPL-NEON-LABEL: define void @log10_f64 ; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { @@ -2651,7 +2754,7 @@ define void @log10_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; ARMPL-SVE-NOPRED-LABEL: define void @log10_f64 ; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call @armpl_svlog10_f64_x( [[WIDE_LOAD:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call double @log10(double [[IN:%.*]]) #[[ATTR58:[0-9]+]] +; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call double @log10(double [[IN:%.*]]) #[[ATTR59:[0-9]+]] ; entry: br label %for.body @@ -2683,7 +2786,7 @@ define void @log10_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; SLEEF-SVE-NOPRED-LABEL: define void @log10_f32 ; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call @_ZGVsMxv_log10f( [[WIDE_LOAD:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call float @log10f(float [[IN:%.*]]) #[[ATTR59:[0-9]+]] +; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call float @log10f(float [[IN:%.*]]) #[[ATTR60:[0-9]+]] ; ; ARMPL-NEON-LABEL: define void @log10_f32 ; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { @@ -2696,7 +2799,7 @@ define void @log10_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; ARMPL-SVE-NOPRED-LABEL: define void @log10_f32 ; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call @armpl_svlog10_f32_x( [[WIDE_LOAD:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call float @log10f(float [[IN:%.*]]) #[[ATTR59:[0-9]+]] +; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call float @log10f(float [[IN:%.*]]) #[[ATTR60:[0-9]+]] ; entry: br label %for.body @@ -2731,7 +2834,7 @@ define void @log1p_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; SLEEF-SVE-NOPRED-LABEL: define void @log1p_f64 ; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call @_ZGVsMxv_log1p( [[WIDE_LOAD:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call double @log1p(double [[IN:%.*]]) #[[ATTR60:[0-9]+]] +; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call double @log1p(double [[IN:%.*]]) #[[ATTR61:[0-9]+]] ; ; ARMPL-NEON-LABEL: define void @log1p_f64 ; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { @@ -2744,7 +2847,7 @@ define void @log1p_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; ARMPL-SVE-NOPRED-LABEL: define void @log1p_f64 ; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call @armpl_svlog1p_f64_x( [[WIDE_LOAD:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call double @log1p(double [[IN:%.*]]) #[[ATTR60:[0-9]+]] +; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call double @log1p(double [[IN:%.*]]) #[[ATTR61:[0-9]+]] ; entry: br label %for.body @@ -2776,7 +2879,7 @@ define void @log1p_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; SLEEF-SVE-NOPRED-LABEL: define void @log1p_f32 ; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call @_ZGVsMxv_log1pf( [[WIDE_LOAD:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call float @log1pf(float [[IN:%.*]]) #[[ATTR61:[0-9]+]] +; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call float @log1pf(float [[IN:%.*]]) #[[ATTR62:[0-9]+]] ; ; ARMPL-NEON-LABEL: define void @log1p_f32 ; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { @@ -2789,7 +2892,7 @@ define void @log1p_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; ARMPL-SVE-NOPRED-LABEL: define void @log1p_f32 ; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call @armpl_svlog1p_f32_x( [[WIDE_LOAD:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call float @log1pf(float [[IN:%.*]]) #[[ATTR61:[0-9]+]] +; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call float @log1pf(float [[IN:%.*]]) #[[ATTR62:[0-9]+]] ; entry: br label %for.body @@ -2824,7 +2927,7 @@ define void @log2_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; SLEEF-SVE-NOPRED-LABEL: define void @log2_f64 ; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call @_ZGVsMxv_log2( [[WIDE_LOAD:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call double @log2(double [[IN:%.*]]) #[[ATTR62:[0-9]+]] +; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call double @log2(double [[IN:%.*]]) #[[ATTR63:[0-9]+]] ; ; ARMPL-NEON-LABEL: define void @log2_f64 ; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { @@ -2837,7 +2940,7 @@ define void @log2_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; ARMPL-SVE-NOPRED-LABEL: define void @log2_f64 ; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call @armpl_svlog2_f64_x( [[WIDE_LOAD:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call double @log2(double [[IN:%.*]]) #[[ATTR62:[0-9]+]] +; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call double @log2(double [[IN:%.*]]) #[[ATTR63:[0-9]+]] ; entry: br label %for.body @@ -2869,7 +2972,7 @@ define void @log2_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; SLEEF-SVE-NOPRED-LABEL: define void @log2_f32 ; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call @_ZGVsMxv_log2f( [[WIDE_LOAD:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call float @log2f(float [[IN:%.*]]) #[[ATTR63:[0-9]+]] +; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call float @log2f(float [[IN:%.*]]) #[[ATTR64:[0-9]+]] ; ; ARMPL-NEON-LABEL: define void @log2_f32 ; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { @@ -2882,7 +2985,7 @@ define void @log2_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; ARMPL-SVE-NOPRED-LABEL: define void @log2_f32 ; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call @armpl_svlog2_f32_x( [[WIDE_LOAD:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call float @log2f(float [[IN:%.*]]) #[[ATTR63:[0-9]+]] +; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call float @log2f(float [[IN:%.*]]) #[[ATTR64:[0-9]+]] ; entry: br label %for.body @@ -2902,35 +3005,33 @@ define void @log2_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) { ret void } -declare double @modf(double, ptr) -declare float @modff(float, ptr) +declare double @modf(double, ptr) #1 +declare float @modff(float, ptr) #1 define void @modf_f64(ptr noalias %a, ptr noalias %b, ptr noalias %c) { ; SLEEF-NEON-LABEL: define void @modf_f64 ; SLEEF-NEON-SAME: (ptr noalias [[A:%.*]], ptr noalias [[B:%.*]], ptr noalias [[C:%.*]]) #[[ATTR0]] { -; SLEEF-NEON: [[TMP5:%.*]] = call <2 x double> @_ZGVnN2vl8_modf(<2 x double> [[WIDE_LOAD:%.*]], ptr [[TMP4:%.*]]) +; SLEEF-NEON: [[DATA:%.*]] = call double @modf(double [[NUM:%.*]], ptr [[GEPB:%.*]]) #[[ATTR2:[0-9]+]] ; ; SLEEF-SVE-LABEL: define void @modf_f64 ; SLEEF-SVE-SAME: (ptr noalias [[A:%.*]], ptr noalias [[B:%.*]], ptr noalias [[C:%.*]]) #[[ATTR0]] { -; SLEEF-SVE: [[DATA:%.*]] = call double @modf(double [[NUM:%.*]], ptr [[GEPB:%.*]]) #[[ATTR4:[0-9]+]] +; SLEEF-SVE: [[DATA:%.*]] = call double @modf(double [[NUM:%.*]], ptr [[GEPB:%.*]]) #[[ATTR5:[0-9]+]] ; ; SLEEF-SVE-NOPRED-LABEL: define void @modf_f64 ; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[A:%.*]], ptr noalias [[B:%.*]], ptr noalias [[C:%.*]]) #[[ATTR0]] { -; SLEEF-SVE-NOPRED: [[TMP17:%.*]] = call @_ZGVsNxvl8_modf( [[WIDE_LOAD:%.*]], ptr [[TMP16:%.*]]) -; SLEEF-SVE-NOPRED: [[DATA:%.*]] = call double @modf(double [[NUM:%.*]], ptr [[GEPB:%.*]]) #[[ATTR64:[0-9]+]] +; SLEEF-SVE-NOPRED: [[DATA:%.*]] = call double @modf(double [[NUM:%.*]], ptr [[GEPB:%.*]]) #[[ATTR65:[0-9]+]] ; ; ARMPL-NEON-LABEL: define void @modf_f64 ; ARMPL-NEON-SAME: (ptr noalias [[A:%.*]], ptr noalias [[B:%.*]], ptr noalias [[C:%.*]]) #[[ATTR0]] { -; ARMPL-NEON: [[TMP5:%.*]] = call <2 x double> @armpl_vmodfq_f64(<2 x double> [[WIDE_LOAD:%.*]], ptr [[TMP4:%.*]]) +; ARMPL-NEON: [[DATA:%.*]] = call double @modf(double [[NUM:%.*]], ptr [[GEPB:%.*]]) #[[ATTR2:[0-9]+]] ; ; ARMPL-SVE-LABEL: define void @modf_f64 ; ARMPL-SVE-SAME: (ptr noalias [[A:%.*]], ptr noalias [[B:%.*]], ptr noalias [[C:%.*]]) #[[ATTR0]] { -; ARMPL-SVE: [[TMP23:%.*]] = call @armpl_svmodf_f64_x( [[WIDE_MASKED_LOAD:%.*]], ptr [[TMP22:%.*]], [[ACTIVE_LANE_MASK:%.*]]) +; ARMPL-SVE: [[DATA:%.*]] = call double @modf(double [[NUM:%.*]], ptr [[GEPB:%.*]]) #[[ATTR5:[0-9]+]] ; ; ARMPL-SVE-NOPRED-LABEL: define void @modf_f64 ; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[A:%.*]], ptr noalias [[B:%.*]], ptr noalias [[C:%.*]]) #[[ATTR0]] { -; ARMPL-SVE-NOPRED: [[TMP17:%.*]] = call @armpl_svmodf_f64_x( [[WIDE_LOAD:%.*]], ptr [[TMP16:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; ARMPL-SVE-NOPRED: [[DATA:%.*]] = call double @modf(double [[NUM:%.*]], ptr [[GEPB:%.*]]) #[[ATTR64:[0-9]+]] +; ARMPL-SVE-NOPRED: [[DATA:%.*]] = call double @modf(double [[NUM:%.*]], ptr [[GEPB:%.*]]) #[[ATTR65:[0-9]+]] ; entry: br label %for.body @@ -2954,29 +3055,27 @@ for.cond.cleanup: define void @modf_f32(ptr noalias %a, ptr noalias %b, ptr noalias %c) { ; SLEEF-NEON-LABEL: define void @modf_f32 ; SLEEF-NEON-SAME: (ptr noalias [[A:%.*]], ptr noalias [[B:%.*]], ptr noalias [[C:%.*]]) #[[ATTR0]] { -; SLEEF-NEON: [[TMP5:%.*]] = call <4 x float> @_ZGVnN4vl4_modff(<4 x float> [[WIDE_LOAD:%.*]], ptr [[TMP4:%.*]]) +; SLEEF-NEON: [[DATA:%.*]] = call float @modff(float [[NUM:%.*]], ptr [[GEPB:%.*]]) #[[ATTR3:[0-9]+]] ; ; SLEEF-SVE-LABEL: define void @modf_f32 ; SLEEF-SVE-SAME: (ptr noalias [[A:%.*]], ptr noalias [[B:%.*]], ptr noalias [[C:%.*]]) #[[ATTR0]] { -; SLEEF-SVE: [[DATA:%.*]] = call float @modff(float [[NUM:%.*]], ptr [[GEPB:%.*]]) #[[ATTR5:[0-9]+]] +; SLEEF-SVE: [[DATA:%.*]] = call float @modff(float [[NUM:%.*]], ptr [[GEPB:%.*]]) #[[ATTR6:[0-9]+]] ; ; SLEEF-SVE-NOPRED-LABEL: define void @modf_f32 ; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[A:%.*]], ptr noalias [[B:%.*]], ptr noalias [[C:%.*]]) #[[ATTR0]] { -; SLEEF-SVE-NOPRED: [[TMP17:%.*]] = call @_ZGVsNxvl4_modff( [[WIDE_LOAD:%.*]], ptr [[TMP16:%.*]]) -; SLEEF-SVE-NOPRED: [[DATA:%.*]] = call float @modff(float [[NUM:%.*]], ptr [[GEPB:%.*]]) #[[ATTR65:[0-9]+]] +; SLEEF-SVE-NOPRED: [[DATA:%.*]] = call float @modff(float [[NUM:%.*]], ptr [[GEPB:%.*]]) #[[ATTR66:[0-9]+]] ; ; ARMPL-NEON-LABEL: define void @modf_f32 ; ARMPL-NEON-SAME: (ptr noalias [[A:%.*]], ptr noalias [[B:%.*]], ptr noalias [[C:%.*]]) #[[ATTR0]] { -; ARMPL-NEON: [[TMP5:%.*]] = call <4 x float> @armpl_vmodfq_f32(<4 x float> [[WIDE_LOAD:%.*]], ptr [[TMP4:%.*]]) +; ARMPL-NEON: [[DATA:%.*]] = call float @modff(float [[NUM:%.*]], ptr [[GEPB:%.*]]) #[[ATTR3:[0-9]+]] ; ; ARMPL-SVE-LABEL: define void @modf_f32 ; ARMPL-SVE-SAME: (ptr noalias [[A:%.*]], ptr noalias [[B:%.*]], ptr noalias [[C:%.*]]) #[[ATTR0]] { -; ARMPL-SVE: [[TMP23:%.*]] = call @armpl_svmodf_f32_x( [[WIDE_MASKED_LOAD:%.*]], ptr [[TMP22:%.*]], [[ACTIVE_LANE_MASK:%.*]]) +; ARMPL-SVE: [[DATA:%.*]] = call float @modff(float [[NUM:%.*]], ptr [[GEPB:%.*]]) #[[ATTR6:[0-9]+]] ; ; ARMPL-SVE-NOPRED-LABEL: define void @modf_f32 ; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[A:%.*]], ptr noalias [[B:%.*]], ptr noalias [[C:%.*]]) #[[ATTR0]] { -; ARMPL-SVE-NOPRED: [[TMP17:%.*]] = call @armpl_svmodf_f32_x( [[WIDE_LOAD:%.*]], ptr [[TMP16:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; ARMPL-SVE-NOPRED: [[DATA:%.*]] = call float @modff(float [[NUM:%.*]], ptr [[GEPB:%.*]]) #[[ATTR65:[0-9]+]] +; ARMPL-SVE-NOPRED: [[DATA:%.*]] = call float @modff(float [[NUM:%.*]], ptr [[GEPB:%.*]]) #[[ATTR66:[0-9]+]] ; entry: br label %for.body @@ -3012,7 +3111,7 @@ define void @nextafter_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; SLEEF-SVE-NOPRED-LABEL: define void @nextafter_f64 ; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call @_ZGVsMxvv_nextafter( [[WIDE_LOAD:%.*]], [[WIDE_LOAD]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call double @nextafter(double [[IN:%.*]], double [[IN]]) #[[ATTR66:[0-9]+]] +; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call double @nextafter(double [[IN:%.*]], double [[IN]]) #[[ATTR67:[0-9]+]] ; ; ARMPL-NEON-LABEL: define void @nextafter_f64 ; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { @@ -3025,7 +3124,7 @@ define void @nextafter_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; ARMPL-SVE-NOPRED-LABEL: define void @nextafter_f64 ; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call @armpl_svnextafter_f64_x( [[WIDE_LOAD:%.*]], [[WIDE_LOAD]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call double @nextafter(double [[IN:%.*]], double [[IN]]) #[[ATTR66:[0-9]+]] +; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call double @nextafter(double [[IN:%.*]], double [[IN]]) #[[ATTR67:[0-9]+]] ; entry: br label %for.body @@ -3057,7 +3156,7 @@ define void @nextafter_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; SLEEF-SVE-NOPRED-LABEL: define void @nextafter_f32 ; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call @_ZGVsMxvv_nextafterf( [[WIDE_LOAD:%.*]], [[WIDE_LOAD]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call float @nextafterf(float [[IN:%.*]], float [[IN]]) #[[ATTR67:[0-9]+]] +; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call float @nextafterf(float [[IN:%.*]], float [[IN]]) #[[ATTR68:[0-9]+]] ; ; ARMPL-NEON-LABEL: define void @nextafter_f32 ; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { @@ -3070,7 +3169,7 @@ define void @nextafter_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; ARMPL-SVE-NOPRED-LABEL: define void @nextafter_f32 ; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call @armpl_svnextafter_f32_x( [[WIDE_LOAD:%.*]], [[WIDE_LOAD]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call float @nextafterf(float [[IN:%.*]], float [[IN]]) #[[ATTR67:[0-9]+]] +; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call float @nextafterf(float [[IN:%.*]], float [[IN]]) #[[ATTR68:[0-9]+]] ; entry: br label %for.body @@ -3105,7 +3204,7 @@ define void @pow_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; SLEEF-SVE-NOPRED-LABEL: define void @pow_f64 ; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call @_ZGVsMxvv_pow( [[WIDE_LOAD:%.*]], [[WIDE_LOAD]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call double @pow(double [[IN:%.*]], double [[IN]]) #[[ATTR68:[0-9]+]] +; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call double @pow(double [[IN:%.*]], double [[IN]]) #[[ATTR69:[0-9]+]] ; ; ARMPL-NEON-LABEL: define void @pow_f64 ; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { @@ -3118,7 +3217,7 @@ define void @pow_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; ARMPL-SVE-NOPRED-LABEL: define void @pow_f64 ; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call @armpl_svpow_f64_x( [[WIDE_LOAD:%.*]], [[WIDE_LOAD]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call double @pow(double [[IN:%.*]], double [[IN]]) #[[ATTR68:[0-9]+]] +; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call double @pow(double [[IN:%.*]], double [[IN]]) #[[ATTR69:[0-9]+]] ; entry: br label %for.body @@ -3150,7 +3249,7 @@ define void @pow_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; SLEEF-SVE-NOPRED-LABEL: define void @pow_f32 ; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call @_ZGVsMxvv_powf( [[WIDE_LOAD:%.*]], [[WIDE_LOAD]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call float @powf(float [[IN:%.*]], float [[IN]]) #[[ATTR69:[0-9]+]] +; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call float @powf(float [[IN:%.*]], float [[IN]]) #[[ATTR70:[0-9]+]] ; ; ARMPL-NEON-LABEL: define void @pow_f32 ; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { @@ -3163,7 +3262,7 @@ define void @pow_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; ARMPL-SVE-NOPRED-LABEL: define void @pow_f32 ; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call @armpl_svpow_f32_x( [[WIDE_LOAD:%.*]], [[WIDE_LOAD]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call float @powf(float [[IN:%.*]], float [[IN]]) #[[ATTR69:[0-9]+]] +; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call float @powf(float [[IN:%.*]], float [[IN]]) #[[ATTR70:[0-9]+]] ; entry: br label %for.body @@ -3198,7 +3297,7 @@ define void @sin_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; SLEEF-SVE-NOPRED-LABEL: define void @sin_f64 ; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call @_ZGVsMxv_sin( [[WIDE_LOAD:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call double @sin(double [[IN:%.*]]) #[[ATTR70:[0-9]+]] +; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call double @sin(double [[IN:%.*]]) #[[ATTR71:[0-9]+]] ; ; ARMPL-NEON-LABEL: define void @sin_f64 ; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { @@ -3211,7 +3310,7 @@ define void @sin_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; ARMPL-SVE-NOPRED-LABEL: define void @sin_f64 ; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call @armpl_svsin_f64_x( [[WIDE_LOAD:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call double @sin(double [[IN:%.*]]) #[[ATTR70:[0-9]+]] +; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call double @sin(double [[IN:%.*]]) #[[ATTR71:[0-9]+]] ; entry: br label %for.body @@ -3243,7 +3342,7 @@ define void @sin_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; SLEEF-SVE-NOPRED-LABEL: define void @sin_f32 ; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call @_ZGVsMxv_sinf( [[WIDE_LOAD:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call float @sinf(float [[IN:%.*]]) #[[ATTR71:[0-9]+]] +; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call float @sinf(float [[IN:%.*]]) #[[ATTR72:[0-9]+]] ; ; ARMPL-NEON-LABEL: define void @sin_f32 ; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { @@ -3256,7 +3355,7 @@ define void @sin_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; ARMPL-SVE-NOPRED-LABEL: define void @sin_f32 ; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call @armpl_svsin_f32_x( [[WIDE_LOAD:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call float @sinf(float [[IN:%.*]]) #[[ATTR71:[0-9]+]] +; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call float @sinf(float [[IN:%.*]]) #[[ATTR72:[0-9]+]] ; entry: br label %for.body @@ -3286,12 +3385,12 @@ define void @sincos_f64(ptr noalias %a, ptr noalias %b, ptr noalias %c) { ; ; SLEEF-SVE-LABEL: define void @sincos_f64 ; SLEEF-SVE-SAME: (ptr noalias [[A:%.*]], ptr noalias [[B:%.*]], ptr noalias [[C:%.*]]) #[[ATTR0]] { -; SLEEF-SVE: call void @sincos(double [[NUM:%.*]], ptr [[GEPB:%.*]], ptr [[GEPC:%.*]]) #[[ATTR6:[0-9]+]] +; SLEEF-SVE: call void @sincos(double [[NUM:%.*]], ptr [[GEPB:%.*]], ptr [[GEPC:%.*]]) #[[ATTR7:[0-9]+]] ; ; SLEEF-SVE-NOPRED-LABEL: define void @sincos_f64 ; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[A:%.*]], ptr noalias [[B:%.*]], ptr noalias [[C:%.*]]) #[[ATTR0]] { ; SLEEF-SVE-NOPRED: call void @_ZGVsNxvl8l8_sincos( [[WIDE_LOAD:%.*]], ptr [[TMP17:%.*]], ptr [[TMP18:%.*]]) -; SLEEF-SVE-NOPRED: call void @sincos(double [[NUM:%.*]], ptr [[GEPB:%.*]], ptr [[GEPC:%.*]]) #[[ATTR72:[0-9]+]] +; SLEEF-SVE-NOPRED: call void @sincos(double [[NUM:%.*]], ptr [[GEPB:%.*]], ptr [[GEPC:%.*]]) #[[ATTR73:[0-9]+]] ; ; ARMPL-NEON-LABEL: define void @sincos_f64 ; ARMPL-NEON-SAME: (ptr noalias [[A:%.*]], ptr noalias [[B:%.*]], ptr noalias [[C:%.*]]) #[[ATTR0]] { @@ -3304,7 +3403,7 @@ define void @sincos_f64(ptr noalias %a, ptr noalias %b, ptr noalias %c) { ; ARMPL-SVE-NOPRED-LABEL: define void @sincos_f64 ; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[A:%.*]], ptr noalias [[B:%.*]], ptr noalias [[C:%.*]]) #[[ATTR0]] { ; ARMPL-SVE-NOPRED: call void @armpl_svsincos_f64_x( [[WIDE_LOAD:%.*]], ptr [[TMP17:%.*]], ptr [[TMP18:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; ARMPL-SVE-NOPRED: call void @sincos(double [[NUM:%.*]], ptr [[GEPB:%.*]], ptr [[GEPC:%.*]]) #[[ATTR72:[0-9]+]] +; ARMPL-SVE-NOPRED: call void @sincos(double [[NUM:%.*]], ptr [[GEPB:%.*]], ptr [[GEPC:%.*]]) #[[ATTR73:[0-9]+]] ; entry: br label %for.body @@ -3331,12 +3430,12 @@ define void @sincos_f32(ptr noalias %a, ptr noalias %b, ptr noalias %c) { ; ; SLEEF-SVE-LABEL: define void @sincos_f32 ; SLEEF-SVE-SAME: (ptr noalias [[A:%.*]], ptr noalias [[B:%.*]], ptr noalias [[C:%.*]]) #[[ATTR0]] { -; SLEEF-SVE: call void @sincosf(float [[NUM:%.*]], ptr [[GEPB:%.*]], ptr [[GEPC:%.*]]) #[[ATTR7:[0-9]+]] +; SLEEF-SVE: call void @sincosf(float [[NUM:%.*]], ptr [[GEPB:%.*]], ptr [[GEPC:%.*]]) #[[ATTR8:[0-9]+]] ; ; SLEEF-SVE-NOPRED-LABEL: define void @sincos_f32 ; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[A:%.*]], ptr noalias [[B:%.*]], ptr noalias [[C:%.*]]) #[[ATTR0]] { ; SLEEF-SVE-NOPRED: call void @_ZGVsNxvl4l4_sincosf( [[WIDE_LOAD:%.*]], ptr [[TMP17:%.*]], ptr [[TMP18:%.*]]) -; SLEEF-SVE-NOPRED: call void @sincosf(float [[NUM:%.*]], ptr [[GEPB:%.*]], ptr [[GEPC:%.*]]) #[[ATTR73:[0-9]+]] +; SLEEF-SVE-NOPRED: call void @sincosf(float [[NUM:%.*]], ptr [[GEPB:%.*]], ptr [[GEPC:%.*]]) #[[ATTR74:[0-9]+]] ; ; ARMPL-NEON-LABEL: define void @sincos_f32 ; ARMPL-NEON-SAME: (ptr noalias [[A:%.*]], ptr noalias [[B:%.*]], ptr noalias [[C:%.*]]) #[[ATTR0]] { @@ -3349,7 +3448,7 @@ define void @sincos_f32(ptr noalias %a, ptr noalias %b, ptr noalias %c) { ; ARMPL-SVE-NOPRED-LABEL: define void @sincos_f32 ; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[A:%.*]], ptr noalias [[B:%.*]], ptr noalias [[C:%.*]]) #[[ATTR0]] { ; ARMPL-SVE-NOPRED: call void @armpl_svsincos_f32_x( [[WIDE_LOAD:%.*]], ptr [[TMP17:%.*]], ptr [[TMP18:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; ARMPL-SVE-NOPRED: call void @sincosf(float [[NUM:%.*]], ptr [[GEPB:%.*]], ptr [[GEPC:%.*]]) #[[ATTR73:[0-9]+]] +; ARMPL-SVE-NOPRED: call void @sincosf(float [[NUM:%.*]], ptr [[GEPB:%.*]], ptr [[GEPC:%.*]]) #[[ATTR74:[0-9]+]] ; entry: br label %for.body @@ -3379,12 +3478,12 @@ define void @sincospi_f64(ptr noalias %a, ptr noalias %b, ptr noalias %c) { ; ; SLEEF-SVE-LABEL: define void @sincospi_f64 ; SLEEF-SVE-SAME: (ptr noalias [[A:%.*]], ptr noalias [[B:%.*]], ptr noalias [[C:%.*]]) #[[ATTR0]] { -; SLEEF-SVE: call void @sincospi(double [[NUM:%.*]], ptr [[GEPB:%.*]], ptr [[GEPC:%.*]]) #[[ATTR8:[0-9]+]] +; SLEEF-SVE: call void @sincospi(double [[NUM:%.*]], ptr [[GEPB:%.*]], ptr [[GEPC:%.*]]) #[[ATTR9:[0-9]+]] ; ; SLEEF-SVE-NOPRED-LABEL: define void @sincospi_f64 ; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[A:%.*]], ptr noalias [[B:%.*]], ptr noalias [[C:%.*]]) #[[ATTR0]] { ; SLEEF-SVE-NOPRED: call void @_ZGVsNxvl8l8_sincospi( [[WIDE_LOAD:%.*]], ptr [[TMP17:%.*]], ptr [[TMP18:%.*]]) -; SLEEF-SVE-NOPRED: call void @sincospi(double [[NUM:%.*]], ptr [[GEPB:%.*]], ptr [[GEPC:%.*]]) #[[ATTR74:[0-9]+]] +; SLEEF-SVE-NOPRED: call void @sincospi(double [[NUM:%.*]], ptr [[GEPB:%.*]], ptr [[GEPC:%.*]]) #[[ATTR75:[0-9]+]] ; ; ARMPL-NEON-LABEL: define void @sincospi_f64 ; ARMPL-NEON-SAME: (ptr noalias [[A:%.*]], ptr noalias [[B:%.*]], ptr noalias [[C:%.*]]) #[[ATTR0]] { @@ -3397,7 +3496,7 @@ define void @sincospi_f64(ptr noalias %a, ptr noalias %b, ptr noalias %c) { ; ARMPL-SVE-NOPRED-LABEL: define void @sincospi_f64 ; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[A:%.*]], ptr noalias [[B:%.*]], ptr noalias [[C:%.*]]) #[[ATTR0]] { ; ARMPL-SVE-NOPRED: call void @armpl_svsincospi_f64_x( [[WIDE_LOAD:%.*]], ptr [[TMP17:%.*]], ptr [[TMP18:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; ARMPL-SVE-NOPRED: call void @sincospi(double [[NUM:%.*]], ptr [[GEPB:%.*]], ptr [[GEPC:%.*]]) #[[ATTR74:[0-9]+]] +; ARMPL-SVE-NOPRED: call void @sincospi(double [[NUM:%.*]], ptr [[GEPB:%.*]], ptr [[GEPC:%.*]]) #[[ATTR75:[0-9]+]] ; entry: br label %for.body @@ -3424,12 +3523,12 @@ define void @sincospi_f32(ptr noalias %a, ptr noalias %b, ptr noalias %c) { ; ; SLEEF-SVE-LABEL: define void @sincospi_f32 ; SLEEF-SVE-SAME: (ptr noalias [[A:%.*]], ptr noalias [[B:%.*]], ptr noalias [[C:%.*]]) #[[ATTR0]] { -; SLEEF-SVE: call void @sincospif(float [[NUM:%.*]], ptr [[GEPB:%.*]], ptr [[GEPC:%.*]]) #[[ATTR9:[0-9]+]] +; SLEEF-SVE: call void @sincospif(float [[NUM:%.*]], ptr [[GEPB:%.*]], ptr [[GEPC:%.*]]) #[[ATTR10:[0-9]+]] ; ; SLEEF-SVE-NOPRED-LABEL: define void @sincospi_f32 ; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[A:%.*]], ptr noalias [[B:%.*]], ptr noalias [[C:%.*]]) #[[ATTR0]] { ; SLEEF-SVE-NOPRED: call void @_ZGVsNxvl4l4_sincospif( [[WIDE_LOAD:%.*]], ptr [[TMP17:%.*]], ptr [[TMP18:%.*]]) -; SLEEF-SVE-NOPRED: call void @sincospif(float [[NUM:%.*]], ptr [[GEPB:%.*]], ptr [[GEPC:%.*]]) #[[ATTR75:[0-9]+]] +; SLEEF-SVE-NOPRED: call void @sincospif(float [[NUM:%.*]], ptr [[GEPB:%.*]], ptr [[GEPC:%.*]]) #[[ATTR76:[0-9]+]] ; ; ARMPL-NEON-LABEL: define void @sincospi_f32 ; ARMPL-NEON-SAME: (ptr noalias [[A:%.*]], ptr noalias [[B:%.*]], ptr noalias [[C:%.*]]) #[[ATTR0]] { @@ -3442,7 +3541,7 @@ define void @sincospi_f32(ptr noalias %a, ptr noalias %b, ptr noalias %c) { ; ARMPL-SVE-NOPRED-LABEL: define void @sincospi_f32 ; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[A:%.*]], ptr noalias [[B:%.*]], ptr noalias [[C:%.*]]) #[[ATTR0]] { ; ARMPL-SVE-NOPRED: call void @armpl_svsincospi_f32_x( [[WIDE_LOAD:%.*]], ptr [[TMP17:%.*]], ptr [[TMP18:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; ARMPL-SVE-NOPRED: call void @sincospif(float [[NUM:%.*]], ptr [[GEPB:%.*]], ptr [[GEPC:%.*]]) #[[ATTR75:[0-9]+]] +; ARMPL-SVE-NOPRED: call void @sincospif(float [[NUM:%.*]], ptr [[GEPB:%.*]], ptr [[GEPC:%.*]]) #[[ATTR76:[0-9]+]] ; entry: br label %for.body @@ -3477,7 +3576,7 @@ define void @sinh_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; SLEEF-SVE-NOPRED-LABEL: define void @sinh_f64 ; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call @_ZGVsMxv_sinh( [[WIDE_LOAD:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call double @sinh(double [[IN:%.*]]) #[[ATTR76:[0-9]+]] +; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call double @sinh(double [[IN:%.*]]) #[[ATTR77:[0-9]+]] ; ; ARMPL-NEON-LABEL: define void @sinh_f64 ; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { @@ -3490,7 +3589,7 @@ define void @sinh_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; ARMPL-SVE-NOPRED-LABEL: define void @sinh_f64 ; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call @armpl_svsinh_f64_x( [[WIDE_LOAD:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call double @sinh(double [[IN:%.*]]) #[[ATTR76:[0-9]+]] +; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call double @sinh(double [[IN:%.*]]) #[[ATTR77:[0-9]+]] ; entry: br label %for.body @@ -3522,7 +3621,7 @@ define void @sinh_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; SLEEF-SVE-NOPRED-LABEL: define void @sinh_f32 ; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call @_ZGVsMxv_sinhf( [[WIDE_LOAD:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call float @sinhf(float [[IN:%.*]]) #[[ATTR77:[0-9]+]] +; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call float @sinhf(float [[IN:%.*]]) #[[ATTR78:[0-9]+]] ; ; ARMPL-NEON-LABEL: define void @sinh_f32 ; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { @@ -3535,7 +3634,7 @@ define void @sinh_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; ARMPL-SVE-NOPRED-LABEL: define void @sinh_f32 ; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call @armpl_svsinh_f32_x( [[WIDE_LOAD:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call float @sinhf(float [[IN:%.*]]) #[[ATTR77:[0-9]+]] +; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call float @sinhf(float [[IN:%.*]]) #[[ATTR78:[0-9]+]] ; entry: br label %for.body @@ -3570,7 +3669,7 @@ define void @sinpi_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; SLEEF-SVE-NOPRED-LABEL: define void @sinpi_f64 ; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call @_ZGVsMxv_sinpi( [[WIDE_LOAD:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call double @sinpi(double [[IN:%.*]]) #[[ATTR78:[0-9]+]] +; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call double @sinpi(double [[IN:%.*]]) #[[ATTR79:[0-9]+]] ; ; ARMPL-NEON-LABEL: define void @sinpi_f64 ; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { @@ -3583,7 +3682,7 @@ define void @sinpi_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; ARMPL-SVE-NOPRED-LABEL: define void @sinpi_f64 ; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call @armpl_svsinpi_f64_x( [[WIDE_LOAD:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call double @sinpi(double [[IN:%.*]]) #[[ATTR78:[0-9]+]] +; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call double @sinpi(double [[IN:%.*]]) #[[ATTR79:[0-9]+]] ; entry: br label %for.body @@ -3615,7 +3714,7 @@ define void @sinpi_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; SLEEF-SVE-NOPRED-LABEL: define void @sinpi_f32 ; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call @_ZGVsMxv_sinpif( [[WIDE_LOAD:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call float @sinpif(float [[IN:%.*]]) #[[ATTR79:[0-9]+]] +; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call float @sinpif(float [[IN:%.*]]) #[[ATTR80:[0-9]+]] ; ; ARMPL-NEON-LABEL: define void @sinpi_f32 ; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { @@ -3628,7 +3727,7 @@ define void @sinpi_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; ARMPL-SVE-NOPRED-LABEL: define void @sinpi_f32 ; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call @armpl_svsinpi_f32_x( [[WIDE_LOAD:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call float @sinpif(float [[IN:%.*]]) #[[ATTR79:[0-9]+]] +; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call float @sinpif(float [[IN:%.*]]) #[[ATTR80:[0-9]+]] ; entry: br label %for.body @@ -3663,7 +3762,7 @@ define void @sqrt_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; SLEEF-SVE-NOPRED-LABEL: define void @sqrt_f64 ; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call @_ZGVsMxv_sqrt( [[WIDE_LOAD:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call double @sqrt(double [[IN:%.*]]) #[[ATTR80:[0-9]+]] +; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call double @sqrt(double [[IN:%.*]]) #[[ATTR81:[0-9]+]] ; ; ARMPL-NEON-LABEL: define void @sqrt_f64 ; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { @@ -3676,7 +3775,7 @@ define void @sqrt_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; ARMPL-SVE-NOPRED-LABEL: define void @sqrt_f64 ; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call @armpl_svsqrt_f64_x( [[WIDE_LOAD:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call double @sqrt(double [[IN:%.*]]) #[[ATTR80:[0-9]+]] +; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call double @sqrt(double [[IN:%.*]]) #[[ATTR81:[0-9]+]] ; entry: br label %for.body @@ -3708,7 +3807,7 @@ define void @sqrt_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; SLEEF-SVE-NOPRED-LABEL: define void @sqrt_f32 ; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call @_ZGVsMxv_sqrtf( [[WIDE_LOAD:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call float @sqrtf(float [[IN:%.*]]) #[[ATTR81:[0-9]+]] +; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call float @sqrtf(float [[IN:%.*]]) #[[ATTR82:[0-9]+]] ; ; ARMPL-NEON-LABEL: define void @sqrt_f32 ; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { @@ -3721,7 +3820,7 @@ define void @sqrt_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; ARMPL-SVE-NOPRED-LABEL: define void @sqrt_f32 ; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call @armpl_svsqrt_f32_x( [[WIDE_LOAD:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call float @sqrtf(float [[IN:%.*]]) #[[ATTR81:[0-9]+]] +; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call float @sqrtf(float [[IN:%.*]]) #[[ATTR82:[0-9]+]] ; entry: br label %for.body @@ -3756,7 +3855,7 @@ define void @tan_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; SLEEF-SVE-NOPRED-LABEL: define void @tan_f64 ; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call @_ZGVsMxv_tan( [[WIDE_LOAD:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call double @tan(double [[IN:%.*]]) #[[ATTR82:[0-9]+]] +; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call double @tan(double [[IN:%.*]]) #[[ATTR83:[0-9]+]] ; ; ARMPL-NEON-LABEL: define void @tan_f64 ; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { @@ -3769,7 +3868,7 @@ define void @tan_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; ARMPL-SVE-NOPRED-LABEL: define void @tan_f64 ; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call @armpl_svtan_f64_x( [[WIDE_LOAD:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call double @tan(double [[IN:%.*]]) #[[ATTR82:[0-9]+]] +; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call double @tan(double [[IN:%.*]]) #[[ATTR83:[0-9]+]] ; entry: br label %for.body @@ -3801,7 +3900,7 @@ define void @tan_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; SLEEF-SVE-NOPRED-LABEL: define void @tan_f32 ; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call @_ZGVsMxv_tanf( [[WIDE_LOAD:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call float @tanf(float [[IN:%.*]]) #[[ATTR83:[0-9]+]] +; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call float @tanf(float [[IN:%.*]]) #[[ATTR84:[0-9]+]] ; ; ARMPL-NEON-LABEL: define void @tan_f32 ; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { @@ -3814,7 +3913,7 @@ define void @tan_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; ARMPL-SVE-NOPRED-LABEL: define void @tan_f32 ; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call @armpl_svtan_f32_x( [[WIDE_LOAD:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call float @tanf(float [[IN:%.*]]) #[[ATTR83:[0-9]+]] +; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call float @tanf(float [[IN:%.*]]) #[[ATTR84:[0-9]+]] ; entry: br label %for.body @@ -3849,7 +3948,7 @@ define void @tanh_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; SLEEF-SVE-NOPRED-LABEL: define void @tanh_f64 ; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call @_ZGVsMxv_tanh( [[WIDE_LOAD:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call double @tanh(double [[IN:%.*]]) #[[ATTR84:[0-9]+]] +; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call double @tanh(double [[IN:%.*]]) #[[ATTR85:[0-9]+]] ; ; ARMPL-NEON-LABEL: define void @tanh_f64 ; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { @@ -3862,7 +3961,7 @@ define void @tanh_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; ARMPL-SVE-NOPRED-LABEL: define void @tanh_f64 ; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call @armpl_svtanh_f64_x( [[WIDE_LOAD:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call double @tanh(double [[IN:%.*]]) #[[ATTR84:[0-9]+]] +; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call double @tanh(double [[IN:%.*]]) #[[ATTR85:[0-9]+]] ; entry: br label %for.body @@ -3894,7 +3993,7 @@ define void @tanh_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; SLEEF-SVE-NOPRED-LABEL: define void @tanh_f32 ; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call @_ZGVsMxv_tanhf( [[WIDE_LOAD:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call float @tanhf(float [[IN:%.*]]) #[[ATTR85:[0-9]+]] +; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call float @tanhf(float [[IN:%.*]]) #[[ATTR86:[0-9]+]] ; ; ARMPL-NEON-LABEL: define void @tanh_f32 ; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { @@ -3907,7 +4006,7 @@ define void @tanh_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; ARMPL-SVE-NOPRED-LABEL: define void @tanh_f32 ; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call @armpl_svtanh_f32_x( [[WIDE_LOAD:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call float @tanhf(float [[IN:%.*]]) #[[ATTR85:[0-9]+]] +; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call float @tanhf(float [[IN:%.*]]) #[[ATTR86:[0-9]+]] ; entry: br label %for.body @@ -3942,7 +4041,7 @@ define void @tgamma_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; SLEEF-SVE-NOPRED-LABEL: define void @tgamma_f64 ; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call @_ZGVsMxv_tgamma( [[WIDE_LOAD:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call double @tgamma(double [[IN:%.*]]) #[[ATTR86:[0-9]+]] +; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call double @tgamma(double [[IN:%.*]]) #[[ATTR87:[0-9]+]] ; ; ARMPL-NEON-LABEL: define void @tgamma_f64 ; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { @@ -3955,7 +4054,7 @@ define void @tgamma_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; ARMPL-SVE-NOPRED-LABEL: define void @tgamma_f64 ; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call @armpl_svtgamma_f64_x( [[WIDE_LOAD:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call double @tgamma(double [[IN:%.*]]) #[[ATTR86:[0-9]+]] +; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call double @tgamma(double [[IN:%.*]]) #[[ATTR87:[0-9]+]] ; entry: br label %for.body @@ -3987,7 +4086,7 @@ define void @tgamma_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; SLEEF-SVE-NOPRED-LABEL: define void @tgamma_f32 ; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call @_ZGVsMxv_tgammaf( [[WIDE_LOAD:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call float @tgammaf(float [[IN:%.*]]) #[[ATTR87:[0-9]+]] +; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call float @tgammaf(float [[IN:%.*]]) #[[ATTR88:[0-9]+]] ; ; ARMPL-NEON-LABEL: define void @tgamma_f32 ; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { @@ -4000,7 +4099,7 @@ define void @tgamma_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) { ; ARMPL-SVE-NOPRED-LABEL: define void @tgamma_f32 ; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { ; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call @armpl_svtgamma_f32_x( [[WIDE_LOAD:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) -; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call float @tgammaf(float [[IN:%.*]]) #[[ATTR87:[0-9]+]] +; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call float @tgammaf(float [[IN:%.*]]) #[[ATTR88:[0-9]+]] ; entry: br label %for.body @@ -4019,3 +4118,5 @@ define void @tgamma_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) { for.end: ret void } + +attributes #1 = { memory(argmem: write) } From 88d325cedaa16a307ebc909b301bb20684e22e67 Mon Sep 17 00:00:00 2001 From: Paschalis Mpeis Date: Wed, 17 Jan 2024 09:44:45 +0000 Subject: [PATCH 2/8] [LV][LAA] Vectorize math lib calls with mem write-only attribute Teach LAA to consider safe specific math lib calls which are known to have set the memory write-only attribute. Those attributes are set to calls by inferNonMandatoryLibFuncAttrs, in BuildLibCalls.cpp, and the current ones are modf/modff and frexp/frexpf. This happens only when the calls are found through TLI to have vectorized counterparts. --- ...arch64-veclib-function-calls-linear-ptrs.c | 15 ++++++--------- llvm/lib/Analysis/LoopAccessAnalysis.cpp | 19 +++++++++++++++++++ .../AArch64/veclib-function-calls.ll | 16 ++++++++++------ 3 files changed, 35 insertions(+), 15 deletions(-) diff --git a/clang/test/CodeGen/aarch64-veclib-function-calls-linear-ptrs.c b/clang/test/CodeGen/aarch64-veclib-function-calls-linear-ptrs.c index a449fac147058..957b3f5cb235d 100644 --- a/clang/test/CodeGen/aarch64-veclib-function-calls-linear-ptrs.c +++ b/clang/test/CodeGen/aarch64-veclib-function-calls-linear-ptrs.c @@ -17,7 +17,7 @@ vectorize. // CHECK-LABEL: define dso_local void @frexp_f64( // CHECK-SAME: ptr nocapture noundef readonly [[IN:%.*]], ptr nocapture noundef writeonly [[OUT1:%.*]], ptr nocapture noundef writeonly [[OUT2:%.*]], i32 noundef [[N:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] { -// CHECK: [[CALL:%.*]] = tail call double @frexp(double noundef [[TMP0:%.*]], ptr noundef [[ADD_PTR:%.*]]) #[[ATTR2:[0-9]+]] +// CHECK: [[CALL:%.*]] = tail call double @frexp(double noundef [[TMP0:%.*]], ptr noundef [[ADD_PTR:%.*]]) #[[ATTR5:[0-9]+]] // void frexp_f64(double *in, double *out1, int *out2, int N) { for (int i = 0; i < N; ++i) @@ -26,30 +26,27 @@ void frexp_f64(double *in, double *out1, int *out2, int N) { // CHECK-LABEL: define dso_local void @frexp_f32( // CHECK-SAME: ptr nocapture noundef readonly [[IN:%.*]], ptr nocapture noundef writeonly [[OUT1:%.*]], ptr nocapture noundef writeonly [[OUT2:%.*]], i32 noundef [[N:%.*]]) local_unnamed_addr #[[ATTR0]] { -// CHECK: [[CALL:%.*]] = tail call float @frexpf(float noundef [[TMP0:%.*]], ptr noundef [[ADD_PTR:%.*]]) #[[ATTR2]] +// CHECK: [[CALL:%.*]] = tail call float @frexpf(float noundef [[TMP0:%.*]], ptr noundef [[ADD_PTR:%.*]]) #[[ATTR5]] // void frexp_f32(float *in, float *out1, int *out2, int N) { for (int i = 0; i < N; ++i) *out1 = frexpf(in[i], out2+i); } - -// TODO: LAA must allow vectorization. - // CHECK-LABEL: define dso_local void @modf_f64( // CHECK-SAME: ptr nocapture noundef readonly [[IN:%.*]], ptr nocapture noundef writeonly [[OUT1:%.*]], ptr nocapture noundef writeonly [[OUT2:%.*]], i32 noundef [[N:%.*]]) local_unnamed_addr #[[ATTR0]] { -// CHECK: [[CALL:%.*]] = tail call double @modf(double noundef [[TMP0:%.*]], ptr noundef [[ADD_PTR:%.*]]) #[[ATTR3:[0-9]+]] +// CHECK: [[TMP11:%.*]] = tail call @armpl_svmodf_f64_x( [[WIDE_MASKED_LOAD:%.*]], ptr [[TMP10:%.*]], [[ACTIVE_LANE_MASK:%.*]]) +// CHECK: [[CALL:%.*]] = tail call double @modf(double noundef [[TMP14:%.*]], ptr noundef [[ADD_PTR:%.*]]) #[[ATTR6:[0-9]+]] // void modf_f64(double *in, double *out1, double *out2, int N) { for (int i = 0; i < N; ++i) out1[i] = modf(in[i], out2+i); } -// TODO: LAA must allow vectorization. - // CHECK-LABEL: define dso_local void @modf_f32( // CHECK-SAME: ptr nocapture noundef readonly [[IN:%.*]], ptr nocapture noundef writeonly [[OUT1:%.*]], ptr nocapture noundef writeonly [[OUT2:%.*]], i32 noundef [[N:%.*]]) local_unnamed_addr #[[ATTR0]] { -// CHECK: [[CALL:%.*]] = tail call float @modff(float noundef [[TMP0:%.*]], ptr noundef [[ADD_PTR:%.*]]) #[[ATTR4:[0-9]+]] +// CHECK: [[TMP11:%.*]] = tail call @armpl_svmodf_f32_x( [[WIDE_MASKED_LOAD:%.*]], ptr [[TMP10:%.*]], [[ACTIVE_LANE_MASK:%.*]]) +// CHECK: [[CALL:%.*]] = tail call float @modff(float noundef [[TMP14:%.*]], ptr noundef [[ADD_PTR:%.*]]) #[[ATTR7:[0-9]+]] // void modf_f32(float *in, float *out1, float *out2, int N) { for (int i = 0; i < N; ++i) diff --git a/llvm/lib/Analysis/LoopAccessAnalysis.cpp b/llvm/lib/Analysis/LoopAccessAnalysis.cpp index ae7f0373c4e84..d230d74565c44 100644 --- a/llvm/lib/Analysis/LoopAccessAnalysis.cpp +++ b/llvm/lib/Analysis/LoopAccessAnalysis.cpp @@ -2381,6 +2381,20 @@ bool LoopAccessInfo::canAnalyzeLoop() { return true; } +/// Returns whether \p I is a known math library call that has memory write-only +/// attribute set. +static bool isMathLibCallMemWriteOnly(const TargetLibraryInfo *TLI, + const Instruction &I) { + auto *Call = dyn_cast(&I); + if (!Call) + return false; + + LibFunc Func; + TLI->getLibFunc(*Call, Func); + return Func == LibFunc::LibFunc_modf || Func == LibFunc::LibFunc_modff || + Func == LibFunc::LibFunc_frexp || Func == LibFunc::LibFunc_frexpf; +} + void LoopAccessInfo::analyzeLoop(AAResults *AA, LoopInfo *LI, const TargetLibraryInfo *TLI, DominatorTree *DT) { @@ -2477,6 +2491,11 @@ void LoopAccessInfo::analyzeLoop(AAResults *AA, LoopInfo *LI, // Save 'store' instructions. Abort if other instructions write to memory. if (I.mayWriteToMemory()) { + // We can safety handle math functions that have vectorized + // counterparts and have the memory write-only attribute set. + if (isMathLibCallMemWriteOnly(TLI, I)) + continue; + auto *St = dyn_cast(&I); if (!St) { recordAnalysis("CantVectorizeInstruction", St) diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/veclib-function-calls.ll b/llvm/test/Transforms/LoopVectorize/AArch64/veclib-function-calls.ll index 0eb2b5d087401..d55d1532bb9bd 100644 --- a/llvm/test/Transforms/LoopVectorize/AArch64/veclib-function-calls.ll +++ b/llvm/test/Transforms/LoopVectorize/AArch64/veclib-function-calls.ll @@ -3011,7 +3011,7 @@ declare float @modff(float, ptr) #1 define void @modf_f64(ptr noalias %a, ptr noalias %b, ptr noalias %c) { ; SLEEF-NEON-LABEL: define void @modf_f64 ; SLEEF-NEON-SAME: (ptr noalias [[A:%.*]], ptr noalias [[B:%.*]], ptr noalias [[C:%.*]]) #[[ATTR0]] { -; SLEEF-NEON: [[DATA:%.*]] = call double @modf(double [[NUM:%.*]], ptr [[GEPB:%.*]]) #[[ATTR2:[0-9]+]] +; SLEEF-NEON: [[TMP5:%.*]] = call <2 x double> @_ZGVnN2vl8_modf(<2 x double> [[WIDE_LOAD:%.*]], ptr [[TMP4:%.*]]) ; ; SLEEF-SVE-LABEL: define void @modf_f64 ; SLEEF-SVE-SAME: (ptr noalias [[A:%.*]], ptr noalias [[B:%.*]], ptr noalias [[C:%.*]]) #[[ATTR0]] { @@ -3019,18 +3019,20 @@ define void @modf_f64(ptr noalias %a, ptr noalias %b, ptr noalias %c) { ; ; SLEEF-SVE-NOPRED-LABEL: define void @modf_f64 ; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[A:%.*]], ptr noalias [[B:%.*]], ptr noalias [[C:%.*]]) #[[ATTR0]] { +; SLEEF-SVE-NOPRED: [[TMP17:%.*]] = call @_ZGVsNxvl8_modf( [[WIDE_LOAD:%.*]], ptr [[TMP16:%.*]]) ; SLEEF-SVE-NOPRED: [[DATA:%.*]] = call double @modf(double [[NUM:%.*]], ptr [[GEPB:%.*]]) #[[ATTR65:[0-9]+]] ; ; ARMPL-NEON-LABEL: define void @modf_f64 ; ARMPL-NEON-SAME: (ptr noalias [[A:%.*]], ptr noalias [[B:%.*]], ptr noalias [[C:%.*]]) #[[ATTR0]] { -; ARMPL-NEON: [[DATA:%.*]] = call double @modf(double [[NUM:%.*]], ptr [[GEPB:%.*]]) #[[ATTR2:[0-9]+]] +; ARMPL-NEON: [[TMP5:%.*]] = call <2 x double> @armpl_vmodfq_f64(<2 x double> [[WIDE_LOAD:%.*]], ptr [[TMP4:%.*]]) ; ; ARMPL-SVE-LABEL: define void @modf_f64 ; ARMPL-SVE-SAME: (ptr noalias [[A:%.*]], ptr noalias [[B:%.*]], ptr noalias [[C:%.*]]) #[[ATTR0]] { -; ARMPL-SVE: [[DATA:%.*]] = call double @modf(double [[NUM:%.*]], ptr [[GEPB:%.*]]) #[[ATTR5:[0-9]+]] +; ARMPL-SVE: [[TMP23:%.*]] = call @armpl_svmodf_f64_x( [[WIDE_MASKED_LOAD:%.*]], ptr [[TMP22:%.*]], [[ACTIVE_LANE_MASK:%.*]]) ; ; ARMPL-SVE-NOPRED-LABEL: define void @modf_f64 ; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[A:%.*]], ptr noalias [[B:%.*]], ptr noalias [[C:%.*]]) #[[ATTR0]] { +; ARMPL-SVE-NOPRED: [[TMP17:%.*]] = call @armpl_svmodf_f64_x( [[WIDE_LOAD:%.*]], ptr [[TMP16:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) ; ARMPL-SVE-NOPRED: [[DATA:%.*]] = call double @modf(double [[NUM:%.*]], ptr [[GEPB:%.*]]) #[[ATTR65:[0-9]+]] ; entry: @@ -3055,7 +3057,7 @@ for.cond.cleanup: define void @modf_f32(ptr noalias %a, ptr noalias %b, ptr noalias %c) { ; SLEEF-NEON-LABEL: define void @modf_f32 ; SLEEF-NEON-SAME: (ptr noalias [[A:%.*]], ptr noalias [[B:%.*]], ptr noalias [[C:%.*]]) #[[ATTR0]] { -; SLEEF-NEON: [[DATA:%.*]] = call float @modff(float [[NUM:%.*]], ptr [[GEPB:%.*]]) #[[ATTR3:[0-9]+]] +; SLEEF-NEON: [[TMP5:%.*]] = call <4 x float> @_ZGVnN4vl4_modff(<4 x float> [[WIDE_LOAD:%.*]], ptr [[TMP4:%.*]]) ; ; SLEEF-SVE-LABEL: define void @modf_f32 ; SLEEF-SVE-SAME: (ptr noalias [[A:%.*]], ptr noalias [[B:%.*]], ptr noalias [[C:%.*]]) #[[ATTR0]] { @@ -3063,18 +3065,20 @@ define void @modf_f32(ptr noalias %a, ptr noalias %b, ptr noalias %c) { ; ; SLEEF-SVE-NOPRED-LABEL: define void @modf_f32 ; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[A:%.*]], ptr noalias [[B:%.*]], ptr noalias [[C:%.*]]) #[[ATTR0]] { +; SLEEF-SVE-NOPRED: [[TMP17:%.*]] = call @_ZGVsNxvl4_modff( [[WIDE_LOAD:%.*]], ptr [[TMP16:%.*]]) ; SLEEF-SVE-NOPRED: [[DATA:%.*]] = call float @modff(float [[NUM:%.*]], ptr [[GEPB:%.*]]) #[[ATTR66:[0-9]+]] ; ; ARMPL-NEON-LABEL: define void @modf_f32 ; ARMPL-NEON-SAME: (ptr noalias [[A:%.*]], ptr noalias [[B:%.*]], ptr noalias [[C:%.*]]) #[[ATTR0]] { -; ARMPL-NEON: [[DATA:%.*]] = call float @modff(float [[NUM:%.*]], ptr [[GEPB:%.*]]) #[[ATTR3:[0-9]+]] +; ARMPL-NEON: [[TMP5:%.*]] = call <4 x float> @armpl_vmodfq_f32(<4 x float> [[WIDE_LOAD:%.*]], ptr [[TMP4:%.*]]) ; ; ARMPL-SVE-LABEL: define void @modf_f32 ; ARMPL-SVE-SAME: (ptr noalias [[A:%.*]], ptr noalias [[B:%.*]], ptr noalias [[C:%.*]]) #[[ATTR0]] { -; ARMPL-SVE: [[DATA:%.*]] = call float @modff(float [[NUM:%.*]], ptr [[GEPB:%.*]]) #[[ATTR6:[0-9]+]] +; ARMPL-SVE: [[TMP23:%.*]] = call @armpl_svmodf_f32_x( [[WIDE_MASKED_LOAD:%.*]], ptr [[TMP22:%.*]], [[ACTIVE_LANE_MASK:%.*]]) ; ; ARMPL-SVE-NOPRED-LABEL: define void @modf_f32 ; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[A:%.*]], ptr noalias [[B:%.*]], ptr noalias [[C:%.*]]) #[[ATTR0]] { +; ARMPL-SVE-NOPRED: [[TMP17:%.*]] = call @armpl_svmodf_f32_x( [[WIDE_LOAD:%.*]], ptr [[TMP16:%.*]], shufflevector ( insertelement ( poison, i1 true, i64 0), poison, zeroinitializer)) ; ARMPL-SVE-NOPRED: [[DATA:%.*]] = call float @modff(float [[NUM:%.*]], ptr [[GEPB:%.*]]) #[[ATTR66:[0-9]+]] ; entry: From e18c2f10591e61f75403283712193fb5ed690b27 Mon Sep 17 00:00:00 2001 From: Paschalis Mpeis Date: Thu, 18 Jan 2024 14:14:00 +0000 Subject: [PATCH 3/8] Add check for the 'memory(argmem: write)' attribute. --- llvm/lib/Analysis/LoopAccessAnalysis.cpp | 14 ++++++++++---- 1 file changed, 10 insertions(+), 4 deletions(-) diff --git a/llvm/lib/Analysis/LoopAccessAnalysis.cpp b/llvm/lib/Analysis/LoopAccessAnalysis.cpp index d230d74565c44..4b0a94c21b99b 100644 --- a/llvm/lib/Analysis/LoopAccessAnalysis.cpp +++ b/llvm/lib/Analysis/LoopAccessAnalysis.cpp @@ -2381,18 +2381,24 @@ bool LoopAccessInfo::canAnalyzeLoop() { return true; } -/// Returns whether \p I is a known math library call that has memory write-only -/// attribute set. +/// Returns whether \p I is a known math library call that has attribute +/// 'memory(argmem: write)' set. static bool isMathLibCallMemWriteOnly(const TargetLibraryInfo *TLI, const Instruction &I) { auto *Call = dyn_cast(&I); if (!Call) return false; + Function *F = Call->getCalledFunction(); + if (!F->hasFnAttribute(Attribute::AttrKind::Memory)) + return false; + + auto ME = F->getFnAttribute(Attribute::AttrKind::Memory).getMemoryEffects(); LibFunc Func; TLI->getLibFunc(*Call, Func); - return Func == LibFunc::LibFunc_modf || Func == LibFunc::LibFunc_modff || - Func == LibFunc::LibFunc_frexp || Func == LibFunc::LibFunc_frexpf; + return ME.onlyWritesMemory() && ME.onlyAccessesArgPointees() && + (Func == LibFunc::LibFunc_modf || Func == LibFunc::LibFunc_modff || + Func == LibFunc::LibFunc_frexp || Func == LibFunc::LibFunc_frexpf); } void LoopAccessInfo::analyzeLoop(AAResults *AA, LoopInfo *LI, From 192d49dafcce6fecd5c8ff3c1a4045ecacd9a004 Mon Sep 17 00:00:00 2001 From: Paschalis Mpeis Date: Fri, 19 Jan 2024 10:20:50 +0000 Subject: [PATCH 4/8] Addressing reviewers --- .../CodeGen/aarch64-veclib-function-calls-linear-ptrs.c | 2 +- llvm/lib/Analysis/LoopAccessAnalysis.cpp | 6 +----- 2 files changed, 2 insertions(+), 6 deletions(-) diff --git a/clang/test/CodeGen/aarch64-veclib-function-calls-linear-ptrs.c b/clang/test/CodeGen/aarch64-veclib-function-calls-linear-ptrs.c index 957b3f5cb235d..98085a183f46c 100644 --- a/clang/test/CodeGen/aarch64-veclib-function-calls-linear-ptrs.c +++ b/clang/test/CodeGen/aarch64-veclib-function-calls-linear-ptrs.c @@ -1,5 +1,5 @@ // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --filter "call.*(frexp|modf)" --version 4 -// RUN: %clang --target=aarch64-linux-gnu -march=armv8-a+sve -O3 -mllvm -vector-library=ArmPL -mllvm -force-vector-interleave=1 -mllvm -prefer-predicate-over-epilogue=predicate-dont-vectorize -emit-llvm -S -o - %s | FileCheck %s +// RUN: %clang --target=aarch64-linux-gnu -march=armv8-a+sve -O3 -isystem %S/../Headers/Inputs/include -mllvm -vector-library=ArmPL -mllvm -force-vector-interleave=1 -mllvm -prefer-predicate-over-epilogue=predicate-dont-vectorize -emit-llvm -S -o - %s | FileCheck %s // REQUIRES: aarch64-registered-target diff --git a/llvm/lib/Analysis/LoopAccessAnalysis.cpp b/llvm/lib/Analysis/LoopAccessAnalysis.cpp index 4b0a94c21b99b..df7df2fa56c1d 100644 --- a/llvm/lib/Analysis/LoopAccessAnalysis.cpp +++ b/llvm/lib/Analysis/LoopAccessAnalysis.cpp @@ -2389,11 +2389,7 @@ static bool isMathLibCallMemWriteOnly(const TargetLibraryInfo *TLI, if (!Call) return false; - Function *F = Call->getCalledFunction(); - if (!F->hasFnAttribute(Attribute::AttrKind::Memory)) - return false; - - auto ME = F->getFnAttribute(Attribute::AttrKind::Memory).getMemoryEffects(); + auto ME = Call->getMemoryEffects(); LibFunc Func; TLI->getLibFunc(*Call, Func); return ME.onlyWritesMemory() && ME.onlyAccessesArgPointees() && From 923e2700b5c3674122bcb91c7d16872c6faf1148 Mon Sep 17 00:00:00 2001 From: Paschalis Mpeis Date: Tue, 6 Feb 2024 09:14:50 +0000 Subject: [PATCH 5/8] Rebased and updated test after PR #80296 --- .../aarch64-veclib-function-calls-linear-ptrs.c | 10 ++++------ 1 file changed, 4 insertions(+), 6 deletions(-) diff --git a/clang/test/CodeGen/aarch64-veclib-function-calls-linear-ptrs.c b/clang/test/CodeGen/aarch64-veclib-function-calls-linear-ptrs.c index 98085a183f46c..4a26d3ce9460d 100644 --- a/clang/test/CodeGen/aarch64-veclib-function-calls-linear-ptrs.c +++ b/clang/test/CodeGen/aarch64-veclib-function-calls-linear-ptrs.c @@ -17,7 +17,7 @@ vectorize. // CHECK-LABEL: define dso_local void @frexp_f64( // CHECK-SAME: ptr nocapture noundef readonly [[IN:%.*]], ptr nocapture noundef writeonly [[OUT1:%.*]], ptr nocapture noundef writeonly [[OUT2:%.*]], i32 noundef [[N:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] { -// CHECK: [[CALL:%.*]] = tail call double @frexp(double noundef [[TMP0:%.*]], ptr noundef [[ADD_PTR:%.*]]) #[[ATTR5:[0-9]+]] +// CHECK: [[CALL:%.*]] = tail call double @frexp(double noundef [[TMP0:%.*]], ptr noundef [[ADD_PTR:%.*]]) #[[ATTR2:[0-9]+]] // void frexp_f64(double *in, double *out1, int *out2, int N) { for (int i = 0; i < N; ++i) @@ -26,7 +26,7 @@ void frexp_f64(double *in, double *out1, int *out2, int N) { // CHECK-LABEL: define dso_local void @frexp_f32( // CHECK-SAME: ptr nocapture noundef readonly [[IN:%.*]], ptr nocapture noundef writeonly [[OUT1:%.*]], ptr nocapture noundef writeonly [[OUT2:%.*]], i32 noundef [[N:%.*]]) local_unnamed_addr #[[ATTR0]] { -// CHECK: [[CALL:%.*]] = tail call float @frexpf(float noundef [[TMP0:%.*]], ptr noundef [[ADD_PTR:%.*]]) #[[ATTR5]] +// CHECK: [[CALL:%.*]] = tail call float @frexpf(float noundef [[TMP0:%.*]], ptr noundef [[ADD_PTR:%.*]]) #[[ATTR2]] // void frexp_f32(float *in, float *out1, int *out2, int N) { for (int i = 0; i < N; ++i) @@ -35,8 +35,7 @@ void frexp_f32(float *in, float *out1, int *out2, int N) { // CHECK-LABEL: define dso_local void @modf_f64( // CHECK-SAME: ptr nocapture noundef readonly [[IN:%.*]], ptr nocapture noundef writeonly [[OUT1:%.*]], ptr nocapture noundef writeonly [[OUT2:%.*]], i32 noundef [[N:%.*]]) local_unnamed_addr #[[ATTR0]] { -// CHECK: [[TMP11:%.*]] = tail call @armpl_svmodf_f64_x( [[WIDE_MASKED_LOAD:%.*]], ptr [[TMP10:%.*]], [[ACTIVE_LANE_MASK:%.*]]) -// CHECK: [[CALL:%.*]] = tail call double @modf(double noundef [[TMP14:%.*]], ptr noundef [[ADD_PTR:%.*]]) #[[ATTR6:[0-9]+]] +// CHECK: [[CALL:%.*]] = tail call double @modf(double noundef [[TMP0:%.*]], ptr noundef [[ADD_PTR:%.*]]) #[[ATTR3:[0-9]+]] // void modf_f64(double *in, double *out1, double *out2, int N) { for (int i = 0; i < N; ++i) @@ -45,8 +44,7 @@ void modf_f64(double *in, double *out1, double *out2, int N) { // CHECK-LABEL: define dso_local void @modf_f32( // CHECK-SAME: ptr nocapture noundef readonly [[IN:%.*]], ptr nocapture noundef writeonly [[OUT1:%.*]], ptr nocapture noundef writeonly [[OUT2:%.*]], i32 noundef [[N:%.*]]) local_unnamed_addr #[[ATTR0]] { -// CHECK: [[TMP11:%.*]] = tail call @armpl_svmodf_f32_x( [[WIDE_MASKED_LOAD:%.*]], ptr [[TMP10:%.*]], [[ACTIVE_LANE_MASK:%.*]]) -// CHECK: [[CALL:%.*]] = tail call float @modff(float noundef [[TMP14:%.*]], ptr noundef [[ADD_PTR:%.*]]) #[[ATTR7:[0-9]+]] +// CHECK: [[CALL:%.*]] = tail call float @modff(float noundef [[TMP0:%.*]], ptr noundef [[ADD_PTR:%.*]]) #[[ATTR4:[0-9]+]] // void modf_f32(float *in, float *out1, float *out2, int N) { for (int i = 0; i < N; ++i) From 4e4c77299390d7e84c7b2fa048811c20c09a1706 Mon Sep 17 00:00:00 2001 From: Paschalis Mpeis Date: Tue, 27 Feb 2024 15:59:14 +0000 Subject: [PATCH 6/8] Added LAA and LV tests Removed C test. Code rebased on top of patch that enables mappings for modf/modff (among others). --- ...arch64-veclib-function-calls-linear-ptrs.c | 52 ------- llvm/lib/Analysis/LoopAccessAnalysis.cpp | 6 +- .../LoopAccessAnalysis/attr-mem-write-only.ll | 117 ++++++++++++++++ .../veclib-function-calls-linear-ptrs.ll | 132 ++++++++++++++++++ 4 files changed, 254 insertions(+), 53 deletions(-) delete mode 100644 clang/test/CodeGen/aarch64-veclib-function-calls-linear-ptrs.c create mode 100644 llvm/test/Analysis/LoopAccessAnalysis/attr-mem-write-only.ll create mode 100644 llvm/test/Transforms/LoopVectorize/AArch64/veclib-function-calls-linear-ptrs.ll diff --git a/clang/test/CodeGen/aarch64-veclib-function-calls-linear-ptrs.c b/clang/test/CodeGen/aarch64-veclib-function-calls-linear-ptrs.c deleted file mode 100644 index 4a26d3ce9460d..0000000000000 --- a/clang/test/CodeGen/aarch64-veclib-function-calls-linear-ptrs.c +++ /dev/null @@ -1,52 +0,0 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --filter "call.*(frexp|modf)" --version 4 -// RUN: %clang --target=aarch64-linux-gnu -march=armv8-a+sve -O3 -isystem %S/../Headers/Inputs/include -mllvm -vector-library=ArmPL -mllvm -force-vector-interleave=1 -mllvm -prefer-predicate-over-epilogue=predicate-dont-vectorize -emit-llvm -S -o - %s | FileCheck %s - -// REQUIRES: aarch64-registered-target - -/* -Testing vectorization of math functions that have the attribute write-only to -memory set. Given they have vectorized counterparts, they should be able to -vectorize. -*/ - -// The following define is required to access some math functions. -#define _GNU_SOURCE -#include - -// frexp/frexpf have no TLI mappings yet. - -// CHECK-LABEL: define dso_local void @frexp_f64( -// CHECK-SAME: ptr nocapture noundef readonly [[IN:%.*]], ptr nocapture noundef writeonly [[OUT1:%.*]], ptr nocapture noundef writeonly [[OUT2:%.*]], i32 noundef [[N:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] { -// CHECK: [[CALL:%.*]] = tail call double @frexp(double noundef [[TMP0:%.*]], ptr noundef [[ADD_PTR:%.*]]) #[[ATTR2:[0-9]+]] -// -void frexp_f64(double *in, double *out1, int *out2, int N) { - for (int i = 0; i < N; ++i) - *out1 = frexp(in[i], out2+i); -} - -// CHECK-LABEL: define dso_local void @frexp_f32( -// CHECK-SAME: ptr nocapture noundef readonly [[IN:%.*]], ptr nocapture noundef writeonly [[OUT1:%.*]], ptr nocapture noundef writeonly [[OUT2:%.*]], i32 noundef [[N:%.*]]) local_unnamed_addr #[[ATTR0]] { -// CHECK: [[CALL:%.*]] = tail call float @frexpf(float noundef [[TMP0:%.*]], ptr noundef [[ADD_PTR:%.*]]) #[[ATTR2]] -// -void frexp_f32(float *in, float *out1, int *out2, int N) { - for (int i = 0; i < N; ++i) - *out1 = frexpf(in[i], out2+i); -} - -// CHECK-LABEL: define dso_local void @modf_f64( -// CHECK-SAME: ptr nocapture noundef readonly [[IN:%.*]], ptr nocapture noundef writeonly [[OUT1:%.*]], ptr nocapture noundef writeonly [[OUT2:%.*]], i32 noundef [[N:%.*]]) local_unnamed_addr #[[ATTR0]] { -// CHECK: [[CALL:%.*]] = tail call double @modf(double noundef [[TMP0:%.*]], ptr noundef [[ADD_PTR:%.*]]) #[[ATTR3:[0-9]+]] -// -void modf_f64(double *in, double *out1, double *out2, int N) { - for (int i = 0; i < N; ++i) - out1[i] = modf(in[i], out2+i); -} - -// CHECK-LABEL: define dso_local void @modf_f32( -// CHECK-SAME: ptr nocapture noundef readonly [[IN:%.*]], ptr nocapture noundef writeonly [[OUT1:%.*]], ptr nocapture noundef writeonly [[OUT2:%.*]], i32 noundef [[N:%.*]]) local_unnamed_addr #[[ATTR0]] { -// CHECK: [[CALL:%.*]] = tail call float @modff(float noundef [[TMP0:%.*]], ptr noundef [[ADD_PTR:%.*]]) #[[ATTR4:[0-9]+]] -// -void modf_f32(float *in, float *out1, float *out2, int N) { - for (int i = 0; i < N; ++i) - out1[i] = modff(in[i], out2+i); -} diff --git a/llvm/lib/Analysis/LoopAccessAnalysis.cpp b/llvm/lib/Analysis/LoopAccessAnalysis.cpp index df7df2fa56c1d..27859d8009886 100644 --- a/llvm/lib/Analysis/LoopAccessAnalysis.cpp +++ b/llvm/lib/Analysis/LoopAccessAnalysis.cpp @@ -2495,8 +2495,12 @@ void LoopAccessInfo::analyzeLoop(AAResults *AA, LoopInfo *LI, if (I.mayWriteToMemory()) { // We can safety handle math functions that have vectorized // counterparts and have the memory write-only attribute set. - if (isMathLibCallMemWriteOnly(TLI, I)) + if (isMathLibCallMemWriteOnly(TLI, I)) { + LLVM_DEBUG(dbgs() + << "LAA: allow math function with write-only attribute:" + << I << "\n"); continue; + } auto *St = dyn_cast(&I); if (!St) { diff --git a/llvm/test/Analysis/LoopAccessAnalysis/attr-mem-write-only.ll b/llvm/test/Analysis/LoopAccessAnalysis/attr-mem-write-only.ll new file mode 100644 index 0000000000000..aca4e4ad38921 --- /dev/null +++ b/llvm/test/Analysis/LoopAccessAnalysis/attr-mem-write-only.ll @@ -0,0 +1,117 @@ +; RUN: opt < %s -mattr=+sve -vector-library=ArmPL -passes=inject-tli-mappings,loop-vectorize -debug-only=loop-accesses -disable-output 2>&1 | FileCheck %s + +; REQUIRES: asserts + +target triple = "aarch64-unknown-linux-gnu" + +; TODO: add mappings for frexp/frexpf + +define void @frexp_f64(ptr %in, ptr %out1, ptr %out2, i32 %N) { +entry: + %cmp4 = icmp sgt i32 %N, 0 + br i1 %cmp4, label %for.body.preheader, label %for.cond.cleanup + +for.body.preheader: + %wide.trip.count = zext nneg i32 %N to i64 + br label %for.body + +for.cond.cleanup: + ret void + +for.body: + %indvars.iv = phi i64 [ 0, %for.body.preheader ], [ %indvars.iv.next, %for.body ] + %arrayidx = getelementptr inbounds double, ptr %in, i64 %indvars.iv + %0 = load double, ptr %arrayidx, align 8 + %add.ptr = getelementptr inbounds i32, ptr %out2, i64 %indvars.iv + %call = tail call double @frexp(double noundef %0, ptr noundef %add.ptr) + store double %call, ptr %out1, align 8 + %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1 + %exitcond.not = icmp eq i64 %indvars.iv.next, %wide.trip.count + br i1 %exitcond.not, label %for.cond.cleanup, label %for.body +} + +declare double @frexp(double, ptr) #1 + +define void @frexp_f32(ptr readonly %in, ptr %out1, ptr %out2, i32 %N) { +entry: + %cmp4 = icmp sgt i32 %N, 0 + br i1 %cmp4, label %for.body.preheader, label %for.cond.cleanup + +for.body.preheader: + %wide.trip.count = zext nneg i32 %N to i64 + br label %for.body + +for.cond.cleanup: + ret void + +for.body: + %indvars.iv = phi i64 [ 0, %for.body.preheader ], [ %indvars.iv.next, %for.body ] + %arrayidx = getelementptr inbounds float, ptr %in, i64 %indvars.iv + %0 = load float, ptr %arrayidx, align 4 + %add.ptr = getelementptr inbounds i32, ptr %out2, i64 %indvars.iv + %call = tail call float @frexpf(float noundef %0, ptr noundef %add.ptr) + store float %call, ptr %out1, align 4 + %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1 + %exitcond.not = icmp eq i64 %indvars.iv.next, %wide.trip.count + br i1 %exitcond.not, label %for.cond.cleanup, label %for.body +} + +declare float @frexpf(float , ptr) #1 + +define void @modf_f64(ptr %in, ptr %out1, ptr %out2, i32 %N) { +; CHECK: LAA: allow math function with write-only attribute: %call = tail call double @modf +entry: + %cmp7 = icmp sgt i32 %N, 0 + br i1 %cmp7, label %for.body.preheader, label %for.cond.cleanup + +for.body.preheader: + %wide.trip.count = zext nneg i32 %N to i64 + br label %for.body + +for.cond.cleanup: + ret void + +for.body: + %indvars.iv = phi i64 [ 0, %for.body.preheader ], [ %indvars.iv.next, %for.body ] + %arrayidx = getelementptr inbounds double, ptr %in, i64 %indvars.iv + %0 = load double, ptr %arrayidx, align 8 + %add.ptr = getelementptr inbounds double, ptr %out2, i64 %indvars.iv + %call = tail call double @modf(double noundef %0, ptr noundef %add.ptr) + %arrayidx2 = getelementptr inbounds double, ptr %out1, i64 %indvars.iv + store double %call, ptr %arrayidx2, align 8 + %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1 + %exitcond.not = icmp eq i64 %indvars.iv.next, %wide.trip.count + br i1 %exitcond.not, label %for.cond.cleanup, label %for.body +} + +declare double @modf(double , ptr ) #1 + +define void @modf_f32(ptr %in, ptr %out1, ptr %out2, i32 %N) { +; CHECK: LAA: allow math function with write-only attribute: %call = tail call float @modff +entry: + %cmp7 = icmp sgt i32 %N, 0 + br i1 %cmp7, label %for.body.preheader, label %for.cond.cleanup + +for.body.preheader: + %wide.trip.count = zext nneg i32 %N to i64 + br label %for.body + +for.cond.cleanup: + ret void + +for.body: + %indvars.iv = phi i64 [ 0, %for.body.preheader ], [ %indvars.iv.next, %for.body ] + %arrayidx = getelementptr inbounds float, ptr %in, i64 %indvars.iv + %0 = load float, ptr %arrayidx, align 4 + %add.ptr = getelementptr inbounds float, ptr %out2, i64 %indvars.iv + %call = tail call float @modff(float noundef %0, ptr noundef %add.ptr) + %arrayidx2 = getelementptr inbounds float, ptr %out1, i64 %indvars.iv + store float %call, ptr %arrayidx2, align 4 + %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1 + %exitcond.not = icmp eq i64 %indvars.iv.next, %wide.trip.count + br i1 %exitcond.not, label %for.cond.cleanup, label %for.body +} + +declare float @modff(float noundef, ptr nocapture noundef) #1 + +attributes #1 = { memory(argmem: write) } \ No newline at end of file diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/veclib-function-calls-linear-ptrs.ll b/llvm/test/Transforms/LoopVectorize/AArch64/veclib-function-calls-linear-ptrs.ll new file mode 100644 index 0000000000000..0a502f52de9cc --- /dev/null +++ b/llvm/test/Transforms/LoopVectorize/AArch64/veclib-function-calls-linear-ptrs.ll @@ -0,0 +1,132 @@ +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --filter "call.*(frexp|modf)" --version 4 +; RUN: opt < %s -mattr=+sve -vector-library=ArmPL -passes=inject-tli-mappings,loop-vectorize -force-vector-interleave=1 -prefer-predicate-over-epilogue=predicate-dont-vectorize -S | FileCheck %s + +target triple = "aarch64-unknown-linux-gnu" + +; TODO: add mappings for frexp/frexpf + +define void @frexp_f64(ptr %in, ptr %out1, ptr %out2, i32 %N) { +; CHECK-LABEL: define void @frexp_f64( +; CHECK-SAME: ptr [[IN:%.*]], ptr [[OUT1:%.*]], ptr [[OUT2:%.*]], i32 [[N:%.*]]) #[[ATTR0:[0-9]+]] { +; CHECK: [[CALL:%.*]] = tail call double @frexp(double noundef [[TMP0:%.*]], ptr noundef [[ADD_PTR:%.*]]) +; +entry: + %cmp4 = icmp sgt i32 %N, 0 + br i1 %cmp4, label %for.body.preheader, label %for.cond.cleanup + +for.body.preheader: + %wide.trip.count = zext nneg i32 %N to i64 + br label %for.body + +for.cond.cleanup: + ret void + +for.body: + %indvars.iv = phi i64 [ 0, %for.body.preheader ], [ %indvars.iv.next, %for.body ] + %arrayidx = getelementptr inbounds double, ptr %in, i64 %indvars.iv + %0 = load double, ptr %arrayidx, align 8 + %add.ptr = getelementptr inbounds i32, ptr %out2, i64 %indvars.iv + %call = tail call double @frexp(double noundef %0, ptr noundef %add.ptr) + store double %call, ptr %out1, align 8 + %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1 + %exitcond.not = icmp eq i64 %indvars.iv.next, %wide.trip.count + br i1 %exitcond.not, label %for.cond.cleanup, label %for.body +} + +declare double @frexp(double, ptr) #1 + +define void @frexp_f32(ptr readonly %in, ptr %out1, ptr %out2, i32 %N) { +; CHECK-LABEL: define void @frexp_f32( +; CHECK-SAME: ptr readonly [[IN:%.*]], ptr [[OUT1:%.*]], ptr [[OUT2:%.*]], i32 [[N:%.*]]) #[[ATTR0]] { +; CHECK: [[CALL:%.*]] = tail call float @frexpf(float noundef [[TMP0:%.*]], ptr noundef [[ADD_PTR:%.*]]) +; +entry: + %cmp4 = icmp sgt i32 %N, 0 + br i1 %cmp4, label %for.body.preheader, label %for.cond.cleanup + +for.body.preheader: + %wide.trip.count = zext nneg i32 %N to i64 + br label %for.body + +for.cond.cleanup: + ret void + +for.body: + %indvars.iv = phi i64 [ 0, %for.body.preheader ], [ %indvars.iv.next, %for.body ] + %arrayidx = getelementptr inbounds float, ptr %in, i64 %indvars.iv + %0 = load float, ptr %arrayidx, align 4 + %add.ptr = getelementptr inbounds i32, ptr %out2, i64 %indvars.iv + %call = tail call float @frexpf(float noundef %0, ptr noundef %add.ptr) + store float %call, ptr %out1, align 4 + %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1 + %exitcond.not = icmp eq i64 %indvars.iv.next, %wide.trip.count + br i1 %exitcond.not, label %for.cond.cleanup, label %for.body +} + +declare float @frexpf(float , ptr) #1 + +define void @modf_f64(ptr %in, ptr %out1, ptr %out2, i32 %N) { +; CHECK-LABEL: define void @modf_f64( +; CHECK-SAME: ptr [[IN:%.*]], ptr [[OUT1:%.*]], ptr [[OUT2:%.*]], i32 [[N:%.*]]) #[[ATTR0]] { +; CHECK: [[TMP27:%.*]] = call @armpl_svmodf_f64_x( [[WIDE_MASKED_LOAD:%.*]], ptr [[TMP26:%.*]], [[ACTIVE_LANE_MASK:%.*]]) +; CHECK: [[CALL:%.*]] = tail call double @modf(double noundef [[TMP32:%.*]], ptr noundef [[ADD_PTR:%.*]]) #[[ATTR5:[0-9]+]] +; +entry: + %cmp7 = icmp sgt i32 %N, 0 + br i1 %cmp7, label %for.body.preheader, label %for.cond.cleanup + +for.body.preheader: + %wide.trip.count = zext nneg i32 %N to i64 + br label %for.body + +for.cond.cleanup: + ret void + +for.body: + %indvars.iv = phi i64 [ 0, %for.body.preheader ], [ %indvars.iv.next, %for.body ] + %arrayidx = getelementptr inbounds double, ptr %in, i64 %indvars.iv + %0 = load double, ptr %arrayidx, align 8 + %add.ptr = getelementptr inbounds double, ptr %out2, i64 %indvars.iv + %call = tail call double @modf(double noundef %0, ptr noundef %add.ptr) + %arrayidx2 = getelementptr inbounds double, ptr %out1, i64 %indvars.iv + store double %call, ptr %arrayidx2, align 8 + %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1 + %exitcond.not = icmp eq i64 %indvars.iv.next, %wide.trip.count + br i1 %exitcond.not, label %for.cond.cleanup, label %for.body +} + +declare double @modf(double , ptr ) #1 + +define void @modf_f32(ptr %in, ptr %out1, ptr %out2, i32 %N) { +; CHECK-LABEL: define void @modf_f32( +; CHECK-SAME: ptr [[IN:%.*]], ptr [[OUT1:%.*]], ptr [[OUT2:%.*]], i32 [[N:%.*]]) #[[ATTR0]] { +; CHECK: [[TMP27:%.*]] = call @armpl_svmodf_f32_x( [[WIDE_MASKED_LOAD:%.*]], ptr [[TMP26:%.*]], [[ACTIVE_LANE_MASK:%.*]]) +; CHECK: [[CALL:%.*]] = tail call float @modff(float noundef [[TMP32:%.*]], ptr noundef [[ADD_PTR:%.*]]) #[[ATTR6:[0-9]+]] +; +entry: + %cmp7 = icmp sgt i32 %N, 0 + br i1 %cmp7, label %for.body.preheader, label %for.cond.cleanup + +for.body.preheader: + %wide.trip.count = zext nneg i32 %N to i64 + br label %for.body + +for.cond.cleanup: + ret void + +for.body: + %indvars.iv = phi i64 [ 0, %for.body.preheader ], [ %indvars.iv.next, %for.body ] + %arrayidx = getelementptr inbounds float, ptr %in, i64 %indvars.iv + %0 = load float, ptr %arrayidx, align 4 + %add.ptr = getelementptr inbounds float, ptr %out2, i64 %indvars.iv + %call = tail call float @modff(float noundef %0, ptr noundef %add.ptr) + %arrayidx2 = getelementptr inbounds float, ptr %out1, i64 %indvars.iv + store float %call, ptr %arrayidx2, align 4 + %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1 + %exitcond.not = icmp eq i64 %indvars.iv.next, %wide.trip.count + br i1 %exitcond.not, label %for.cond.cleanup, label %for.body +} + +declare float @modff(float noundef, ptr nocapture noundef) #1 + +attributes #1 = { memory(argmem: write) } From f684acdf111ec66ac01869d3844d1fb1dd22f9f6 Mon Sep 17 00:00:00 2001 From: Paschalis Mpeis Date: Tue, 30 Apr 2024 15:31:18 +0100 Subject: [PATCH 7/8] Addressing reviewers (2) --- llvm/lib/Analysis/LoopAccessAnalysis.cpp | 6 +++--- .../LoopAccessAnalysis/attr-mem-write-only.ll | 11 +++++------ .../AArch64/veclib-function-calls-linear-ptrs.ll | 4 +++- 3 files changed, 11 insertions(+), 10 deletions(-) diff --git a/llvm/lib/Analysis/LoopAccessAnalysis.cpp b/llvm/lib/Analysis/LoopAccessAnalysis.cpp index 27859d8009886..ebafd126d6cbb 100644 --- a/llvm/lib/Analysis/LoopAccessAnalysis.cpp +++ b/llvm/lib/Analysis/LoopAccessAnalysis.cpp @@ -2496,9 +2496,9 @@ void LoopAccessInfo::analyzeLoop(AAResults *AA, LoopInfo *LI, // We can safety handle math functions that have vectorized // counterparts and have the memory write-only attribute set. if (isMathLibCallMemWriteOnly(TLI, I)) { - LLVM_DEBUG(dbgs() - << "LAA: allow math function with write-only attribute:" - << I << "\n"); + LLVM_DEBUG(dbgs() << "LAA: Allow to vectorize math function with " + "write-only attribute:" + << I << "\n"); continue; } diff --git a/llvm/test/Analysis/LoopAccessAnalysis/attr-mem-write-only.ll b/llvm/test/Analysis/LoopAccessAnalysis/attr-mem-write-only.ll index aca4e4ad38921..8a2e95239b953 100644 --- a/llvm/test/Analysis/LoopAccessAnalysis/attr-mem-write-only.ll +++ b/llvm/test/Analysis/LoopAccessAnalysis/attr-mem-write-only.ll @@ -1,12 +1,10 @@ -; RUN: opt < %s -mattr=+sve -vector-library=ArmPL -passes=inject-tli-mappings,loop-vectorize -debug-only=loop-accesses -disable-output 2>&1 | FileCheck %s +; RUN: opt < %s -passes='print' -debug-only=loop-accesses -disable-output 2>&1 | FileCheck %s ; REQUIRES: asserts -target triple = "aarch64-unknown-linux-gnu" - -; TODO: add mappings for frexp/frexpf define void @frexp_f64(ptr %in, ptr %out1, ptr %out2, i32 %N) { +; CHECK: LAA: Allow to vectorize math function with write-only attribute: %call = tail call double @frexp entry: %cmp4 = icmp sgt i32 %N, 0 br i1 %cmp4, label %for.body.preheader, label %for.cond.cleanup @@ -33,6 +31,7 @@ for.body: declare double @frexp(double, ptr) #1 define void @frexp_f32(ptr readonly %in, ptr %out1, ptr %out2, i32 %N) { +; CHECK: LAA: Allow to vectorize math function with write-only attribute: %call = tail call float @frexpf entry: %cmp4 = icmp sgt i32 %N, 0 br i1 %cmp4, label %for.body.preheader, label %for.cond.cleanup @@ -59,7 +58,7 @@ for.body: declare float @frexpf(float , ptr) #1 define void @modf_f64(ptr %in, ptr %out1, ptr %out2, i32 %N) { -; CHECK: LAA: allow math function with write-only attribute: %call = tail call double @modf +; CHECK: LAA: Allow to vectorize math function with write-only attribute: %call = tail call double @modf entry: %cmp7 = icmp sgt i32 %N, 0 br i1 %cmp7, label %for.body.preheader, label %for.cond.cleanup @@ -87,7 +86,7 @@ for.body: declare double @modf(double , ptr ) #1 define void @modf_f32(ptr %in, ptr %out1, ptr %out2, i32 %N) { -; CHECK: LAA: allow math function with write-only attribute: %call = tail call float @modff +; CHECK: LAA: Allow to vectorize math function with write-only attribute: %call = tail call float @modff entry: %cmp7 = icmp sgt i32 %N, 0 br i1 %cmp7, label %for.body.preheader, label %for.cond.cleanup diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/veclib-function-calls-linear-ptrs.ll b/llvm/test/Transforms/LoopVectorize/AArch64/veclib-function-calls-linear-ptrs.ll index 0a502f52de9cc..f513360cf670a 100644 --- a/llvm/test/Transforms/LoopVectorize/AArch64/veclib-function-calls-linear-ptrs.ll +++ b/llvm/test/Transforms/LoopVectorize/AArch64/veclib-function-calls-linear-ptrs.ll @@ -3,7 +3,9 @@ target triple = "aarch64-unknown-linux-gnu" -; TODO: add mappings for frexp/frexpf +; Vectorization can not happen because there is no scalar to vector mapping in +; TLI for frexp/frexpf. Tests will need to be changed when such mappings are +; added. define void @frexp_f64(ptr %in, ptr %out1, ptr %out2, i32 %N) { ; CHECK-LABEL: define void @frexp_f64( From 03fd4ea15f4ef94f9dba88a432428a690a4dd8a3 Mon Sep 17 00:00:00 2001 From: Paschalis Mpeis Date: Thu, 9 May 2024 13:15:50 +0100 Subject: [PATCH 8/8] Addressing reviewers (3): tests now in veclib-function-calls.ll Rebased history to introduce tests in 'veclib-function-calls.ll' and delete the (now unnecessary) test veclib-function-calls-linear-ptrs.ll. The commit history were modified as follows: - The initial commit (that showcases what was missing) was amended to add the tests in veclib-function-calls.ll. - Then, subsequent commits were similarly amended to include the updates that allow vectorization. - This current commit simply dropped the no longer needed tests (veclib-function-calls-linear-ptrs.ll) --- .../veclib-function-calls-linear-ptrs.ll | 134 ------------------ 1 file changed, 134 deletions(-) delete mode 100644 llvm/test/Transforms/LoopVectorize/AArch64/veclib-function-calls-linear-ptrs.ll diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/veclib-function-calls-linear-ptrs.ll b/llvm/test/Transforms/LoopVectorize/AArch64/veclib-function-calls-linear-ptrs.ll deleted file mode 100644 index f513360cf670a..0000000000000 --- a/llvm/test/Transforms/LoopVectorize/AArch64/veclib-function-calls-linear-ptrs.ll +++ /dev/null @@ -1,134 +0,0 @@ -; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --filter "call.*(frexp|modf)" --version 4 -; RUN: opt < %s -mattr=+sve -vector-library=ArmPL -passes=inject-tli-mappings,loop-vectorize -force-vector-interleave=1 -prefer-predicate-over-epilogue=predicate-dont-vectorize -S | FileCheck %s - -target triple = "aarch64-unknown-linux-gnu" - -; Vectorization can not happen because there is no scalar to vector mapping in -; TLI for frexp/frexpf. Tests will need to be changed when such mappings are -; added. - -define void @frexp_f64(ptr %in, ptr %out1, ptr %out2, i32 %N) { -; CHECK-LABEL: define void @frexp_f64( -; CHECK-SAME: ptr [[IN:%.*]], ptr [[OUT1:%.*]], ptr [[OUT2:%.*]], i32 [[N:%.*]]) #[[ATTR0:[0-9]+]] { -; CHECK: [[CALL:%.*]] = tail call double @frexp(double noundef [[TMP0:%.*]], ptr noundef [[ADD_PTR:%.*]]) -; -entry: - %cmp4 = icmp sgt i32 %N, 0 - br i1 %cmp4, label %for.body.preheader, label %for.cond.cleanup - -for.body.preheader: - %wide.trip.count = zext nneg i32 %N to i64 - br label %for.body - -for.cond.cleanup: - ret void - -for.body: - %indvars.iv = phi i64 [ 0, %for.body.preheader ], [ %indvars.iv.next, %for.body ] - %arrayidx = getelementptr inbounds double, ptr %in, i64 %indvars.iv - %0 = load double, ptr %arrayidx, align 8 - %add.ptr = getelementptr inbounds i32, ptr %out2, i64 %indvars.iv - %call = tail call double @frexp(double noundef %0, ptr noundef %add.ptr) - store double %call, ptr %out1, align 8 - %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1 - %exitcond.not = icmp eq i64 %indvars.iv.next, %wide.trip.count - br i1 %exitcond.not, label %for.cond.cleanup, label %for.body -} - -declare double @frexp(double, ptr) #1 - -define void @frexp_f32(ptr readonly %in, ptr %out1, ptr %out2, i32 %N) { -; CHECK-LABEL: define void @frexp_f32( -; CHECK-SAME: ptr readonly [[IN:%.*]], ptr [[OUT1:%.*]], ptr [[OUT2:%.*]], i32 [[N:%.*]]) #[[ATTR0]] { -; CHECK: [[CALL:%.*]] = tail call float @frexpf(float noundef [[TMP0:%.*]], ptr noundef [[ADD_PTR:%.*]]) -; -entry: - %cmp4 = icmp sgt i32 %N, 0 - br i1 %cmp4, label %for.body.preheader, label %for.cond.cleanup - -for.body.preheader: - %wide.trip.count = zext nneg i32 %N to i64 - br label %for.body - -for.cond.cleanup: - ret void - -for.body: - %indvars.iv = phi i64 [ 0, %for.body.preheader ], [ %indvars.iv.next, %for.body ] - %arrayidx = getelementptr inbounds float, ptr %in, i64 %indvars.iv - %0 = load float, ptr %arrayidx, align 4 - %add.ptr = getelementptr inbounds i32, ptr %out2, i64 %indvars.iv - %call = tail call float @frexpf(float noundef %0, ptr noundef %add.ptr) - store float %call, ptr %out1, align 4 - %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1 - %exitcond.not = icmp eq i64 %indvars.iv.next, %wide.trip.count - br i1 %exitcond.not, label %for.cond.cleanup, label %for.body -} - -declare float @frexpf(float , ptr) #1 - -define void @modf_f64(ptr %in, ptr %out1, ptr %out2, i32 %N) { -; CHECK-LABEL: define void @modf_f64( -; CHECK-SAME: ptr [[IN:%.*]], ptr [[OUT1:%.*]], ptr [[OUT2:%.*]], i32 [[N:%.*]]) #[[ATTR0]] { -; CHECK: [[TMP27:%.*]] = call @armpl_svmodf_f64_x( [[WIDE_MASKED_LOAD:%.*]], ptr [[TMP26:%.*]], [[ACTIVE_LANE_MASK:%.*]]) -; CHECK: [[CALL:%.*]] = tail call double @modf(double noundef [[TMP32:%.*]], ptr noundef [[ADD_PTR:%.*]]) #[[ATTR5:[0-9]+]] -; -entry: - %cmp7 = icmp sgt i32 %N, 0 - br i1 %cmp7, label %for.body.preheader, label %for.cond.cleanup - -for.body.preheader: - %wide.trip.count = zext nneg i32 %N to i64 - br label %for.body - -for.cond.cleanup: - ret void - -for.body: - %indvars.iv = phi i64 [ 0, %for.body.preheader ], [ %indvars.iv.next, %for.body ] - %arrayidx = getelementptr inbounds double, ptr %in, i64 %indvars.iv - %0 = load double, ptr %arrayidx, align 8 - %add.ptr = getelementptr inbounds double, ptr %out2, i64 %indvars.iv - %call = tail call double @modf(double noundef %0, ptr noundef %add.ptr) - %arrayidx2 = getelementptr inbounds double, ptr %out1, i64 %indvars.iv - store double %call, ptr %arrayidx2, align 8 - %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1 - %exitcond.not = icmp eq i64 %indvars.iv.next, %wide.trip.count - br i1 %exitcond.not, label %for.cond.cleanup, label %for.body -} - -declare double @modf(double , ptr ) #1 - -define void @modf_f32(ptr %in, ptr %out1, ptr %out2, i32 %N) { -; CHECK-LABEL: define void @modf_f32( -; CHECK-SAME: ptr [[IN:%.*]], ptr [[OUT1:%.*]], ptr [[OUT2:%.*]], i32 [[N:%.*]]) #[[ATTR0]] { -; CHECK: [[TMP27:%.*]] = call @armpl_svmodf_f32_x( [[WIDE_MASKED_LOAD:%.*]], ptr [[TMP26:%.*]], [[ACTIVE_LANE_MASK:%.*]]) -; CHECK: [[CALL:%.*]] = tail call float @modff(float noundef [[TMP32:%.*]], ptr noundef [[ADD_PTR:%.*]]) #[[ATTR6:[0-9]+]] -; -entry: - %cmp7 = icmp sgt i32 %N, 0 - br i1 %cmp7, label %for.body.preheader, label %for.cond.cleanup - -for.body.preheader: - %wide.trip.count = zext nneg i32 %N to i64 - br label %for.body - -for.cond.cleanup: - ret void - -for.body: - %indvars.iv = phi i64 [ 0, %for.body.preheader ], [ %indvars.iv.next, %for.body ] - %arrayidx = getelementptr inbounds float, ptr %in, i64 %indvars.iv - %0 = load float, ptr %arrayidx, align 4 - %add.ptr = getelementptr inbounds float, ptr %out2, i64 %indvars.iv - %call = tail call float @modff(float noundef %0, ptr noundef %add.ptr) - %arrayidx2 = getelementptr inbounds float, ptr %out1, i64 %indvars.iv - store float %call, ptr %arrayidx2, align 4 - %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1 - %exitcond.not = icmp eq i64 %indvars.iv.next, %wide.trip.count - br i1 %exitcond.not, label %for.cond.cleanup, label %for.body -} - -declare float @modff(float noundef, ptr nocapture noundef) #1 - -attributes #1 = { memory(argmem: write) }