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[AArch64] Fix a corner case with large stack allocation #122038

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Merged
merged 3 commits into from
Jan 19, 2025
Merged

[AArch64] Fix a corner case with large stack allocation #122038

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386066b
[AArch64] Fix a corner case with large stack allocation
ssijaric-nv Dec 19, 2024
80cc1e5
Remove the errant comment line
ssijaric-nv Jan 12, 2025
929b5ab
Clean up the test case
ssijaric-nv Jan 15, 2025
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4 changes: 1 addition & 3 deletions llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -1195,10 +1195,9 @@ bool AArch64FrameLowering::shouldCombineCSRLocalStackBump(
}

bool AArch64FrameLowering::shouldCombineCSRLocalStackBumpInEpilogue(
MachineBasicBlock &MBB, unsigned StackBumpBytes) const {
MachineBasicBlock &MBB, uint64_t StackBumpBytes) const {
if (!shouldCombineCSRLocalStackBump(*MBB.getParent(), StackBumpBytes))
return false;

if (MBB.empty())
return true;

Expand Down Expand Up @@ -2363,7 +2362,6 @@ void AArch64FrameLowering::emitEpilogue(MachineFunction &MF,
}
bool CombineSPBump = shouldCombineCSRLocalStackBumpInEpilogue(MBB, NumBytes);
// Assume we can't combine the last pop with the sp restore.

bool CombineAfterCSRBump = false;
if (!CombineSPBump && PrologueSaveSize != 0) {
MachineBasicBlock::iterator Pop = std::prev(MBB.getFirstTerminator());
Expand Down
2 changes: 1 addition & 1 deletion llvm/lib/Target/AArch64/AArch64FrameLowering.h
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Expand Up @@ -146,7 +146,7 @@ class AArch64FrameLowering : public TargetFrameLowering {
int &MinCSFrameIndex,
int &MaxCSFrameIndex) const;
bool shouldCombineCSRLocalStackBumpInEpilogue(MachineBasicBlock &MBB,
unsigned StackBumpBytes) const;
uint64_t StackBumpBytes) const;
void emitCalleeSavedGPRLocations(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MBBI) const;
void emitCalleeSavedSVELocations(MachineBasicBlock &MBB,
Expand Down
46 changes: 46 additions & 0 deletions llvm/test/CodeGen/AArch64/aarch64-large-stack-spbump.mir
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@@ -0,0 +1,46 @@
# RUN: llc -mtriple=aarch64 -run-pass=prologepilog %s -o - | FileCheck %s
--- |
define i32 @_Z4funcv() {
entry:
%array = alloca [1073741824 x i32], align 4
%arrayidx = getelementptr inbounds [1073741824 x i32], ptr %array, i64 0, i64 20
store i32 7, ptr %arrayidx, align 4
call void @_Z5func2v()
%arrayidx1 = getelementptr inbounds [1073741824 x i32], ptr %array, i64 0, i64 20
%0 = load i32, ptr %arrayidx1, align 4
ret i32 %0
}

declare void @_Z5func2v()
...
---
name: _Z4funcv
alignment: 4
legalized: true
regBankSelected: true
selected: true
tracksRegLiveness: true
noPhis: true
isSSA: false
noVRegs: true
hasFakeUses: false
frameInfo:
maxAlignment: 4
adjustsStack: true
hasCalls: true
maxCallFrameSize: 0
stack:
- { id: 0, name: array, size: 4294967296, alignment: 4, local-offset: -4294967296 }
machineFunctionInfo: {}
body: |
bb.1.entry:
renamable $w8 = MOVi32imm 7
STRWui killed renamable $w8, %stack.0.array, 20 :: (store (s32) into %ir.arrayidx)
ADJCALLSTACKDOWN 0, 0, implicit-def $sp, implicit $sp
BL @_Z5func2v, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp
ADJCALLSTACKUP 0, 0, implicit-def $sp, implicit $sp
renamable $w0 = LDRWui %stack.0.array, 20 :: (dereferenceable load (s32) from %ir.arrayidx1)
; CHECK: early-clobber $sp, $fp, $lr = frame-destroy LDPXpost $sp, 2
RET_ReallyLR implicit killed $w0

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