Address Review Feedback; Add Tests

Author: lenary

llvm/test/MC/RISCV/rv64c-invalid.s

@@ -13,17 +13,25 @@ c.ldsp  zero, 4(sp) # CHECK: :[[@LINE]]:9: error: register must be a GPR excludi
 
 # Out of range immediates
 
+reldef:
+.global undef
+
 ## uimmlog2xlennonzero
 c.slli t0, 64 # CHECK: :[[@LINE]]:12: error: immediate must be an integer in the range [1, 63]
 c.srli a0, -1 # CHECK: :[[@LINE]]:12: error: immediate must be an integer in the range [1, 63]
 c.srai a0, 0  # CHECK: :[[@LINE]]:12: error: immediate must be an integer in the range [1, 63]
+c.slli t0, reldef # CHECK: :[[@LINE]]:12: error: immediate must be an integer in the range [1, 63]
+c.srli a0, reldef-. # CHECK: :[[@LINE]]:12: error: immediate must be an integer in the range [1, 63]
+c.srai a0, undef  # CHECK: :[[@LINE]]:12: error: immediate must be an integer in the range [1, 63]
 
 ## simm6
 c.addiw t0, -33 # CHECK: :[[@LINE]]:13: error: immediate must be an integer in the range [-32, 31]
 c.addiw t0, 32 # CHECK: :[[@LINE]]:13: error: immediate must be an integer in the range [-32, 31]
-c.addiw t0, foo # CHECK: :[[@LINE]]:13: error: immediate must be an integer in the range [-32, 31]
 c.addiw t0, %lo(foo) # CHECK: :[[@LINE]]:13: error: immediate must be an integer in the range [-32, 31]
 c.addiw t0, %hi(foo) # CHECK: :[[@LINE]]:13: error: immediate must be an integer in the range [-32, 31]
+c.addiw t0, reldef # CHECK: :[[@LINE]]:13: error: immediate must be an integer in the range [-32, 31]
+c.addiw t0, reldef-. # CHECK: :[[@LINE]]:13: error: immediate must be an integer in the range [-32, 31]
+c.addiw t0, undef # CHECK: :[[@LINE]]:13: error: immediate must be an integer in the range [-32, 31]
 
 ## uimm9_lsb000
 c.ldsp  ra, 512(sp) # CHECK: :[[@LINE]]:13: error: immediate must be a multiple of 8 bytes in the range [0, 504]

llvm/test/MC/RISCV/rv64c-valid.s

@@ -72,3 +72,10 @@ c.srli a3, 63
 # CHECK-ASM: encoding: [0x7d,0x96]
 # CHECK-NO-EXT:  error: instruction requires the following: 'C' (Compressed Instructions) or 'Zca' (part of the C extension, excluding compressed floating point loads/stores){{$}}
 c.srai a2, 63
+
+.set absdef, 1
+
+# CHECK-ASM-AND-OBJ: c.addiw a0, 1
+# CHECK-ASM: encoding: [0x05,0x25]
+# CHECK-NO-EXT:  error: instruction requires the following: 'C' (Compressed Instructions) or 'Zca' (part of the C extension, excluding compressed floating point loads/stores){{$}}
+c.addiw a0, absdef

llvm/test/MC/RISCV/rvc-invalid.s

@@ -0,0 +1,18 @@
+# RUN: not llvm-mc %s -triple=riscv32 2>&1 | FileCheck %s
+# RUN: not llvm-mc %s -triple=riscv64 2>&1 | FileCheck %s
+
+reldef:
+
+.global undef
+
+c.addi a0, reldef   # CHECK: :[[@LINE]]:12: error: invalid operand for instruction
+c.addi a0, reldef-. # CHECK: :[[@LINE]]:12: error: invalid operand for instruction
+c.addi a0, undef    # CHECK: :[[@LINE]]:12: error: invalid operand for instruction
+
+c.li a0, reldef   # CHECK: :[[@LINE]]:10: error: invalid operand for instruction
+c.li a0, reldef-. # CHECK: :[[@LINE]]:10: error: invalid operand for instruction
+c.li a0, undef    # CHECK: :[[@LINE]]:10: error: invalid operand for instruction
+
+c.andi a0, reldef   # CHECK: :[[@LINE]]:12: error: invalid operand for instruction
+c.andi a0, reldef-. # CHECK: :[[@LINE]]:12: error: invalid operand for instruction
+c.andi a0, undef    # CHECK: :[[@LINE]]:12: error: invalid operand for instruction

llvm/test/MC/RISCV/rvc-valid.s

@@ -175,3 +175,21 @@ c.lui s0, 0xfffff
 # CHECK-ASM: encoding: [0x00,0x00]
 # CHECK-NO-EXT:  error: instruction requires the following: 'C' (Compressed Instructions) or 'Zca' (part of the C extension, excluding compressed floating point loads/stores){{$}}
 c.unimp
+
+.set absdef, 1
+
+c.addi a0, absdef
+# CHECK-ASM-AND-OBJ: c.addi a0, 1
+# CHECK-ASM: encoding: [0x05,0x05]
+# CHECK-NO-EXT:  error: instruction requires the following: 'C' (Compressed Instructions) or 'Zca' (part of the C extension, excluding compressed floating point loads/stores){{$}}
+
+c.li a0, absdef
+# CHECK-ASM-AND-OBJ: c.li a0, 1
+# CHECK-ASM: encoding: [0x05,0x45]
+# CHECK-NO-EXT:  error: instruction requires the following: 'C' (Compressed Instructions) or 'Zca' (part of the C extension, excluding compressed floating point loads/stores){{$}}
+
+c.andi a0, absdef
+# CHECK-ASM-AND-OBJ: c.andi a0, 1
+# CHECK-ASM: encoding: [0x05,0x89]
+# CHECK-NO-EXT:  error: instruction requires the following: 'C' (Compressed Instructions) or 'Zca' (part of the C extension, excluding compressed floating point loads/stores){{$}}
+

llvm/test/MC/RISCV/xqcibi-relocations.s

@@ -84,11 +84,8 @@ qc.bnei t3, 14, same_section
 # OBJ-NEXT: qc.e.bgeui s2, 0x18, 0x28 <same_section>
 qc.e.bgeui s2, 24, same_section
 
-.option norelax
-
 ## Enable compression/relaxation to check how symbols are handled.
 .option noexact
-.option relax
 
 # ASM: qc.bnei t1, 10, undef
 # OBJ: qc.beqi t1, 0xa, 0x42 <same_section_extern+0x16>

llvm/test/MC/RISCV/xqcilb-relocations.s

@@ -92,11 +92,8 @@ qc.e.j same_section
 # OBJ-NEXT: R_RISCV_RELAX
 qc.e.jal same_section
 
-.option norelax
-
 ## Enable compression/relaxation to check how symbols are handled.
 .option noexact
-.option relax
 
 qc.e.j undef
 # ASM: j undef