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[PowerPC] Support -fpatchable-function-entry on PPC64LE
This patch enables `-fpatchable-function-entry` on PPC64 little-endian Linux. It is mutually exclusive with existing XRay instrumentation on this target.
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-9
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7 files changed

+62
-9
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clang/include/clang/Basic/Attr.td

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -954,7 +954,7 @@ def PatchableFunctionEntry
954954
: InheritableAttr,
955955
TargetSpecificAttr<TargetArch<
956956
["aarch64", "aarch64_be", "loongarch32", "loongarch64", "riscv32",
957-
"riscv64", "x86", "x86_64", "ppc", "ppc64"]>> {
957+
"riscv64", "x86", "x86_64", "ppc", "ppc64", "ppc64le"]>> {
958958
let Spellings = [GCC<"patchable_function_entry">];
959959
let Subjects = SubjectList<[Function, ObjCMethod]>;
960960
let Args = [UnsignedArgument<"Count">, DefaultIntArgument<"Offset", 0>,

clang/include/clang/Basic/AttrDocs.td

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -6567,7 +6567,7 @@ if omitted.``Section`` defaults to the ``-fpatchable-function-entry`` section n
65676567
set, or to ``__patchable_function_entries`` otherwise.
65686568

65696569
This attribute is only supported on
6570-
aarch64/aarch64-be/loongarch32/loongarch64/riscv32/riscv64/i386/x86-64/ppc/ppc64 targets.
6570+
aarch64/aarch64-be/loongarch32/loongarch64/riscv32/riscv64/i386/x86-64/ppc/ppc64/ppc64le targets.
65716571
For ppc/ppc64 targets, AIX is still not supported.
65726572
}];
65736573
}

clang/lib/Driver/ToolChains/Clang.cpp

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -6744,7 +6744,8 @@ void Clang::ConstructJob(Compilation &C, const JobAction &JA,
67446744
if (!Triple.isAArch64() && !Triple.isLoongArch() && !Triple.isRISCV() &&
67456745
!Triple.isX86() &&
67466746
!(!Triple.isOSAIX() && (Triple.getArch() == llvm::Triple::ppc ||
6747-
Triple.getArch() == llvm::Triple::ppc64)))
6747+
Triple.getArch() == llvm::Triple::ppc64 ||
6748+
Triple.getArch() == llvm::Triple::ppc64le)))
67486749
D.Diag(diag::err_drv_unsupported_opt_for_target)
67496750
<< A->getAsString(Args) << TripleStr;
67506751
else if (S.consumeInteger(10, Size) ||

clang/test/Driver/fpatchable-function-entry.c

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -8,6 +8,7 @@
88
// RUN: %clang --target=riscv64 %s -fpatchable-function-entry=1,0 -c -### 2>&1 | FileCheck %s
99
// RUN: %clang --target=powerpc-unknown-linux-gnu %s -fpatchable-function-entry=1,0 -c -### 2>&1 | FileCheck %s
1010
// RUN: %clang --target=powerpc64-unknown-linux-gnu %s -fpatchable-function-entry=1,0 -c -### 2>&1 | FileCheck %s
11+
// RUN: %clang --target=powerpc64le-unknown-linux-gnu %s -fpatchable-function-entry=1,0 -c -### 2>&1 | FileCheck %s
1112
// CHECK: "-fpatchable-function-entry=1"
1213

1314
// RUN: %clang --target=aarch64 -fsyntax-only %s -fpatchable-function-entry=1,1 -c -### 2>&1 | FileCheck --check-prefix=11 %s

clang/test/Sema/patchable-function-entry-attr.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -8,7 +8,7 @@
88
// RUN: %clang_cc1 -triple riscv64 -fsyntax-only -verify=silence %s
99
// RUN: %clang_cc1 -triple powerpc-unknown-linux-gnu -fsyntax-only -verify=silence %s
1010
// RUN: %clang_cc1 -triple powerpc64-unknown-linux-gnu -fsyntax-only -verify=silence %s
11-
// RUN: %clang_cc1 -triple ppc64le -fsyntax-only -verify %s
11+
// RUN: %clang_cc1 -triple ppc64le -fsyntax-only -verify=silence %s
1212
// RUN: %clang_cc1 -triple powerpc64-ibm-aix-xcoff -fsyntax-only -verify=AIX %s
1313
// RUN: %clang_cc1 -triple powerpc-ibm-aix-xcoff -fsyntax-only -verify=AIX %s
1414

llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp

Lines changed: 7 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -920,10 +920,6 @@ void PPCAsmPrinter::emitInstruction(const MachineInstr *MI) {
920920
case TargetOpcode::PATCHABLE_FUNCTION_ENTER: {
921921
assert(!Subtarget->isAIXABI() &&
922922
"AIX does not support patchable function entry!");
923-
// PATCHABLE_FUNCTION_ENTER on little endian is for XRAY support which is
924-
// handled in PPCLinuxAsmPrinter.
925-
if (MAI->isLittleEndian())
926-
return;
927923
const Function &F = MF->getFunction();
928924
unsigned Num = 0;
929925
(void)F.getFnAttribute("patchable-function-entry")
@@ -1789,7 +1785,13 @@ void PPCLinuxAsmPrinter::emitInstruction(const MachineInstr *MI) {
17891785
// Update compiler-rt/lib/xray/xray_powerpc64.cc accordingly when number
17901786
// of instructions change.
17911787
// XRAY is only supported on PPC Linux little endian.
1792-
if (!MAI->isLittleEndian())
1788+
const Function &F = MF->getFunction();
1789+
unsigned Num = 0;
1790+
(void)F.getFnAttribute("patchable-function-entry")
1791+
.getValueAsString()
1792+
.getAsInteger(10, Num);
1793+
1794+
if (!MAI->isLittleEndian() || Num)
17931795
break;
17941796
MCSymbol *BeginOfSled = OutContext.createTempSymbol();
17951797
MCSymbol *EndOfSled = OutContext.createTempSymbol();

llvm/test/CodeGen/PowerPC/patchable-function-entry.ll

Lines changed: 49 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,6 @@
11
; RUN: llc -mtriple=powerpc %s -o - | FileCheck %s --check-prefixes=CHECK,PPC32
22
; RUN: llc -mtriple=powerpc64 %s -o - | FileCheck %s --check-prefixes=CHECK,PPC64
3+
; RUN: llc -mtriple=powerpc64le %s -o - | FileCheck %s --check-prefix=PPC64LE
34

45
@a = global i32 0, align 4
56

@@ -9,6 +10,12 @@ define void @f0() {
910
; CHECK: # %bb.0:
1011
; CHECK-NEXT: blr
1112
; CHECK-NOT: .section __patchable_function_entries
13+
;
14+
; PPC64LE-LABEL: f0:
15+
; PPC64LE-NOT: nop
16+
; PPC64LE: # %bb.0:
17+
; PPC64LE-NEXT: blr
18+
; PPC64LE-NOT: .section __patchable_function_entries
1219
ret void
1320
}
1421

@@ -18,6 +25,22 @@ define void @f1() "patchable-function-entry"="0" {
1825
; CHECK: # %bb.0:
1926
; CHECK-NEXT: blr
2027
; CHECK-NOT: .section __patchable_function_entries
28+
;
29+
; PPC64LE-LABEL: f1:
30+
; PPC64LE: # %bb.0:
31+
; PPC64LE-NEXT: .Ltmp0:
32+
; PPC64LE-NEXT: b .Ltmp1
33+
; PPC64LE-NEXT: nop
34+
; PPC64LE-NEXT: std 0, -8(1)
35+
; PPC64LE-NEXT: mflr 0
36+
; PPC64LE-NEXT: bl __xray_FunctionEntry
37+
; PPC64LE-NEXT: nop
38+
; PPC64LE-NEXT: mtlr 0
39+
; PPC64LE-NEXT: .Ltmp1:
40+
; PPC64LE-NEXT: blr
41+
; PPC64LE-NOT: .section __patchable_function_entries
42+
; PPC64LE: .section xray_instr_map
43+
; PPC64LE: .section xray_fn_idx
2144
ret void
2245
}
2346

@@ -32,6 +55,17 @@ define void @f2() "patchable-function-entry"="1" {
3255
; PPC64: .p2align 3, 0x0
3356
; PPC32-NEXT: .long .Lfunc_begin2
3457
; PPC64-NEXT: .quad .Lfunc_begin2
58+
;
59+
; PPC64LE-LABEL: f2:
60+
; PPC64LE-LABEL-NEXT: .Lfunc_begin2:
61+
; PPC64LE: # %bb.0:
62+
; PPC64LE-NEXT: nop
63+
; PPC64LE-NEXT: blr
64+
; PPC64LE: .section __patchable_function_entries
65+
; PPC64LE: .p2align 3, 0x0
66+
; PPC64LE-NEXT: .quad .Lfunc_begin2
67+
; PPC64LE-NOT: .section xray_instr_map
68+
; PPC64LE-NOT: .section xray_fn_idx
3569
ret void
3670
}
3771

@@ -52,6 +86,21 @@ define i32 @f3() "patchable-function-entry"="1" "patchable-function-prefix"="2"
5286
; PPC64: .p2align 3, 0x0
5387
; PPC32-NEXT: .long .Ltmp0
5488
; PPC64-NEXT: .quad .Ltmp0
89+
;
90+
; PC64LE-LABEL: .Ltmp3:
91+
; PC64LE-COUNT-2: nop
92+
; PC64LE-LABEL: f3:
93+
; PC64LE: # %bb.0:
94+
; PC64LE-NEXT: nop
95+
; PC64LE: addis 3, 2, .LC0@toc@ha
96+
; PC64LE-NEXT: ld 3, .LC0@toc@l(3)
97+
; PC64LE-NEXT: lwz 3, 0(3)
98+
; PC64LE: blr
99+
; PC64LE: .section __patchable_function_entries
100+
; PPC64LE: .p2align 3, 0x0
101+
; PPC64LE-NEXT: .quad .Ltmp3
102+
; PC64LE-NOT: .section xray_instr_map
103+
; PC64LE-NOT: .section xray_fn_idx
55104
entry:
56105
%0 = load i32, ptr @a, align 4
57106
ret i32 %0

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