[AIG] Extend longest path analysis to support Comb/HW dialects and enable timing-aware DatapathToComb optimization

This commit enhances the AIG longest path analysis infrastructure to support operations from the Comb and HW dialects, enabling comprehensive timing analysis across mixed-dialect circuits. The DatapathToComb pass has been updated to use timing-aware optimization strategies through the incremental longest path analysis framework.

The longest path analysis now handles comb.and, comb.or, comb.xor, and hw.constant operations alongside existing AIG operations, providing more accurate delay calculations for circuits that haven't been fully lowered to AIG. An Oracle class has been introduced to dynamically analyze unsupported operations by creating temporary modules and running synthesis pipelines to extract timing characteristics.

The DatapathToComb pass integrates IncrementalLongestPathAnalysis as a listener in its greedy rewrite driver, enabling timing-aware transformations. The compressor lowering logic now sorts addends by arrival time to minimize critical path delays during Wallace tree construction. Configuration options for timing-aware datapath optimizations have been added to the synthesis pipeline.

Test coverage has been expanded to verify longest path analysis behavior with mixed dialects and ensure proper timing optimization during datapath-to-combinational lowering. This enables more sophisticated timing optimization strategies throughout the CIRCT synthesis pipeline by providing accurate delay information across

Author: uenoku

include/circt/Conversion/Passes.td

@@ -885,7 +885,9 @@ def ConvertDatapathToComb : Pass<"convert-datapath-to-comb"> {
     Option<"lowerCompressToAdd", "lower-compress-to-add", "bool", "false",
            "Lower compress operators to variadic add.">,
     Option<"forceBooth", "lower-partial-product-to-booth", "bool", "false",
-           "Force all partial products to be lowered to Booth arrays.">
+           "Force all partial products to be lowered to Booth arrays.">,
+    Option<"timingAware", "timing-aware", "bool", "false",
+           "Lower operators in a timing-aware fashion.">
   ];
 }
 

include/circt/Dialect/AIG/Analysis/LongestPathAnalysis.h

@@ -17,12 +17,15 @@
 #ifndef CIRCT_ANALYSIS_AIG_ANALYSIS_H
 #define CIRCT_ANALYSIS_AIG_ANALYSIS_H
 
+#include "circt/Conversion/CombToAIG.h"
 #include "circt/Dialect/HW/HWOps.h"
+#include "circt/Dialect/HW/HWPasses.h"
 #include "circt/Support/InstanceGraph.h"
 #include "circt/Support/LLVM.h"
 #include "mlir/IR/BuiltinOps.h"
 #include "mlir/IR/MLIRContext.h"
 #include "mlir/IR/Operation.h"
+#include "mlir/Transforms/Passes.h"
 #include "llvm/ADT/ArrayRef.h"
 #include "llvm/ADT/ImmutableList.h"
 #include "llvm/ADT/SmallVector.h"
@@ -272,20 +275,21 @@ class IncrementalLongestPathAnalysis : private LongestPathAnalysis,
       : LongestPathAnalysis(moduleOp, am,
                             LongestPathAnalysisOption(false, true)) {}
 
-  FailureOr<int64_t> getOrComputeDelay(Value value, size_t bitPos);
+  FailureOr<int64_t> getOrComputeMaxDelay(Value value, size_t bitPos);
   FailureOr<ArrayRef<OpenPath>> getOrComputePaths(Value value, size_t bitPos);
 
-  // Returns true if the analysis is still valid after the value is erased.
-  // If the client erased a value, then the analyais cannot be used anymore.
-  // A client should check this before erasing a value, and if this
-  // returns false, the client should raise an error or should not rely on the
-  // analysis.
-  bool isValueValidToErase(Value value) const;
+  // Returns true if the analysis is still valid after the operation is
+  // modified. A client should check this function before peforming operaton
+  // mutations, and if this returns false, the client should raise an error or
+  // should not rely on the analysis.
+  bool isOperationValidToMutate(Operation *op) const;
 
   // MLIR PatternRewriter::Listener interface.
+  void notifyOperationModified(Operation *op) override;
   void notifyOperationReplaced(Operation *op, ValueRange replacement) override;
   void notifyOperationErased(Operation *op) override;
 
+private:
   bool isAnalysisValid = true;
 };
 
@@ -301,7 +305,7 @@ class LongestPathAnalysisWithTrace : public LongestPathAnalysis {
 // for computing statistics and CAPI.
 class LongestPathCollection {
 public:
-  LongestPathCollection(MLIRContext *ctx) : ctx(ctx){};
+  LongestPathCollection(MLIRContext *ctx) : ctx(ctx) {};
   const DataflowPath &getPath(unsigned index) const { return paths[index]; }
   MLIRContext *getContext() const { return ctx; }
   llvm::SmallVector<DataflowPath, 64> paths;
@@ -316,6 +320,18 @@ class LongestPathCollection {
   MLIRContext *ctx;
 };
 
+// Register prerequisite passes for AIG longest path analysis.
+// This includes the Comb to AIG conversion pass and necessary
+// canonicalization passes to clean up the IR.
+inline void registerAIGAnalysisPrerequisitePasses() {
+  hw::registerHWAggregateToCombPass();
+  ::mlir::registerPass([]() -> std::unique_ptr<::mlir::Pass> {
+    return createConvertCombToAIG();
+  });
+  mlir::registerCSEPass();
+  mlir::registerCanonicalizerPass();
+}
+
 } // namespace aig
 } // namespace circt
 
@@ -344,6 +360,7 @@ struct DenseMapInfo<circt::aig::Object> {
                          {b.instancePath, b.value, b.bitPos});
   }
 };
+
 } // namespace llvm
 
 #endif // CIRCT_ANALYSIS_AIG_ANALYSIS_H

include/circt/Dialect/Synth/Transforms/SynthesisPipeline.h

@@ -31,6 +31,10 @@ struct AIGLoweringPipelineOptions
       *this, "disable-datapath",
       llvm::cl::desc("Disable datapath optimization passes"),
       llvm::cl::init(false)};
+  PassOptions::Option<bool> timingAware{
+      *this, "timing-aware",
+      llvm::cl::desc("Lower operators in a timing-aware fashion"),
+      llvm::cl::init(false)};
 };
 
 /// Options for the aig optimization pipeline.

lib/Conversion/DatapathToComb/CMakeLists.txt

@@ -5,6 +5,7 @@ add_circt_conversion_library(CIRCTDatapathToComb
   CIRCTConversionPassIncGen
 
   LINK_LIBS PUBLIC
+  CIRCTAIGAnalysis
   CIRCTComb
   CIRCTDatapath
   CIRCTHW

lib/Conversion/DatapathToComb/DatapathToComb.cpp

@@ -13,8 +13,9 @@
 #include "circt/Dialect/HW/HWOps.h"
 #include "mlir/Analysis/TopologicalSortUtils.h"
 #include "mlir/Dialect/Func/IR/FuncOps.h"
+#include "mlir/IR/PatternMatch.h"
 #include "mlir/Pass/Pass.h"
-#include "mlir/Transforms/DialectConversion.h"
+#include "mlir/Transforms/GreedyPatternRewriteDriver.h"
 #include "llvm/Support/Debug.h"
 
 #define DEBUG_TYPE "datapath-to-comb"
@@ -42,11 +43,11 @@ namespace {
 // Replace compressor by an adder of the inputs and zero for the other results:
 // compress(a,b,c,d) -> {a+b+c+d, 0}
 // Facilitates use of downstream compression algorithms e.g. Yosys
-struct DatapathCompressOpAddConversion : OpConversionPattern<CompressOp> {
-  using OpConversionPattern<CompressOp>::OpConversionPattern;
+struct DatapathCompressOpAddConversion : mlir::OpRewritePattern<CompressOp> {
+  using mlir::OpRewritePattern<CompressOp>::OpRewritePattern;
   LogicalResult
-  matchAndRewrite(CompressOp op, OpAdaptor adaptor,
-                  ConversionPatternRewriter &rewriter) const override {
+  matchAndRewrite(CompressOp op,
+                  mlir::PatternRewriter &rewriter) const override {
     Location loc = op.getLoc();
     auto inputs = op.getOperands();
     unsigned width = inputs[0].getType().getIntOrFloatBitWidth();
@@ -62,15 +63,14 @@ struct DatapathCompressOpAddConversion : OpConversionPattern<CompressOp> {
 };
 
 // Replace compressor by a wallace tree of full-adders
-struct DatapathCompressOpConversion : OpConversionPattern<CompressOp> {
-  using OpConversionPattern<CompressOp>::OpConversionPattern;
+struct DatapathCompressOpConversion : mlir::OpRewritePattern<CompressOp> {
   DatapathCompressOpConversion(MLIRContext *context,
                                aig::IncrementalLongestPathAnalysis *analysis)
-      : OpConversionPattern<CompressOp>(context), analysis(analysis) {}
+      : mlir::OpRewritePattern<CompressOp>(context), analysis(analysis) {}
 
   LogicalResult
-  matchAndRewrite(CompressOp op, OpAdaptor adaptor,
-                  ConversionPatternRewriter &rewriter) const override {
+  matchAndRewrite(CompressOp op,
+                  mlir::PatternRewriter &rewriter) const override {
     Location loc = op.getLoc();
     auto inputs = op.getOperands();
     unsigned width = inputs[0].getType().getIntOrFloatBitWidth();
@@ -79,30 +79,6 @@ struct DatapathCompressOpConversion : OpConversionPattern<CompressOp> {
     for (auto input : inputs) {
       addends.push_back(
           extractBits(rewriter, input)); // Extract bits from each input
-
-      // NOTE: Following change will be splitted into a separate PR.
-      if (analysis) {
-        auto delay = analysis->getOrComputePaths(input, 0);
-        if (failed(delay))
-          return op.emitError("Failed to get delay for input");
-        // TODO: Use the delay information to sort the inputs.
-      }
-
-      LLVM_DEBUG({
-        llvm::dbgs() << "Input: " << input << " delay: ";
-        assert(analysis && "Expected analysis to be set");
-        if (analysis) {
-          auto delay = analysis->getOrComputeDelay(
-              input, 0); // Query delay for each input
-          if (llvm::succeeded(delay))
-            llvm::dbgs() << *delay;
-          else
-            llvm::dbgs() << "N/A";
-        } else {
-          llvm::dbgs() << "N/A(analysis not set)";
-        }
-        llvm::dbgs() << "\n";
-      });
     }
 
     // Wallace tree reduction
@@ -111,6 +87,26 @@ struct DatapathCompressOpConversion : OpConversionPattern<CompressOp> {
     // sort the inputs according to arrival time.
     // TODO: Use the listener to get arrival time information.
     auto targetAddends = op.getNumResults();
+    if (analysis) {
+      // Sort the addends row based on the delay of the input.
+      for (size_t j = 0; j < addends[0].size(); ++j) {
+        SmallVector<std::pair<int64_t, Value>> delays;
+        for (size_t i = 0; i < addends.size(); ++i) {
+          auto delay = analysis->getOrComputeMaxDelay(addends[i][j], 0);
+          if (failed(delay))
+            return rewriter.notifyMatchFailure(op,
+                                               "Failed to get delay for input");
+          delays.push_back(std::make_pair(*delay, addends[i][j]));
+        }
+        std::stable_sort(delays.begin(), delays.end(),
+                         [](const std::pair<int64_t, Value> &a,
+                            const std::pair<int64_t, Value> &b) {
+                           return a.first < b.first;
+                         });
+        for (size_t i = 0; i < addends.size(); ++i)
+          addends[i][j] = delays[i].second;
+      }
+    }
     rewriter.replaceOp(op, comb::wallaceReduction(rewriter, loc, width,
                                                   targetAddends, addends));
     return success();
@@ -120,19 +116,16 @@ struct DatapathCompressOpConversion : OpConversionPattern<CompressOp> {
   aig::IncrementalLongestPathAnalysis *analysis = nullptr;
 };
 
-struct DatapathPartialProductOpConversion
-    : OpConversionPattern<PartialProductOp> {
-  using OpConversionPattern<PartialProductOp>::OpConversionPattern;
+struct DatapathPartialProductOpConversion : OpRewritePattern<PartialProductOp> {
+  using OpRewritePattern<PartialProductOp>::OpRewritePattern;
 
   DatapathPartialProductOpConversion(MLIRContext *context, bool forceBooth)
-      : OpConversionPattern<PartialProductOp>(context),
-        forceBooth(forceBooth){};
+      : OpRewritePattern<PartialProductOp>(context), forceBooth(forceBooth){};
 
   const bool forceBooth;
 
-  LogicalResult
-  matchAndRewrite(PartialProductOp op, OpAdaptor adaptor,
-                  ConversionPatternRewriter &rewriter) const override {
+  LogicalResult matchAndRewrite(PartialProductOp op,
+                                PatternRewriter &rewriter) const override {
 
     Value a = op.getLhs();
     Value b = op.getRhs();
@@ -152,8 +145,8 @@ struct DatapathPartialProductOpConversion
   }
 
 private:
-  static LogicalResult lowerAndArray(ConversionPatternRewriter &rewriter,
-                                     Value a, Value b, PartialProductOp op,
+  static LogicalResult lowerAndArray(PatternRewriter &rewriter, Value a,
+                                     Value b, PartialProductOp op,
                                      unsigned width) {
 
     Location loc = op.getLoc();
@@ -179,8 +172,8 @@ struct DatapathPartialProductOpConversion
     return success();
   }
 
-  static LogicalResult lowerBoothArray(ConversionPatternRewriter &rewriter,
-                                       Value a, Value b, PartialProductOp op,
+  static LogicalResult lowerBoothArray(PatternRewriter &rewriter, Value a,
+                                       Value b, PartialProductOp op,
                                        unsigned width) {
     Location loc = op.getLoc();
     auto zeroFalse = hw::ConstantOp::create(rewriter, loc, APInt(1, 0));
@@ -288,42 +281,40 @@ struct ConvertDatapathToCombPass
 };
 } // namespace
 
-static LogicalResult
-applyConversionWithTimingInfo(Operation *op, const ConversionTarget &target,
-                              RewritePatternSet &&patterns,
-                              aig::IncrementalLongestPathAnalysis *analysis) {
+static LogicalResult applyPatternsGreedilyWithTimingInfo(
+    Operation *op, RewritePatternSet &&patterns,
+    aig::IncrementalLongestPathAnalysis *analysis) {
   // TODO: Topologically sort the operations in the module to ensure that all
   // dependencies are processed before their users.
-  mlir::ConversionConfig config;
-  config.listener = analysis;
-
-  // Apply the conversion patterns
-  if (failed(mlir::applyPartialConversion(op, target, std::move(patterns))))
+  mlir::GreedyRewriteConfig config;
+  // Set the listener to update timing information
+  // HACK: Setting max iterations to 2 to ensure that the patterns are one-shot,
+  // making sure target operations are datapath operations are replaced.
+  config.setMaxIterations(2).setListener(analysis).setUseTopDownTraversal(true);
+
+  // Apply the patterns greedily
+  if (failed(mlir::applyPatternsGreedily(op, std::move(patterns), config)))
     return failure();
 
   return success();
 }
 
 void ConvertDatapathToCombPass::runOnOperation() {
-  ConversionTarget target(getContext());
-
-  target.addLegalDialect<comb::CombDialect, hw::HWDialect>();
-  target.addIllegalDialect<DatapathDialect>();
-
   RewritePatternSet patterns(&getContext());
 
   patterns.add<DatapathPartialProductOpConversion>(patterns.getContext(),
                                                    forceBooth);
-  auto &analysis = getAnalysis<aig::IncrementalLongestPathAnalysis>();
+  aig::IncrementalLongestPathAnalysis *analysis = nullptr;
+  if (timingAware)
+    analysis = &getAnalysis<aig::IncrementalLongestPathAnalysis>();
   if (lowerCompressToAdd)
-    // Lower compressors to simple add operations for downstream optimisations
+    // Lower compressors to simple add operations for downstream optimizations
     patterns.add<DatapathCompressOpAddConversion>(patterns.getContext());
   else
     // Lower compressors to a complete gate-level implementation
-    patterns.add<DatapathCompressOpConversion>(patterns.getContext(),
-                                               &analysis);
+    patterns.add<DatapathCompressOpConversion>(patterns.getContext(), analysis);
 
-  if (failed(applyConversionWithTimingInfo(getOperation(), target,
-                                           std::move(patterns), &analysis)))
+  if (failed(applyPatternsGreedilyWithTimingInfo(
+          getOperation(), std::move(patterns), analysis)))
     return signalPassFailure();
 }

lib/Dialect/AIG/Analysis/CMakeLists.txt

@@ -9,6 +9,8 @@ add_circt_dialect_library(CIRCTAIGAnalysis
   MLIRSupport
   CIRCTAIG
   CIRCTComb
+  CIRCTCombToAIG
+  CIRCTTransforms
   CIRCTHW
   CIRCTSeq
 )