Changes in v7:

- EDITME: describe what is new in this series revision.
- EDITME: use bulletpoints and terse descriptions.
- Link to v6: https://lore.kernel.org/r/[email protected]

drm/msm: Add support for SM8750

Hi,

Dependency / Rabased on top of
==============================
https://lore.kernel.org/r/[email protected]/

Changes in v6:
=============
- Add ack/rb tags
- Dropped dispcc-sm8750 patch, because I sent it separately.
- Several changes due to rebasing on updagted Dmitry's "dpu drop
  features" rework.
- Drop applied patches.
- New patch: drm/msm/dpu: Consistently use u32 instead of uint32_t
- Fix dimmed display issue (thanks Abel Vesa) in patch "Implement 10-bit
  color alpha for v12.0 DPU".
- Implement remaining comments from Dmitry like code style (blank line),
  see also individual changelogs.
- Link to v5: https://lore.kernel.org/r/[email protected]

Changes in v5:
=============
- Add ack/rb tags
- New patches:
  torvalds#6: clk: qcom: dispcc-sm8750: Fix setting rate byte and pixel clocks
  torvalds#14: drm/msm/dsi/phy: Toggle back buffer resync after preparing PLL
  torvalds#15: drm/msm/dsi/phy: Define PHY_CMN_CTRL_0 bitfields
  torvalds#16: drm/msm/dsi/phy: Fix reading zero as PLL rates when unprepared
  torvalds#17: drm/msm/dsi/phy: Fix missing initial VCO rate

- Patch drm/msm/dsi: Add support for SM8750:
  - Only reparent byte and pixel clocks while PLLs is prepared. Setting
    rate works fine with earlier DISP CC patch for enabling their parents
    during rate change.

- Link to v4: https://lore.kernel.org/r/[email protected]

Changes in v4
=============
- Add ack/rb tags
- Implement Dmitry's feedback (lower-case hex, indentation, pass
  mdss_ver instead of ctl), patches:
  drm/msm/dpu: Implement 10-bit color alpha for v12.0 DPU
  drm/msm/dpu: Implement CTL_PIPE_ACTIVE for v12.0 DPU

- Rebase on latest next
- Drop applied two first patches
- Link to v3: https://lore.kernel.org/r/[email protected]

Changes in v3
=============
- Add ack/rb tags
- #5: dt-bindings: display/msm: dp-controller: Add SM8750:
  Extend commit msg

- torvalds#7: dt-bindings: display/msm: qcom,sm8750-mdss: Add SM8750:
  - Properly described interconnects
  - Use only one compatible and contains for the sub-blocks (Rob)

- torvalds#12: drm/msm/dsi: Add support for SM8750:
  Drop 'struct msm_dsi_config sm8750_dsi_cfg' and use sm8650 one.
- drm/msm/dpu: Implement new v12.0 DPU differences
  Split into several patches
- Link to v2: https://lore.kernel.org/r/[email protected]

Changes in v2
=============
- Implement LM crossbar, 10-bit alpha and active layer changes:
  New patch: drm/msm/dpu: Implement new v12.0 DPU differences
- New patch: drm/msm/dpu: Add missing "fetch" name to set_active_pipes()
- Add CDM
- Split some DPU patch pieces into separate patches:
  drm/msm/dpu: Drop useless comments
  drm/msm/dpu: Add LM_7, DSC_[67], PP_[67] and MERGE_3D_5
  drm/msm/dpu: Add handling of LM_6 and LM_7 bits in pending flush mask
- Split DSI and DSI PHY patches
- Mention CLK_OPS_PARENT_ENABLE in DSI commit
- Mention DSI PHY PLL work:
  https://patchwork.freedesktop.org/patch/542000/?series=119177&rev=1
- DPU: Drop SSPP_VIG4 comments
- DPU: Add CDM
- Link to v1: https://lore.kernel.org/r/[email protected]

Best regards,
Krzysztof

To: Abhinav Kumar <[email protected]>
To: Sean Paul <[email protected]>
To: Marijn Suijten <[email protected]>
To: David Airlie <[email protected]>
To: Simona Vetter <[email protected]>
To: Maarten Lankhorst <[email protected]>
To: Maxime Ripard <[email protected]>
To: Thomas Zimmermann <[email protected]>
To: Rob Herring <[email protected]>
To: Krzysztof Kozlowski <[email protected]>
To: Conor Dooley <[email protected]>
To: Krishna Manikandan <[email protected]>
To: Jonathan Marek <[email protected]>
To: Kuogee Hsieh <[email protected]>
To: Neil Armstrong <[email protected]>
To: Dmitry Baryshkov <[email protected]>
To: Rob Clark <[email protected]>
To: Bjorn Andersson <[email protected]>
To: Michael Turquette <[email protected]>
To: Stephen Boyd <[email protected]>
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: Krzysztof Kozlowski <[email protected]>
Cc: Srini Kandagatla <[email protected]>
Cc: Rob Clark <[email protected]>
Cc: [email protected]
Cc: Abel Vesa <[email protected]>

--- b4-submit-tracking ---
# This section is used internally by b4 prep for tracking purposes.
{
  "series": {
    "revision": 7,
    "change-id": "20250109-b4-sm8750-display-6ea537754af1",
    "prefixes": [],
    "history": {
      "v1": [
        "[email protected]"
      ],
      "v2": [
        "[email protected]"
      ],
      "v3": [
        "[email protected]"
      ],
      "v4": [
        "[email protected]"
      ],
      "v5": [
        "[email protected]"
      ],
      "v6": [
        "[email protected]"
      ]
    },
    "prerequisites": [
      "change-id: 20241213-dpu-drop-features-7603dc3ee189:v5",
      "base-commit: next-20250610"
    ]
  }
}

Author: krzk