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Anson HuangLiuHui-Jason
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ENGR00274768-2 ARM: imx: Use irq torvalds#32 for cpuidle instead of irq torvalds#125
IRQ torvalds#125's status is not constant on different boards, IRQ torvalds#32 is IOMUXC's interrupt which can be triggered manually at anytime, use this irq instead of torvalds#125 to generate interrupt for avoiding CCM enter low power mode by mistake. Signed-off-by: Anson Huang <[email protected]>
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arch/arm/mach-imx/clk-imx6q.c

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -64,7 +64,7 @@
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#define CGPR 0x64
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#define BM_CGPR_CHICKEN_BIT (0x1 << 17)
6666

67-
#define MX6Q_INT_PARITY_CHECK_ERROR 125
67+
#define MX6Q_INT_IOMUXC 32
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static void __iomem *ccm_base;
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@@ -140,15 +140,15 @@ static void imx6q_enable_wb(bool enable)
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int imx6q_set_lpm(enum mxc_cpu_pwr_mode mode)
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{
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u32 val = readl_relaxed(ccm_base + CLPCR);
143-
struct irq_desc *desc = irq_to_desc(MX6Q_INT_PARITY_CHECK_ERROR);
143+
struct irq_desc *desc = irq_to_desc(MX6Q_INT_IOMUXC);
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/*
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* CCM state machine has restriction, before enabling
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* LPM mode, need to make sure last LPM mode is waked up
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* by dsm_wakeup_signal, which means the wakeup source
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* must be seen by GPC, then CCM will clean its state machine
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* and re-sample necessary signal to decide whether it can
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* enter LPM mode. Here we use the forever pending irq #125,
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* enter LPM mode. We force irq #32 to be always pending,
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* unmask it before we enable LPM mode and mask it after LPM
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* is enabled, this flow will make sure CCM state machine in
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* reliable status before entering LPM mode. Otherwise, CCM

arch/arm/mach-imx/mach-imx6q.c

Lines changed: 12 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -302,6 +302,18 @@ static struct platform_device imx6q_cpufreq_pdev = {
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static void __init imx6q_init_late(void)
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{
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struct regmap *gpr;
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/*
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* Need to force IOMUXC irq pending to meet CCM low power mode
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* restriction, this is recommended by hardware team.
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*/
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gpr = syscon_regmap_lookup_by_compatible("fsl,imx6q-iomuxc-gpr");
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if (!IS_ERR(gpr))
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regmap_update_bits(gpr, IOMUXC_GPR1,
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IMX6Q_GPR1_GINT_MASK,
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IMX6Q_GPR1_GINT_ASSERT);
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/*
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* WAIT mode is broken on TO 1.0 and 1.1, so there is no point
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* to run cpuidle on them.

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