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hodgesdshodgesds
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lazily return errors in profiler initialization
Signed-off-by: Daniel Hodges <[email protected]>
1 parent 3ce7e7d commit bfd63eb

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3 files changed

+123
-81
lines changed

3 files changed

+123
-81
lines changed

‎cache_profiler.go‎

Lines changed: 62 additions & 41 deletions
Original file line numberDiff line numberDiff line change
@@ -64,177 +64,198 @@ type cacheProfiler struct {
6464
// NewCacheProfiler returns a new cache profiler.
6565
func NewCacheProfiler(pid, cpu int, opts ...int) (CacheProfiler, error) {
6666
profilers := map[int]Profiler{}
67+
var e error
6768

6869
// L1 data
6970
op := unix.PERF_COUNT_HW_CACHE_OP_READ
7071
result := unix.PERF_COUNT_HW_CACHE_RESULT_ACCESS
7172
l1dataReadHit, err := NewL1DataProfiler(pid, cpu, op, result, opts...)
7273
if err != nil {
73-
return nil, err
74+
e = multierr.Append(e, err)
75+
} else {
76+
profilers[L1DataReadHit] = l1dataReadHit
7477
}
75-
profilers[L1DataReadHit] = l1dataReadHit
7678

7779
op = unix.PERF_COUNT_HW_CACHE_OP_READ
7880
result = unix.PERF_COUNT_HW_CACHE_RESULT_MISS
7981
l1dataReadMiss, err := NewL1DataProfiler(pid, cpu, op, result, opts...)
8082
if err != nil {
81-
return nil, err
83+
e = multierr.Append(e, err)
84+
} else {
85+
profilers[L1DataReadMiss] = l1dataReadMiss
8286
}
83-
profilers[L1DataReadMiss] = l1dataReadMiss
8487

8588
op = unix.PERF_COUNT_HW_CACHE_OP_WRITE
8689
result = unix.PERF_COUNT_HW_CACHE_RESULT_ACCESS
8790
l1dataWriteHit, err := NewL1DataProfiler(pid, cpu, op, result, opts...)
8891
if err != nil {
89-
return nil, err
92+
e = multierr.Append(e, err)
93+
} else {
94+
profilers[L1DataWriteHit] = l1dataWriteHit
9095
}
91-
profilers[L1DataWriteHit] = l1dataWriteHit
9296

9397
// L1 instruction
9498
op = unix.PERF_COUNT_HW_CACHE_OP_READ
9599
result = unix.PERF_COUNT_HW_CACHE_RESULT_MISS
96100
l1InstrReadMiss, err := NewL1InstrProfiler(pid, cpu, op, result, opts...)
97101
if err != nil {
98-
return nil, err
102+
e = multierr.Append(e, err)
103+
} else {
104+
profilers[L1InstrReadMiss] = l1InstrReadMiss
99105
}
100-
profilers[L1InstrReadMiss] = l1InstrReadMiss
101106

102107
// Last Level
103108
op = unix.PERF_COUNT_HW_CACHE_OP_READ
104109
result = unix.PERF_COUNT_HW_CACHE_RESULT_ACCESS
105110
llReadHit, err := NewLLCacheProfiler(pid, cpu, op, result, opts...)
106111
if err != nil {
107-
return nil, err
112+
e = multierr.Append(e, err)
113+
} else {
114+
profilers[LLReadHit] = llReadHit
108115
}
109-
profilers[LLReadHit] = llReadHit
110116

111117
op = unix.PERF_COUNT_HW_CACHE_OP_READ
112118
result = unix.PERF_COUNT_HW_CACHE_RESULT_MISS
113119
llReadMiss, err := NewLLCacheProfiler(pid, cpu, op, result, opts...)
114120
if err != nil {
115-
return nil, err
121+
e = multierr.Append(e, err)
122+
} else {
123+
profilers[LLReadMiss] = llReadMiss
116124
}
117-
profilers[LLReadMiss] = llReadMiss
118125

119126
op = unix.PERF_COUNT_HW_CACHE_OP_WRITE
120127
result = unix.PERF_COUNT_HW_CACHE_RESULT_ACCESS
121128
llWriteHit, err := NewLLCacheProfiler(pid, cpu, op, result, opts...)
122129
if err != nil {
123-
return nil, err
130+
e = multierr.Append(e, err)
131+
} else {
132+
profilers[LLWriteHit] = llWriteHit
124133
}
125-
profilers[LLWriteHit] = llWriteHit
126134

127135
op = unix.PERF_COUNT_HW_CACHE_OP_WRITE
128136
result = unix.PERF_COUNT_HW_CACHE_RESULT_MISS
129137
llWriteMiss, err := NewLLCacheProfiler(pid, cpu, op, result, opts...)
130138
if err != nil {
131-
return nil, err
139+
e = multierr.Append(e, err)
140+
} else {
141+
profilers[LLWriteMiss] = llWriteMiss
132142
}
133-
profilers[LLWriteMiss] = llWriteMiss
134143

135144
// dTLB
136145
op = unix.PERF_COUNT_HW_CACHE_OP_READ
137146
result = unix.PERF_COUNT_HW_CACHE_RESULT_ACCESS
138147
dTLBReadHit, err := NewDataTLBProfiler(pid, cpu, op, result, opts...)
139148
if err != nil {
140-
return nil, err
149+
e = multierr.Append(e, err)
150+
} else {
151+
profilers[DataTLBReadHit] = dTLBReadHit
141152
}
142-
profilers[DataTLBReadHit] = dTLBReadHit
143153

144154
op = unix.PERF_COUNT_HW_CACHE_OP_READ
145155
result = unix.PERF_COUNT_HW_CACHE_RESULT_MISS
146156
dTLBReadMiss, err := NewDataTLBProfiler(pid, cpu, op, result, opts...)
147157
if err != nil {
148-
return nil, err
158+
e = multierr.Append(e, err)
159+
} else {
160+
profilers[DataTLBReadMiss] = dTLBReadMiss
149161
}
150-
profilers[DataTLBReadMiss] = dTLBReadMiss
151162

152163
op = unix.PERF_COUNT_HW_CACHE_OP_WRITE
153164
result = unix.PERF_COUNT_HW_CACHE_RESULT_ACCESS
154165
dTLBWriteHit, err := NewDataTLBProfiler(pid, cpu, op, result, opts...)
155166
if err != nil {
156-
return nil, err
167+
e = multierr.Append(e, err)
168+
} else {
169+
profilers[DataTLBWriteHit] = dTLBWriteHit
157170
}
158-
profilers[DataTLBWriteHit] = dTLBWriteHit
159171

160172
op = unix.PERF_COUNT_HW_CACHE_OP_WRITE
161173
result = unix.PERF_COUNT_HW_CACHE_RESULT_MISS
162174
dTLBWriteMiss, err := NewDataTLBProfiler(pid, cpu, op, result, opts...)
163175
if err != nil {
164-
return nil, err
176+
e = multierr.Append(e, err)
177+
} else {
178+
profilers[DataTLBWriteMiss] = dTLBWriteMiss
165179
}
166-
profilers[DataTLBWriteMiss] = dTLBWriteMiss
167180

168181
// iTLB
169182
op = unix.PERF_COUNT_HW_CACHE_OP_READ
170183
result = unix.PERF_COUNT_HW_CACHE_RESULT_ACCESS
171184
iTLBReadHit, err := NewInstrTLBProfiler(pid, cpu, op, result, opts...)
172185
if err != nil {
173-
return nil, err
186+
e = multierr.Append(e, err)
187+
} else {
188+
profilers[InstrTLBReadHit] = iTLBReadHit
174189
}
175-
profilers[InstrTLBReadHit] = iTLBReadHit
176190

177191
op = unix.PERF_COUNT_HW_CACHE_OP_READ
178192
result = unix.PERF_COUNT_HW_CACHE_RESULT_MISS
179193
iTLBReadMiss, err := NewInstrTLBProfiler(pid, cpu, op, result, opts...)
180194
if err != nil {
181-
return nil, err
195+
e = multierr.Append(e, err)
196+
} else {
197+
profilers[InstrTLBReadMiss] = iTLBReadMiss
182198
}
183-
profilers[InstrTLBReadMiss] = iTLBReadMiss
184199

185200
// BPU
186201
op = unix.PERF_COUNT_HW_CACHE_OP_READ
187202
result = unix.PERF_COUNT_HW_CACHE_RESULT_ACCESS
188203
bpuReadHit, err := NewBPUProfiler(pid, cpu, op, result, opts...)
189204
if err != nil {
190-
return nil, err
205+
e = multierr.Append(e, err)
206+
} else {
207+
profilers[BPUReadHit] = bpuReadHit
191208
}
192-
profilers[BPUReadHit] = bpuReadHit
193209

194210
op = unix.PERF_COUNT_HW_CACHE_OP_READ
195211
result = unix.PERF_COUNT_HW_CACHE_RESULT_MISS
196212
bpuReadMiss, err := NewBPUProfiler(pid, cpu, op, result, opts...)
197213
if err != nil {
198-
return nil, err
214+
e = multierr.Append(e, err)
215+
} else {
216+
profilers[BPUReadMiss] = bpuReadMiss
199217
}
200-
profilers[BPUReadMiss] = bpuReadMiss
201218

202219
// Node
203220
op = unix.PERF_COUNT_HW_CACHE_OP_READ
204221
result = unix.PERF_COUNT_HW_CACHE_RESULT_ACCESS
205222
nodeReadHit, err := NewNodeCacheProfiler(pid, cpu, op, result, opts...)
206223
if err != nil {
207-
return nil, err
224+
e = multierr.Append(e, err)
225+
} else {
226+
profilers[NodeCacheReadHit] = nodeReadHit
208227
}
209-
profilers[NodeCacheReadHit] = nodeReadHit
210228

211229
op = unix.PERF_COUNT_HW_CACHE_OP_READ
212230
result = unix.PERF_COUNT_HW_CACHE_RESULT_MISS
213231
nodeReadMiss, err := NewNodeCacheProfiler(pid, cpu, op, result, opts...)
214232
if err != nil {
215-
return nil, err
233+
e = multierr.Append(e, err)
234+
} else {
235+
profilers[NodeCacheReadMiss] = nodeReadMiss
216236
}
217-
profilers[NodeCacheReadMiss] = nodeReadMiss
218237

219238
op = unix.PERF_COUNT_HW_CACHE_OP_WRITE
220239
result = unix.PERF_COUNT_HW_CACHE_RESULT_ACCESS
221240
nodeWriteHit, err := NewNodeCacheProfiler(pid, cpu, op, result, opts...)
222241
if err != nil {
223-
return nil, err
242+
e = multierr.Append(e, err)
243+
} else {
244+
profilers[NodeCacheWriteHit] = nodeWriteHit
224245
}
225-
profilers[NodeCacheWriteHit] = nodeWriteHit
226246

227247
op = unix.PERF_COUNT_HW_CACHE_OP_WRITE
228248
result = unix.PERF_COUNT_HW_CACHE_RESULT_MISS
229249
nodeWriteMiss, err := NewNodeCacheProfiler(pid, cpu, op, result, opts...)
230250
if err != nil {
231-
return nil, err
251+
e = multierr.Append(e, err)
252+
} else {
253+
profilers[NodeCacheWriteMiss] = nodeWriteMiss
232254
}
233-
profilers[NodeCacheWriteMiss] = nodeWriteMiss
234255

235256
return &cacheProfiler{
236257
profilers: profilers,
237-
}, nil
258+
}, e
238259
}
239260

240261
// Start is used to start the CacheProfiler, it will return an error if no

‎hardware_profiler.go‎

Lines changed: 32 additions & 21 deletions
Original file line numberDiff line numberDiff line change
@@ -15,71 +15,82 @@ type hardwareProfiler struct {
1515

1616
// NewHardwareProfiler returns a new hardware profiler.
1717
func NewHardwareProfiler(pid, cpu int, opts ...int) (HardwareProfiler, error) {
18+
var e error
1819
profilers := map[int]Profiler{}
1920

2021
cpuCycleProfiler, err := NewCPUCycleProfiler(pid, cpu, opts...)
2122
if err != nil {
22-
return nil, err
23+
e = multierr.Append(e, err)
24+
} else {
25+
profilers[unix.PERF_COUNT_HW_CPU_CYCLES] = cpuCycleProfiler
2326
}
24-
profilers[unix.PERF_COUNT_HW_CPU_CYCLES] = cpuCycleProfiler
2527

2628
instrProfiler, err := NewInstrProfiler(pid, cpu, opts...)
2729
if err != nil {
28-
return nil, err
30+
e = multierr.Append(e, err)
31+
} else {
32+
profilers[unix.PERF_COUNT_HW_INSTRUCTIONS] = instrProfiler
2933
}
30-
profilers[unix.PERF_COUNT_HW_INSTRUCTIONS] = instrProfiler
3134

3235
cacheRefProfiler, err := NewCacheRefProfiler(pid, cpu, opts...)
3336
if err != nil {
34-
return nil, err
37+
e = multierr.Append(e, err)
38+
} else {
39+
profilers[unix.PERF_COUNT_HW_CACHE_REFERENCES] = cacheRefProfiler
3540
}
36-
profilers[unix.PERF_COUNT_HW_CACHE_REFERENCES] = cacheRefProfiler
3741

3842
cacheMissesProfiler, err := NewCacheMissesProfiler(pid, cpu, opts...)
3943
if err != nil {
40-
return nil, err
44+
e = multierr.Append(e, err)
45+
} else {
46+
profilers[unix.PERF_COUNT_HW_CACHE_MISSES] = cacheMissesProfiler
4147
}
42-
profilers[unix.PERF_COUNT_HW_CACHE_MISSES] = cacheMissesProfiler
4348

4449
branchInstrProfiler, err := NewBranchInstrProfiler(pid, cpu, opts...)
4550
if err != nil {
46-
return nil, err
51+
e = multierr.Append(e, err)
52+
} else {
53+
profilers[unix.PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = branchInstrProfiler
4754
}
48-
profilers[unix.PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = branchInstrProfiler
4955

5056
branchMissesProfiler, err := NewBranchMissesProfiler(pid, cpu, opts...)
5157
if err != nil {
52-
return nil, err
58+
e = multierr.Append(e, err)
59+
} else {
60+
profilers[unix.PERF_COUNT_HW_BRANCH_MISSES] = branchMissesProfiler
5361
}
54-
profilers[unix.PERF_COUNT_HW_BRANCH_MISSES] = branchMissesProfiler
5562

5663
busCyclesProfiler, err := NewBusCyclesProfiler(pid, cpu, opts...)
5764
if err != nil {
58-
return nil, err
65+
e = multierr.Append(e, err)
66+
} else {
67+
profilers[unix.PERF_COUNT_HW_BUS_CYCLES] = busCyclesProfiler
5968
}
60-
profilers[unix.PERF_COUNT_HW_BUS_CYCLES] = busCyclesProfiler
6169

6270
stalledCyclesFrontProfiler, err := NewStalledCyclesFrontProfiler(pid, cpu, opts...)
6371
if err != nil {
64-
return nil, err
72+
e = multierr.Append(e, err)
73+
} else {
74+
profilers[unix.PERF_COUNT_HW_STALLED_CYCLES_FRONTEND] = stalledCyclesFrontProfiler
6575
}
66-
profilers[unix.PERF_COUNT_HW_STALLED_CYCLES_FRONTEND] = stalledCyclesFrontProfiler
6776

6877
stalledCyclesBackProfiler, err := NewStalledCyclesBackProfiler(pid, cpu, opts...)
6978
if err != nil {
70-
return nil, err
79+
e = multierr.Append(e, err)
80+
} else {
81+
profilers[unix.PERF_COUNT_HW_STALLED_CYCLES_BACKEND] = stalledCyclesBackProfiler
7182
}
72-
profilers[unix.PERF_COUNT_HW_STALLED_CYCLES_BACKEND] = stalledCyclesBackProfiler
7383

7484
refCPUCyclesProfiler, err := NewRefCPUCyclesProfiler(pid, cpu, opts...)
7585
if err != nil {
76-
return nil, err
86+
e = multierr.Append(e, err)
87+
} else {
88+
profilers[unix.PERF_COUNT_HW_REF_CPU_CYCLES] = refCPUCyclesProfiler
7789
}
78-
profilers[unix.PERF_COUNT_HW_REF_CPU_CYCLES] = refCPUCyclesProfiler
7990

8091
return &hardwareProfiler{
8192
profilers: profilers,
82-
}, nil
93+
}, e
8394
}
8495

8596
// Start is used to start the HardwareProfiler.

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