Support IntelliJ 2021.3

Author: itviewer

build.gradle

@@ -1,43 +1,42 @@
 plugins {
     id 'java'
-    id 'org.jetbrains.intellij' version '0.6.5'
+    id 'org.jetbrains.intellij' version '1.5.1'
 }
 
 group 'org.easysoc'
 version pluginVersion
 
-//sourceCompatibility = 1.8
+sourceCompatibility = 11
+targetCompatibility = 11
 
 repositories {
     mavenCentral()
 }
 
 dependencies {
-    //testCompile group: 'junit', name: 'junit', version: '4.12'
+
 }
 
 // See https://github.com/JetBrains/gradle-intellij-plugin/
 intellij {
     // version and localPath should not be specified at the same time
-    localPath "/home/itviewer/Downloads/software/chip"
+    // version = '2021.3.3'
+    localPath = "/home/itviewer/Downloads/software/idea-IC"
+    sandboxDir = "/home/itviewer/IdeaProjects/plugins-sandbox"
 
-    // https://blog.jetbrains.com/platform/2019/06/java-functionality-extracted-as-a-plugin/
-    // plugins 'studio.edaphic.sv:2019.3.2'
-    downloadSources false
+    // plugins = ['PsiViewer:213-SNAPSHOT']
+    // downloadSources false
 }
 
 runIde {
-    // https://confluence.jetbrains.com/display/JBR/JetBrains+Runtime
-    jbrVersion "11_0_9_1b1145.77"
-    ideDirectory "/home/itviewer/Downloads/software/chip"
-    jvmArgs '-Didea.platform.prefix=Chip'
+    ideDir = project.file('/home/itviewer/Downloads/software/idea-IC')
     //for jbr11
     jvmArgs '--add-exports=java.base/jdk.internal.vm=ALL-UNNAMED','-Djdk.module.illegalAccess.silent=true'
 }
 
 patchPluginXml {
-    sinceBuild "203"
-    untilBuild "211.*"
+    sinceBuild = '213'
+    untilBuild = '221.*'
 }
 
 buildSearchableOptions.onlyIf { false }

gradle.properties

@@ -1 +1 @@
-pluginVersion=1.0.2
+pluginVersion=1.4.0

gradle/wrapper/gradle-wrapper.jar

@@ -1,5 +1,5 @@
 distributionBase=GRADLE_USER_HOME
 distributionPath=wrapper/dists
-distributionUrl=https\://services.gradle.org/distributions/gradle-6.7-bin.zip
+distributionUrl=https\://services.gradle.org/distributions/gradle-7.1.1-bin.zip
 zipStoreBase=GRADLE_USER_HOME
 zipStorePath=wrapper/dists

gradle/wrapper/gradle-wrapper.properties

@@ -72,7 +72,7 @@ case "`uname`" in
   Darwin* )
     darwin=true
     ;;
-  MINGW* )
+  MSYS* | MINGW* )
     msys=true
     ;;
   NONSTOP* )

gradlew

@@ -36,6 +36,12 @@ public PsiElement resolve() {
   }
 
   public class MyFakePsiElement extends FakePsiElement implements SyntheticElement {
+
+    @Override
+    public String getPresentableText() {
+      return "FileInfo";
+    }
+
     @Override
     public PsiElement getParent() {
       return myElement;
@@ -44,11 +50,19 @@ public PsiElement getParent() {
     @Override
     public void navigate(boolean requestFocus) {
 
+      // only support first item // @[GCD.scala 24:{19,20} GCD2.scala 28:7]
       String[] token = myElement.getText().split(" ");
-      String filename = token[1].substring(2);
-      String[] pos = token[2].split(":");
-      int line = Integer.valueOf(pos[0]) - 1;
-      int column = Integer.valueOf(pos[1].replace("]", "")) - 1;
+      // 只有这里和 Firrtl 不同，Verilog 具有 // 前缀
+      String filename = token[1].substring(2);	// GCD.scala
+      String[] pos = token[2].split(":");	//
+      int line = Integer.parseInt(pos[0]) - 1;
+      int column;
+      if (pos[1].startsWith("{")) {
+        String[] columns = pos[1].split(",");
+        column = Integer.parseInt(columns[0].replace("{", "")) - 1;
+      } else {
+        column = Integer.parseInt(pos[1].replace("]", "")) - 1;
+      }
 
       Project project = myElement.getProject();
       PsiFile[] files = FilenameIndex.getFilesByName(project,filename, GlobalSearchScope.projectScope(project));
@@ -72,9 +86,11 @@ public void navigate(boolean requestFocus) {
                   .createPopup().showInFocusCenter();
         }
       } else {
-        Notifications.Bus.notify(new Notification("FileInfo","",filename + " not found!",
-                NotificationType.ERROR));
+        Notifications.Bus.notify(new Notification(
+                "SystemVerilog","",filename + " not found!", NotificationType.ERROR));
       }
     }
+
+
   }
 }

src/main/java/org/easysoc/plugins/verilog/resolve/reference/FileInfoRef.java

@@ -7,23 +7,24 @@
 import org.jetbrains.annotations.NotNull;
 
 public class VerilogReferenceContributor extends PsiReferenceContributor {
-  @Override
-  public void registerReferenceProviders(@NotNull PsiReferenceRegistrar registrar) {
+    @Override
+    public void registerReferenceProviders(@NotNull PsiReferenceRegistrar registrar) {
 //      PlatformPatterns.psiElement(PsiComment.class)
-    registrar.registerReferenceProvider(PlatformPatterns.psiComment(),
-            new PsiReferenceProvider() {
-              @NotNull
-              @Override
-              public PsiReference[] getReferencesByElement(@NotNull PsiElement element,
-                                                           @NotNull ProcessingContext context) {
-                PsiComment comment = (PsiComment) element;
-                String value = comment.getText();
-                if ((value.startsWith("// @["))) {
-                  TextRange textRange = new TextRange(5, value.length() - 1);
-                  return new PsiReference[]{new FileInfoRef(element, textRange)};
-                }
-                return PsiReference.EMPTY_ARRAY;
-              }
-            });
-  }
+        registrar.registerReferenceProvider(PlatformPatterns.psiComment(),
+                new PsiReferenceProvider() {
+                    @NotNull
+                    @Override
+                    public PsiReference[] getReferencesByElement(@NotNull PsiElement element,
+                                                                 @NotNull ProcessingContext context) {
+                        PsiComment comment = (PsiComment) element;
+                        String value = comment.getText();
+                        if ((value.startsWith("// @["))) {
+                            // 这里只影响鼠标点击时的提示范围，不影响 getText() 内容
+                            TextRange textRange = new TextRange(5, value.length() - 1);
+                            return new PsiReference[]{new FileInfoRef(element, textRange)};
+                        }
+                        return PsiReference.EMPTY_ARRAY;
+                    }
+                });
+    }
 }

src/main/java/org/easysoc/plugins/verilog/resolve/reference/VerilogReferenceContributor.java

@@ -4,23 +4,23 @@
     <vendor url="https://www.easysoc.org">EasySoC</vendor>
     <change-notes><![CDATA[
         <ul>
-            <li>Allow to select the Scala/Chisel file to jump to</li>
+            <li>Support IntelliJ 2021.3</li>
         </ul>
     ]]></change-notes>
     <description><![CDATA[
-    Jump to the corresponding Chisel code by navigate(Ctrl+Click) the special verilog comment.<br>
+    Jump to the corresponding Chisel code by Ctrl+Click on the special verilog comment.<br>
     Currently depends on the SystemVerilog plugin by Edaphic.Studio.
     ]]></description>
 
-    <!-- please see http://www.jetbrains.org/intellij/sdk/docs/basics/getting_started/plugin_compatibility.html
-         on how to target different products -->
     <depends>studio.edaphic.sv</depends>
+    <depends>org.easysoc.chisel</depends>
     <depends>com.intellij.modules.platform</depends>
 
     <extensions defaultExtensionNs="com.intellij">
-        <!-- Add your extensions here -->
+        <notificationGroup id="SystemVerilog" displayType="BALLOON"/>
+
         <psi.referenceContributor language="SystemVerilog" implementation="org.easysoc.plugins.verilog.resolve.reference.VerilogReferenceContributor"/>
-        <documentationProvider implementation="org.easysoc.plugins.verilog.paths.FileInfoRefDocumentationProvider"/>
+        <lang.documentationProvider language="SystemVerilog" implementationClass="org.easysoc.plugins.verilog.paths.FileInfoRefDocumentationProvider"/>
     </extensions>
 
     <actions>