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Merge pull request #994 from diffblue/smv-word-type
SMV: word types
2 parents 9b88d5d + 494e214 commit f22a2c1

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CHANGELOG

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* SystemVerilog: typedefs from package scopes
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* SystemVerilog: assignment patterns with keys for structs
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* SMV: LTL V operator, xnor operator
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* SMV: word types and operators
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# EBMC 5.5
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regression/smv/word/basic1.desc

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CORE
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basic1.smv
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--bound 0 --trace
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^ s1 = 0sd8_123 \(01111011\)$
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^ u1 = 0ud8_123 \(01111011\)$
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^EXIT=10$
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^SIGNAL=0$
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--
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^warning: ignoring

regression/smv/word/basic1.smv

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MODULE main
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VAR u1 : word[8];
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ASSIGN u1 := uwconst(123, 8);
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VAR s1 : signed word[8];
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ASSIGN s1 := swconst(123, 8);
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SPEC FALSE

regression/smv/word/basic2.desc

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CORE
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basic2.smv
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--bdd
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^\[live\] G F counter = 0ud8_10: PROVED$
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^EXIT=0$
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^SIGNAL=0$
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--
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^warning: ignoring

regression/smv/word/basic2.smv

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MODULE main
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VAR counter : word[8];
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ASSIGN init(counter) := uwconst(0, 8);
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ASSIGN next(counter) := counter + uwconst(1, 8);
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LTLSPEC NAME live := G F counter = uwconst(10, 8)

regression/smv/word/bitwise1.desc

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CORE
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bitwise1.smv
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^\[.*\] !0ud8_123 = 0ud8_132: PROVED$
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^\[.*\] !0sd8_123 = -0sd8_124: PROVED$
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^\[.*\] \(0ud8_123 \& 0ud8_7\) = 0ud8_3: PROVED$
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^\[.*\] \(0ud8_123 \| 0ud8_7\) = 0ud8_127: PROVED$
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^\[.*\] \(0ud8_123 xor 0ud8_7\) = 0ud8_124: PROVED$
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^\[.*\] \(0ud8_123 xnor 0ud8_7\) = 0ud8_131: PROVED$
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^\[.*\] \(0ud8_123 <-> 0ud8_7\) = 0ud8_131: PROVED$
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^EXIT=0$
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^SIGNAL=0$
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--
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^warning: ignoring

regression/smv/word/bitwise1.smv

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MODULE main
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-- negation
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SPEC !uwconst(123, 8) = uwconst(132, 8)
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SPEC !swconst(123, 8) = swconst(-124, 8)
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-- and
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SPEC (uwconst(123, 8) & uwconst(7, 8)) = uwconst(3, 8)
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-- or
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SPEC (uwconst(123, 8) | uwconst(7, 8)) = uwconst(127, 8)
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-- xor
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SPEC (uwconst(123, 8) xor uwconst(7, 8)) = uwconst(124, 8)
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-- xnor
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SPEC (uwconst(123, 8) xnor uwconst(7, 8)) = uwconst(131, 8)
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-- implication
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--SPEC (uwconst(123, 8) -> uwconst(7, 8)) = uwconst(135, 8)
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-- iff
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SPEC (uwconst(123, 8) <-> uwconst(7, 8)) = uwconst(131, 8)

regression/smv/word/concat1.desc

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CORE
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concat1.smv
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^\[.*\] 0ud8_123 :: 0ud8_1 = 0ud16_31489: PROVED$
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^\[.*\] 0sd8_123 :: 0sd8_1 = 0ud16_31489: PROVED$
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^\[.*\] 0sd8_123 :: 0ud8_1 = 0ud16_31489: PROVED$
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^EXIT=0$
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^SIGNAL=0$
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--
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^warning: ignoring

regression/smv/word/concat1.smv

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MODULE main
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SPEC uwconst(123, 8) :: uwconst(1, 8) = uwconst(31489, 16)
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-- concatenation is unsigned
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SPEC swconst(123, 8) :: swconst(1, 8) = uwconst(31489, 16)
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SPEC swconst(123, 8) :: uwconst(1, 8) = uwconst(31489, 16)

regression/smv/word/extend1.desc

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KNOWNBUG
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extend1.smv
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^EXIT=0$
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^SIGNAL=0$
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--
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^warning: ignoring

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