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SMV: abs, bool, count, max, min, toint, word1
This adds the NuSMV operators abs, bool, count, max, min, toint, word to the SMV frontend.
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CHANGELOG

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* SystemVerilog: fix for #-# and #=# for empty matches
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* SystemVerilog: fix for |-> and |=> for empty matches
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* LTL/SVA to Buechi with --buechi
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* SMV: abs, bool, count, max, min, toint, word1
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# EBMC 5.6
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CORE
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smv_abs1.smv
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^\[.*\] abs\(0\) = 0: PROVED .*$
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^\[.*\] abs\(1\) = 1: PROVED .*$
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^\[.*\] abs\(2\) = 2: PROVED .*$
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^\[.*\] abs\(-1\) = 1: PROVED .*$
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^\[.*\] abs\(-2\) = 2: PROVED .*$
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^EXIT=0$
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^SIGNAL=0$
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--
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--
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MODULE main
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CTLSPEC abs(0) = 0
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CTLSPEC abs(1) = 1
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CTLSPEC abs(2) = 2
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CTLSPEC abs(-1) = 1
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CTLSPEC abs(-2) = 2
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CORE
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smv_bool1.smv
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^\[.*\] !bool\(0\): PROVED .*$
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^\[.*\] bool\(1\): PROVED .*$
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^\[.*\] bool\(2\): PROVED .*$
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^\[.*\] !bool\(0ud1_0\): PROVED .*$
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^\[.*\] bool\(0ud1_1\): PROVED .*$
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^EXIT=0$
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^SIGNAL=0$
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--
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MODULE main
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CTLSPEC !bool(0)
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CTLSPEC bool(1)
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CTLSPEC bool(2)
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CTLSPEC !bool(uwconst(0, 1))
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CTLSPEC bool(uwconst(1, 1))
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CORE broken-smt-backend
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smv_count1.smv
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^\[.*\] count\(FALSE\) = 0: PROVED .*$
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^\[.*\] count\(TRUE\) = 1: PROVED .*$
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^\[.*\] count\(FALSE, TRUE\) = 1: PROVED .*$
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^\[.*\] count\(TRUE, FALSE\) = 1: PROVED .*$
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^\[.*\] count\(TRUE, TRUE, TRUE\) = 3: PROVED .*$
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^EXIT=0$
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^SIGNAL=0$
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--
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--
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MODULE main
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CTLSPEC count(FALSE) = 0
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CTLSPEC count(TRUE) = 1
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CTLSPEC count(FALSE, TRUE) = 1
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CTLSPEC count(TRUE, FALSE) = 1
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CTLSPEC count(TRUE, TRUE, TRUE) = 3
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CORE
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smv_max1.smv
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^\[.*\] max\(0, 1\) = 1: PROVED .*$
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^\[.*\] max\(-1, -2\) = -1: PROVED .*$
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^\[.*\] max\(-1, 1\) = 1: PROVED .*$
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^\[.*\] max\(1, 2\) = 2: PROVED .*$
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^EXIT=0$
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^SIGNAL=0$
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--
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--
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MODULE main
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CTLSPEC max(0, 1) = 1
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CTLSPEC max(-1, -2) = -1
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CTLSPEC max(-1, 1) = 1
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CTLSPEC max(1, 2) = 2
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CORE
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smv_min1.smv
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^\[.*\] min\(0, 1\) = 0: PROVED .*$
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^\[.*\] min\(-1, -2\) = -2: PROVED .*$
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^\[.*\] min\(-1, 1\) = -1: PROVED .*$
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^\[.*\] min\(1, 2\) = 1: PROVED .*$
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^EXIT=0$
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^SIGNAL=0$
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--
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--

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