Merge pull request #1243 from diffblue/named_property5

KNOWNBUG test for use of property as an expression

Author: tautschnig

regression/verilog/property/named_property5.desc

@@ -0,0 +1,9 @@
+KNOWNBUG
+named_property5.sv
+
+^EXIT=2$
+^SIGNAL=0$
+--
+^warning: ignoring
+--
+This should be rejected.

regression/verilog/property/named_property5.sv

@@ -0,0 +1,10 @@
+module main;
+
+  property P;
+    1
+  endproperty
+
+  // This should be rejected -- && is for expressions
+  assert property (P && P);
+
+endmodule

regression/verilog/property/named_property6.desc

@@ -0,0 +1,9 @@
+KNOWNBUG
+named_property6.sv
+
+^EXIT=2$
+^SIGNAL=0$
+--
+^warning: ignoring
+--
+This should be rejected.

regression/verilog/property/named_property6.sv

@@ -0,0 +1,10 @@
+module main;
+
+  property P;
+    1
+  endproperty
+
+  // This is an error -- P is used as an expression
+  wire x = P;
+
+endmodule