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[vm/assembler] Split popcnt and lzcnt tests over feature set
Rationale: Some processors may support just popcnt and, in theory, some just lzcnt. This change makes the test more specific. The bsf/bsr tests are never skipped anymore. Change-Id: I0e7b8772789473ce238f0c5c93378c06c39c695b Reviewed-on: https://dart-review.googlesource.com/c/sdk/+/117940 Reviewed-by: Ryan Macnak <[email protected]> Commit-Queue: Aart Bik <[email protected]>
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runtime/vm/compiler/assembler/assembler_x64_test.cc

Lines changed: 49 additions & 46 deletions
Original file line numberDiff line numberDiff line change
@@ -553,7 +553,7 @@ ASSEMBLER_TEST_RUN(Testb, test) {
553553
}
554554

555555
ASSEMBLER_TEST_GENERATE(Testb2, assembler) {
556-
Label done, ok1, ok2, ok3, ok4, ok5, ok6, ok7, ok8, ok9, ok10;
556+
Label done, ok1, ok2, ok3, ok4, ok5, ok6, ok7;
557557

558558
__ movq(RAX, Immediate(0xffffefff));
559559
__ bsrq(RCX, RAX);
@@ -601,38 +601,11 @@ ASSEMBLER_TEST_GENERATE(Testb2, assembler) {
601601
__ int3();
602602
__ Bind(&ok7);
603603

604-
__ movq(RAX, Immediate(-1));
605-
__ popcntq(RCX, RAX);
606-
__ cmpq(RCX, Immediate(64));
607-
__ j(EQUAL, &ok8);
608-
__ int3();
609-
__ Bind(&ok8);
610-
611-
__ movq(RAX, Immediate(0xf));
612-
__ popcntq(RCX, RAX);
613-
__ cmpq(RCX, Immediate(4));
614-
__ j(EQUAL, &ok9);
615-
__ int3();
616-
__ Bind(&ok9);
617-
618-
__ movq(RAX, Immediate(0x7fffeff0));
619-
__ lzcntq(RCX, RAX);
620-
__ cmpq(RCX, Immediate(33));
621-
__ j(EQUAL, &ok10);
622-
__ int3();
623-
__ Bind(&ok10);
624-
625604
__ movq(RAX, Immediate(42));
626605
__ ret();
627606
}
628607

629608
ASSEMBLER_TEST_RUN(Testb2, test) {
630-
// TODO(ajcbik): split out popcount and lzcnt.
631-
if (!HostCPUFeatures::popcnt_supported() ||
632-
!HostCPUFeatures::abm_supported()) {
633-
return;
634-
}
635-
636609
typedef int64_t (*Testb2Code)();
637610
EXPECT_EQ(42, reinterpret_cast<Testb2Code>(test->entry())());
638611
EXPECT_DISASSEMBLY(
@@ -675,24 +648,6 @@ ASSEMBLER_TEST_RUN(Testb2, test) {
675648
"jz 0x................\n"
676649
"int3\n"
677650

678-
"movq rax,-1\n"
679-
"popcntq rcx,rax\n"
680-
"cmpq rcx,0x40\n"
681-
"jz 0x................\n"
682-
"int3\n"
683-
684-
"movl rax,0xf\n"
685-
"popcntq rcx,rax\n"
686-
"cmpq rcx,4\n"
687-
"jz 0x................\n"
688-
"int3\n"
689-
690-
"movl rax,0x........\n"
691-
"lzcntq rcx,rax\n"
692-
"cmpq rcx,0x21\n"
693-
"jz 0x................\n"
694-
"int3\n"
695-
696651
"movl rax,0x2a\n"
697652
"ret\n");
698653
}
@@ -729,6 +684,54 @@ ASSEMBLER_TEST_RUN(Testb3, test) {
729684
"ret\n");
730685
}
731686

687+
ASSEMBLER_TEST_GENERATE(Popcnt, assembler) {
688+
__ movq(RCX, Immediate(-1));
689+
__ popcntq(RAX, RCX);
690+
__ movq(RCX, Immediate(0xf));
691+
__ popcntq(RCX, RCX);
692+
__ addq(RAX, RCX);
693+
__ ret();
694+
}
695+
696+
ASSEMBLER_TEST_RUN(Popcnt, test) {
697+
if (!HostCPUFeatures::popcnt_supported()) {
698+
return;
699+
}
700+
typedef int64_t (*PopcntCode)();
701+
EXPECT_EQ(68, reinterpret_cast<PopcntCode>(test->entry())());
702+
EXPECT_DISASSEMBLY(
703+
"movq rcx,-1\n"
704+
"popcntq rax,rcx\n"
705+
"movl rcx,0xf\n"
706+
"popcntq rcx,rcx\n"
707+
"addq rax,rcx\n"
708+
"ret\n");
709+
}
710+
711+
ASSEMBLER_TEST_GENERATE(Lzcnt, assembler) {
712+
__ movq(RCX, Immediate(0x0f00));
713+
__ lzcntq(RAX, RCX);
714+
__ movq(RCX, Immediate(0x00f0));
715+
__ lzcntq(RCX, RCX);
716+
__ addq(RAX, RCX);
717+
__ ret();
718+
}
719+
720+
ASSEMBLER_TEST_RUN(Lzcnt, test) {
721+
if (!HostCPUFeatures::abm_supported()) {
722+
return;
723+
}
724+
typedef int64_t (*LzcntCode)();
725+
EXPECT_EQ(108, reinterpret_cast<LzcntCode>(test->entry())());
726+
EXPECT_DISASSEMBLY(
727+
"movl rcx,0x...\n"
728+
"lzcntq rax,rcx\n"
729+
"movl rcx,0xf0\n"
730+
"lzcntq rcx,rcx\n"
731+
"addq rax,rcx\n"
732+
"ret\n");
733+
}
734+
732735
struct JumpAddress {
733736
uword filler1;
734737
uword filler2;

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