[interpreter] Implement i8x16.popcnt (#451)

Small fix to the test generation script, the order of applying operators
was incorrect.

Includes a fix to popcnt implementation that is upstream
(WebAssembly/spec#1286).

Author: ngzhian

interpreter/binary/decode.ml

@@ -341,6 +341,7 @@ let simd_prefix s =
   | 0x78l -> i8x16_max_s
   | 0x79l -> i8x16_max_u
   | 0x7bl -> i8x16_avgr_u
+  | 0x7cl -> i8x16_popcnt
   | 0x80l -> i16x8_abs
   | 0x81l -> i16x8_neg
   | 0x83l -> i16x8_all_true

interpreter/binary/encode.ml

@@ -337,6 +337,7 @@ let encode m =
       | Unary (V128 V128Op.(V128 Not)) -> simd_op 0x4dl
       | Unary (V128 V128Op.(I8x16 Abs)) -> simd_op 0x60l
       | Unary (V128 V128Op.(I8x16 Neg)) -> simd_op 0x61l
+      | Unary (V128 V128Op.(I8x16 Popcnt)) -> simd_op 0x7cl
       | Unary (V128 V128Op.(I16x8 Abs)) -> simd_op 0x80l
       | Unary (V128 V128Op.(I16x8 Neg)) -> simd_op 0x81l
       | Unary (V128 V128Op.(I16x8 WidenLowS)) -> simd_op 0x87l

interpreter/exec/eval_simd.ml

@@ -16,6 +16,7 @@ module SimdOp (SXX : Simd.S) (Value : ValueType with type t = SXX.t) = struct
     fun v -> match op with
       | I8x16 Neg -> to_value (SXX.I8x16.neg (of_value 1 v))
       | I8x16 Abs -> to_value (SXX.I8x16.abs (of_value 1 v))
+      | I8x16 Popcnt -> to_value (SXX.I8x16.popcnt (of_value 1 v))
       | I16x8 Neg -> to_value (SXX.I16x8.neg (of_value 1 v))
       | I16x8 Abs -> to_value (SXX.I16x8.abs (of_value 1 v))
       | I16x8 WidenLowS -> to_value (SXX.I16x8_convert.widen_low_s (of_value 1 v))

interpreter/exec/int.ml

@@ -240,7 +240,7 @@ struct
 
   let popcnt x =
     let rec loop acc i n =
-      if n = Rep.zero then
+      if i = 0 then
         acc
       else
         let acc' = if and_ n Rep.one = Rep.one then acc + 1 else acc in

interpreter/exec/simd.ml

@@ -71,6 +71,7 @@ sig
   val ge_u : t -> t -> t
   val abs : t -> t
   val neg : t -> t
+  val popcnt : t -> t
   val add : t -> t -> t
   val sub : t -> t -> t
   val min_s : t -> t -> t
@@ -319,6 +320,7 @@ struct
     let ge_u = binop (cmp Int.ge_u)
     let abs = unop Int.abs
     let neg = unop Int.neg
+    let popcnt = unop Int.popcnt
     let add = binop Int.add
     let sub = binop Int.sub
     let mul = binop Int.mul

interpreter/syntax/ast.ml

@@ -50,6 +50,7 @@ module SimdOp =
 struct
   type iunop = Abs | Neg | TruncSatF32x4S | TruncSatF32x4U
               | WidenLowS | WidenLowU | WidenHighS | WidenHighU
+              | Popcnt
   type ibinop = Add | Sub | MinS | MinU | MaxS | MaxU | Mul | AvgrU
               | Eq | Ne | LtS | LtU | LeS | LeU | GtS | GtU | GeS | GeU
               | Swizzle | Shuffle of int list | NarrowS | NarrowU

interpreter/syntax/operators.ml

@@ -299,6 +299,7 @@ let i8x16_sub = Binary (V128 V128Op.(I8x16 Sub))
 let i8x16_sub_sat_s = Binary (V128 V128Op.(I8x16 SubSatS))
 let i8x16_sub_sat_u = Binary (V128 V128Op.(I8x16 SubSatU))
 let i8x16_abs = Unary (V128 V128Op.(I8x16 Abs))
+let i8x16_popcnt = Unary (V128 V128Op.(I8x16 Popcnt))
 let i8x16_min_s = Binary (V128 V128Op.(I8x16 MinS))
 let i8x16_min_u = Binary (V128 V128Op.(I8x16 MinU))
 let i8x16_max_s = Binary (V128 V128Op.(I8x16 MaxS))

interpreter/text/arrange.ml

@@ -202,6 +202,7 @@ struct
   let unop xx (op : unop) = match op with
     | I8x16 Neg -> "i8x16.neg"
     | I8x16 Abs -> "i8x16.abs"
+    | I8x16 Popcnt -> "i8x16.popcnt"
     | I16x8 Abs -> "i16x8.abs"
     | I16x8 Neg -> "i16x8.neg"
     | I16x8 WidenLowS -> "i16x8.widen_low_i8x16_s"

interpreter/text/lexer.mll

@@ -532,6 +532,8 @@ rule token = parse
   | (simd_shape as s)".abs"
     { only ["i8x16"; "i16x8"; "i32x4"; "f32x4"; "f64x2"] s lexbuf;
       UNARY (simdop s i8x16_abs i16x8_abs i32x4_abs unreachable f32x4_abs f64x2_abs) }
+  | "i8x16.popcnt"
+    { UNARY i8x16_popcnt }
   | (simd_int_shape as s)".all_true"
     { only ["i8x16"; "i16x8"; "i32x4"] s lexbuf;
       UNARY (simd_int_op s i8x16_all_true i16x8_all_true i32x4_all_true unreachable) }

test/core/simd/meta/simd_int_arith2.py

@@ -450,8 +450,8 @@ def gen_test_case_combination(self):
             for op2 in unary_ops:
                 o2 = ArithmeticOp(op2)
                 result3 = []
-                ret3 = o1.unary_op('-1', self.LANE_VALUE)
-                ret3 = o2.unary_op(ret3, self.LANE_VALUE)
+                ret3 = o2.unary_op('-1', self.LANE_VALUE)
+                ret3 = o1.unary_op(ret3, self.LANE_VALUE)
                 result3.append(ret3)
                 cases += '\n' + str(AssertReturn('{lane_type}.{op1}-{lane_type}.{op2}'.format(lane_type=self.LANE_TYPE, op1=op1, op2=op2),
                                                  [SIMD.v128_const('-1', self.LANE_TYPE)],
@@ -543,6 +543,7 @@ class Simdi16x8Case(SimdLaneWiseInteger):
 class Simdi8x16Case(SimdLaneWiseInteger):
     LANE_TYPE = 'i8x16'
 
+    UNARY_OPS = ('abs','popcnt')
     BINARY_OPS = ('min_s', 'min_u', 'max_s', 'max_u', 'avgr_u')
     UNKNOWN_BINARY_OPS = ('i32x4.avgr_u', 'f32x4.avgr_u',
                    'i64x2.avgr_u', 'f64x2.avgr_u',