i64x2.ne instruction

Author: Maratyszcza

proposals/simd/BinarySIMD.md

@@ -225,6 +225,7 @@ For example, `ImmLaneIdx16` is a byte with values in the range 0-15 (inclusive).
 | `f32x4.convert_i32x4_u`     |    `0xfb`| -                  |
 | `v128.load32_zero`          |    `0xfc`| -                  |
 | `v128.load64_zero`          |    `0xfd`| -                  |
+| `i64x2.ne`                  |   `0x101`| -                  |
 | `i16x8.extmul_low_i8x16_s`  |   `0x110`| -                  |
 | `i16x8.extmul_high_i8x16_s` |   `0x111`| -                  |
 | `i16x8.extmul_low_i8x16_u`  |   `0x112`| -                  |

proposals/simd/ImplementationStatus.md

@@ -193,6 +193,7 @@
 | `f32x4.convert_i32x4_u`     |               `-msimd128` | :heavy_check_mark: |                    |                    | :heavy_check_mark: |
 | `v128.load32_zero`          |                           | :heavy_check_mark: |                    |                    | :heavy_check_mark: |
 | `v128.load64_zero`          |                           | :heavy_check_mark: |                    |                    | :heavy_check_mark: |
+| `i64x2.ne`                  |                           |                    |                    |                    |                    |
 | `i16x8.extmul_low_i8x16_s`  |                           |                    |                    |                    |                    |
 | `i16x8.extmul_high_i8x16_s` |                           |                    |                    |                    |                    |
 | `i16x8.extmul_low_i8x16_u`  |                           |                    |                    |                    |                    |

proposals/simd/NewOpcodes.md

@@ -47,18 +47,18 @@
 | f64x2.extract_lane   | 0x21   |
 | f64x2.replace_lane   | 0x22   |
 
-| i8x16 Cmp  | opcode | i16x8 Cmp  | opcode | i32x4 Cmp  | opcode |
-| ---------- | ------ | ---------- | ------ | ---------- | ------ |
-| i8x16.eq   | 0x23   | i16x8.eq   | 0x2d   | i32x4.eq   | 0x37   |
-| i8x16.ne   | 0x24   | i16x8.ne   | 0x2e   | i32x4.ne   | 0x38   |
-| i8x16.lt_s | 0x25   | i16x8.lt_s | 0x2f   | i32x4.lt_s | 0x39   |
-| i8x16.lt_u | 0x26   | i16x8.lt_u | 0x30   | i32x4.lt_u | 0x3a   |
-| i8x16.gt_s | 0x27   | i16x8.gt_s | 0x31   | i32x4.gt_s | 0x3b   |
-| i8x16.gt_u | 0x28   | i16x8.gt_u | 0x32   | i32x4.gt_u | 0x3c   |
-| i8x16.le_s | 0x29   | i16x8.le_s | 0x33   | i32x4.le_s | 0x3d   |
-| i8x16.le_u | 0x2a   | i16x8.le_u | 0x34   | i32x4.le_u | 0x3e   |
-| i8x16.ge_s | 0x2b   | i16x8.ge_s | 0x35   | i32x4.ge_s | 0x3f   |
-| i8x16.ge_u | 0x2c   | i16x8.ge_u | 0x36   | i32x4.ge_u | 0x40   |
+| i8x16 Cmp  | opcode | i16x8 Cmp  | opcode | i32x4 Cmp  | opcode | i64x2 Cmp  | opcode |
+| ---------- | ------ | ---------- | ------ | ---------- | ------ | ---------- | ------ |
+| i8x16.eq   | 0x23   | i16x8.eq   | 0x2d   | i32x4.eq   | 0x37   | --- eq --- | 0x100  |
+| i8x16.ne   | 0x24   | i16x8.ne   | 0x2e   | i32x4.ne   | 0x38   | i64x2.ne   | 0x101  |
+| i8x16.lt_s | 0x25   | i16x8.lt_s | 0x2f   | i32x4.lt_s | 0x39   | -- lt_s -- | 0x102  |
+| i8x16.lt_u | 0x26   | i16x8.lt_u | 0x30   | i32x4.lt_u | 0x3a   | -- lt_u -- | 0x103  |
+| i8x16.gt_s | 0x27   | i16x8.gt_s | 0x31   | i32x4.gt_s | 0x3b   | -- gt_s -- | 0x104  |
+| i8x16.gt_u | 0x28   | i16x8.gt_u | 0x32   | i32x4.gt_u | 0x3c   | -- gt_u -- | 0x105  |
+| i8x16.le_s | 0x29   | i16x8.le_s | 0x33   | i32x4.le_s | 0x3d   | -- le_s -- | 0x106  |
+| i8x16.le_u | 0x2a   | i16x8.le_u | 0x34   | i32x4.le_u | 0x3e   | -- le_u -- | 0x107  |
+| i8x16.ge_s | 0x2b   | i16x8.ge_s | 0x35   | i32x4.ge_s | 0x3f   | -- ge_s -- | 0x108  |
+| i8x16.ge_u | 0x2c   | i16x8.ge_u | 0x36   | i32x4.ge_u | 0x40   | -- ge_u -- | 0x109  |
 
 | f32x4 Cmp | opcode | f64x2 Cmp | opcode |
 | --------- | ------ | --------- | ------ |

proposals/simd/SIMD.md

@@ -731,6 +731,7 @@ def S.eq(a, b):
 * `i8x16.ne(a: v128, b: v128) -> v128`
 * `i16x8.ne(a: v128, b: v128) -> v128`
 * `i32x4.ne(a: v128, b: v128) -> v128`
+* `i64x2.ne(a: v128, b: v128) -> v128`
 * `f32x4.ne(a: v128, b: v128) -> v128`
 * `f64x2.ne(a: v128, b: v128) -> v128`