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Replace i8x16/i16x8/i32x4.any_true with v128.any_true
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proposals/simd/BinarySIMD.md

Lines changed: 1 addition & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -117,7 +117,6 @@ For example, `ImmLaneIdx16` is a byte with values in the range 0-15 (inclusive).
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| `v128.bitselect` | `0x52`| - |
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| `i8x16.abs` | `0x60`| - |
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| `i8x16.neg` | `0x61`| - |
120-
| `i8x16.any_true` | `0x62`| - |
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| `i8x16.all_true` | `0x63`| - |
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| `i8x16.bitmask` | `0x64`| - |
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| `i8x16.narrow_i16x8_s` | `0x65`| - |
@@ -138,7 +137,6 @@ For example, `ImmLaneIdx16` is a byte with values in the range 0-15 (inclusive).
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| `i8x16.avgr_u` | `0x7b`| - |
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| `i16x8.abs` | `0x80`| - |
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| `i16x8.neg` | `0x81`| - |
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| `i16x8.any_true` | `0x82`| - |
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| `i16x8.all_true` | `0x83`| - |
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| `i16x8.bitmask` | `0x84`| - |
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| `i16x8.narrow_i32x4_s` | `0x85`| - |
@@ -164,7 +162,6 @@ For example, `ImmLaneIdx16` is a byte with values in the range 0-15 (inclusive).
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| `i16x8.avgr_u` | `0x9b`| - |
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| `i32x4.abs` | `0xa0`| - |
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| `i32x4.neg` | `0xa1`| - |
167-
| `i32x4.any_true` | `0xa2`| - |
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| `i32x4.all_true` | `0xa3`| - |
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| `i32x4.bitmask` | `0xa4`| - |
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| `i32x4.widen_low_i16x8_s` | `0xa7`| - |
@@ -239,3 +236,4 @@ For example, `ImmLaneIdx16` is a byte with values in the range 0-15 (inclusive).
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| `i64x2.extmul_low_i32x4_u` | `0x11a`| - |
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| `i64x2.extmul_high_i32x4_u` | `0x11b`| - |
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| `i16x8.q15mulr_sat_s` | `TBD`| - |
239+
| `v128.any_true` | `TBD`| - |

proposals/simd/ImplementationStatus.md

Lines changed: 1 addition & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -85,7 +85,6 @@
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| `v128.bitselect` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: |
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| `i8x16.abs` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: |
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| `i8x16.neg` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: |
88-
| `i8x16.any_true` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: |
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| `i8x16.all_true` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: |
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| `i8x16.bitmask` | `-munimplemented-simd128` | :heavy_check_mark: [6] | | | :heavy_check_mark: |
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| `i8x16.narrow_i16x8_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: |
@@ -106,7 +105,6 @@
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| `i8x16.avgr_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: |
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| `i16x8.abs` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: |
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| `i16x8.neg` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: |
109-
| `i16x8.any_true` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: |
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| `i16x8.all_true` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: |
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| `i16x8.bitmask` | `-munimplemented-simd128` | :heavy_check_mark: [6] | | | :heavy_check_mark: |
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| `i16x8.narrow_i32x4_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: |
@@ -133,7 +131,6 @@
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| `i16x8.q15mulr_sat_s` | | | | | |
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| `i32x4.abs` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: |
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| `i32x4.neg` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: |
136-
| `i32x4.any_true` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: |
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| `i32x4.all_true` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: |
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| `i32x4.bitmask` | `-munimplemented-simd128` | :heavy_check_mark: [6] | | | :heavy_check_mark: |
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| `i32x4.widen_low_i16x8_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: |
@@ -207,6 +204,7 @@
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| `i64x2.extmul_high_i32x4_s` | | | | | |
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| `i64x2.extmul_low_i32x4_u` | | | | | |
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| `i64x2.extmul_high_i32x4_u` | | | | | |
207+
| `v128.any_true` | | | | | |
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[1] Tip of tree LLVM as of May 20, 2020
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proposals/simd/NewOpcodes.md

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@@ -82,7 +82,6 @@
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| -------------------- | ------ | ------------------------ | ------ | ------------------------ | ------ | ------------- | ------ |
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| i8x16.abs | 0x60 | i16x8.abs | 0x80 | i32x4.abs | 0xa0 | ---- | 0xc0 |
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| i8x16.neg | 0x61 | i16x8.neg | 0x81 | i32x4.neg | 0xa1 | i64x2.neg | 0xc1 |
85-
| i8x16.any_true | 0x62 | i16x8.any_true | 0x82 | i32x4.any_true | 0xa2 | ---- | 0xc2 |
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| i8x16.all_true | 0x63 | i16x8.all_true | 0x83 | i32x4.all_true | 0xa3 | ---- | 0xc3 |
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| i8x16.bitmask | 0x64 | i16x8.bitmask | 0x84 | i32x4.bitmask | 0xa4 | i64x2.bitmask | 0xc4 |
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| i8x16.narrow_i16x8_s | 0x65 | i16x8.narrow_i32x4_s | 0x85 | ---- narrow ---- | 0xa5 | ---- | 0xc5 |

proposals/simd/SIMD.md

Lines changed: 3 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -668,20 +668,10 @@ rather than selecting bits controlled by a control mask vector.
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These operations reduce all the lanes of an integer vector to a single scalar
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0 or 1 value. A lane is considered "true" if it is non-zero.
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### Any lane true
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* `i8x16.any_true(a: v128) -> i32`
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* `i16x8.any_true(a: v128) -> i32`
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* `i32x4.any_true(a: v128) -> i32`
671+
### Any bit true
672+
* `v128.any_true(a: v128) -> i32`
675673

676-
These functions return 1 if any lane in `a` is non-zero, 0 otherwise.
677-
678-
```python
679-
def S.any_true(a):
680-
for i in range(S.Lanes):
681-
if a[i] != 0:
682-
return 1
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return 0
684-
```
674+
These functions return 1 if any bit in `a` is non-zero, 0 otherwise.
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### All lanes true
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* `i8x16.all_true(a: v128) -> i32`

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