Skip to content
This repository was archived by the owner on Dec 22, 2021. It is now read-only.

Commit 13da962

Browse files
ngzhianngzhian
authored
Rename shuffle and swizzle to i8x16 prefix (#321)
v8x16.shuffle and v8x16.swizzle is now i8x16.shuffle and i8x16.swizzle respectively. Fixed #316.
1 parent 71d4fa7 commit 13da962

File tree

13 files changed

+69
-69
lines changed

13 files changed

+69
-69
lines changed

‎interpreter/binary/decode.ml

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -234,8 +234,8 @@ let simd_prefix s =
234234
| 0x0al -> let a, o = memop s in v64x2_load_splat a o
235235
| 0x0bl -> let a, o = memop s in v128_store a o
236236
| 0x0cl -> v128_const (at v128 s)
237-
| 0x0dl -> v8x16_shuffle (List.init 16 (fun x -> u8 s))
238-
| 0x0el -> v8x16_swizzle
237+
| 0x0dl -> i8x16_shuffle (List.init 16 (fun x -> u8 s))
238+
| 0x0el -> i8x16_swizzle
239239
| 0x0fl -> i8x16_splat
240240
| 0x10l -> i16x8_splat
241241
| 0x11l -> i32x4_splat

‎interpreter/syntax/operators.ml

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -247,8 +247,8 @@ let v128_or = Binary (V128 (V128Op.V128 V128Op.Or))
247247
let v128_xor = Binary (V128 (V128Op.V128 V128Op.Xor))
248248
let v128_bitselect = Ternary (V128Op.Bitselect)
249249

250-
let v8x16_swizzle = Binary (V128 V128Op.(I8x16 Swizzle))
251-
let v8x16_shuffle imms = Binary (V128 V128Op.(I8x16 (Shuffle imms)))
250+
let i8x16_swizzle = Binary (V128 V128Op.(I8x16 Swizzle))
251+
let i8x16_shuffle imms = Binary (V128 V128Op.(I8x16 (Shuffle imms)))
252252

253253
let i8x16_splat = Convert (V128 (V128Op.I8x16 V128Op.Splat))
254254
let i8x16_extract_lane_s imm = SimdExtract (V128Op.I8x16 (SX, imm))

‎interpreter/text/arrange.ml

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -231,8 +231,8 @@ struct
231231
| _ -> failwith "Unimplemented v128 unop"
232232

233233
let binop xx (op : binop) = match op with
234-
| I8x16 (Shuffle imms) -> "v8x16.shuffle " ^ (String.concat " " (List.map nat imms))
235-
| I8x16 Swizzle -> "v8x16.swizzle"
234+
| I8x16 (Shuffle imms) -> "i8x16.shuffle " ^ (String.concat " " (List.map nat imms))
235+
| I8x16 Swizzle -> "i8x16.swizzle"
236236
| I8x16 Eq -> "i8x16.eq"
237237
| I8x16 Ne -> "i8x16.ne"
238238
| I8x16 LtS -> "i8x16.lt_s"

‎interpreter/text/lexer.mll

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -479,8 +479,8 @@ rule token = parse
479479
| (simd_float_shape as s)".le" { BINARY (simd_float_op s f32x4_le f64x2_le) }
480480
| (simd_float_shape as s)".gt" { BINARY (simd_float_op s f32x4_gt f64x2_gt) }
481481
| (simd_float_shape as s)".ge" { BINARY (simd_float_op s f32x4_ge f64x2_ge) }
482-
| "v8x16.swizzle" { BINARY v8x16_swizzle }
483-
| "v8x16.shuffle" { SHUFFLE }
482+
| "i8x16.swizzle" { BINARY i8x16_swizzle }
483+
| "i8x16.shuffle" { SHUFFLE }
484484
| vxxx".not" { UNARY v128_not }
485485
| vxxx".and" { UNARY v128_and }
486486
| vxxx".andnot" { UNARY v128_andnot }

‎interpreter/text/parser.mly

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -400,7 +400,7 @@ plain_instr :
400400
| EXTRACT_LANE NAT { let at = at () in fun c -> $1 (simd_lane_index $2 at) }
401401
| REPLACE_LANE NAT { let at = at () in fun c -> $1 (simd_lane_index $2 at) }
402402
| SHIFT { fun c -> $1 }
403-
| SHUFFLE literal_list { let at = at () in fun c -> v8x16_shuffle (shuffle_literal $2 at) }
403+
| SHUFFLE literal_list { let at = at () in fun c -> i8x16_shuffle (shuffle_literal $2 at) }
404404
405405
406406
call_instr :

‎proposals/simd/BinarySIMD.md

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -24,7 +24,7 @@ instr ::= ...
2424

2525
Some SIMD instructions have additional immediate operands following `simdop`.
2626
These immediate operands are encoded as individual bytes.
27-
For example, the `v8x16.shuffle` instruction has 16 bytes after `simdop`.
27+
For example, the `i8x16.shuffle` instruction has 16 bytes after `simdop`.
2828

2929
In the description below, `ImmLaneIdx{I}` indicates the maximum value of the byte.
3030
For example, `ImmLaneIdx16` is a byte with values in the range 0-15 (inclusive).
@@ -45,8 +45,8 @@ For example, `ImmLaneIdx16` is a byte with values in the range 0-15 (inclusive).
4545
| `v64x2.load_splat` | `0x0a`| m:memarg |
4646
| `v128.store` | `0x0b`| m:memarg |
4747
| `v128.const` | `0x0c`| i:ImmByte[16] |
48-
| `v8x16.shuffle` | `0x0d`| s:ImmLaneIdx32[16] |
49-
| `v8x16.swizzle` | `0x0e`| - |
48+
| `i8x16.shuffle` | `0x0d`| s:ImmLaneIdx32[16] |
49+
| `i8x16.swizzle` | `0x0e`| - |
5050
| `i8x16.splat` | `0x0f`| - |
5151
| `i16x8.splat` | `0x10`| - |
5252
| `i32x4.splat` | `0x11`| - |

‎proposals/simd/ImplementationStatus.md

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -13,8 +13,8 @@
1313
| `v64x2.load_splat` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: |
1414
| `v128.store` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: |
1515
| `v128.const` | `-munimplemented-simd128` | :heavy_check_mark: [6] | | | :heavy_check_mark: |
16-
| `v8x16.shuffle` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: |
17-
| `v8x16.swizzle` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: |
16+
| `i8x16.shuffle` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: |
17+
| `i8x16.swizzle` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: |
1818
| `i8x16.splat` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: |
1919
| `i16x8.splat` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: |
2020
| `i32x4.splat` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: |

‎proposals/simd/NewOpcodes.md

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -16,8 +16,8 @@
1616
| Basic operation | opcode |
1717
| ----------------| ------ |
1818
| v128.const | 0x0c |
19-
| v8x16.shuffle | 0x0d |
20-
| v8x16.swizzle | 0x0e |
19+
| i8x16.shuffle | 0x0d |
20+
| i8x16.swizzle | 0x0e |
2121

2222
| Splat operation | opcode |
2323
| --------------- | ------ |

‎proposals/simd/SIMD.md

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -300,7 +300,7 @@ The input lane value, `x`, is interpreted the same way as for the splat
300300
instructions. For the `i8` and `i16` lanes, the high bits of `x` are ignored.
301301

302302
### Shuffling using immediate indices
303-
* `v8x16.shuffle(a: v128, b: v128, imm: ImmLaneIdx32[16]) -> v128`
303+
* `i8x16.shuffle(a: v128, b: v128, imm: ImmLaneIdx32[16]) -> v128`
304304

305305
Returns a new vector with lanes selected from the lanes of the two input vectors
306306
`a` and `b` specified in the 16 byte wide immediate mode operand `imm`. This
@@ -320,7 +320,7 @@ def S.shuffle(a, b, s):
320320
```
321321

322322
### Swizzling using variable indices
323-
* `v8x16.swizzle(a: v128, s: v128) -> v128`
323+
* `i8x16.swizzle(a: v128, s: v128) -> v128`
324324

325325
Returns a new vector with lanes selected from the lanes of the first input
326326
vector `a` specified in the second input vector `s`. The indices `i` in range

‎proposals/simd/TextSIMD.md

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -20,8 +20,8 @@ The canonical text format used for printing `v128.const` instructions is
2020
v128.const i32x4 0xNNNNNNNN 0xNNNNNNNN 0xNNNNNNNN 0xNNNNNNNN
2121
```
2222

23-
### v8x16.shuffle
23+
### i8x16.shuffle
2424

2525
```
26-
v8x16.shuffle i5 i5 i5 i5 i5 i5 i5 i5 i5 i5 i5 i5 i5 i5 i5 i5
26+
i8x16.shuffle i5 i5 i5 i5 i5 i5 i5 i5 i5 i5 i5 i5 i5 i5 i5 i5
2727
```

0 commit comments

Comments
 (0)